[llvm] [AMDGPU] Handle non-register operands for S_SUB/ADD_U64_PSEUDO (PR #86104)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 21 03:21:00 PDT 2024
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@@ -4857,9 +4857,7 @@ MachineBasicBlock *SITargetLowering::EmitInstrWithCustomInserter(
bool IsAdd = (MI.getOpcode() == AMDGPU::S_ADD_U64_PSEUDO);
if (Subtarget->hasScalarAddSub64()) {
unsigned Opc = IsAdd ? AMDGPU::S_ADD_U64 : AMDGPU::S_SUB_U64;
- BuildMI(*BB, MI, DL, TII->get(Opc), Dest.getReg())
- .add(Src0)
- .add(Src1);
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arsenm wrote:
Ignore clang-format, this is worse
https://github.com/llvm/llvm-project/pull/86104
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