[llvm] [PowerPC] 32-bit large code-model support for toc-data (PR #85129)
Chen Zheng via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 21 01:03:48 PDT 2024
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@@ -3346,11 +3346,13 @@ def ADDIStocHA : PPCEmitTimePseudo<(outs gprc:$rD), (ins gprc_nor0:$reg, tocentr
"#ADDIStocHA",
[(set i32:$rD,
(PPCtoc_entry i32:$reg, tglobaladdr:$disp))]>;
-// Local Data Transform
+// TOC Data Transform AIX
def ADDItoc : PPCEmitTimePseudo<(outs gprc:$rD), (ins tocentry32:$disp, gprc:$reg),
"#ADDItoc",
[(set i32:$rD,
(PPCtoc_entry tglobaladdr:$disp, i32:$reg))]>;
+def ADDItocL : PPCEmitTimePseudo<(outs gprc:$rD), (ins gprc_nor0:$reg, tocentry32:$disp),
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chenzheng1030 wrote:
Well, you defined a new pseudo and it will be lowered to the real instruction `addi`. Should we add this new instruction into
- scheduling model, like `llvm/lib/Target/PowerPC/P10InstrResources.td`. (P9/P8 scheduling model's regular expression is able to cover this. P7 is bad, it also does not cover 64bit version, maybe we can just leave them for now.)
- `llvm/lib/Target/PowerPC/PPCMacroFusion.def`
- Peephole optimization in `getForwardingDefMI`
https://github.com/llvm/llvm-project/pull/85129
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