[llvm] [PowerPC] Spill non-volatile registers required for traceback table (PR #71115)
Chen Zheng via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 20 23:17:21 PDT 2024
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@@ -387,7 +387,7 @@ entry:
; ASM64BIT: bl .test_byval_mem4
; ASM64BIT: addi 1, 1, 352
-define void @test_byval_mem4(i32, ptr byval(%struct_S31) align 1, ptr byval(%struct_S256) align 1 %s) {
+define void @test_byval_mem4(i32, ptr byval(%struct_S31) align 1, ptr byval(%struct_S256) align 1 %s) #0 {
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chenzheng1030 wrote:
I am curious, will this change make difference to the final result? I saw we will/should save/restore CSRs till number 31 without checking the unwind flag?
https://github.com/llvm/llvm-project/pull/71115
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