[llvm] goldsteinn/vt istruepred (PR #86083)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 20 22:06:07 PDT 2024
https://github.com/goldsteinn created https://github.com/llvm/llvm-project/pull/86083
- **[IR] Add helpers for `NUWAddLike` and `NSWAddLike` to also match `or disjoint`; NFC**
- **[InstCombine] Add tests for integrating `N{U,S}WAddLike`; NFC**
- **[InstCombine] integrate `N{U,S}WAddLike` into existing folds**
- **[ValueTracking] Add tests for deducing more conditions in `isTruePredicate`; NFC**
- **[ValueTracking] Add more conditions in to `isTruePredicate`**
>From 9bd40610e93ced2dbb574caf0671a8ca877bfcb8 Mon Sep 17 00:00:00 2001
From: Noah Goldstein <goldstein.w.n at gmail.com>
Date: Wed, 20 Mar 2024 21:33:02 -0500
Subject: [PATCH 1/5] [IR] Add helpers for `NUWAddLike` and `NSWAddLike` to
also match `or disjoint`; NFC
`or disjoint` implies `add nuw nsw`: https://alive2.llvm.org/ce/z/VABhDA
---
llvm/include/llvm/IR/PatternMatch.h | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/llvm/include/llvm/IR/PatternMatch.h b/llvm/include/llvm/IR/PatternMatch.h
index 382009d9df785d..3e298eff9b56ea 100644
--- a/llvm/include/llvm/IR/PatternMatch.h
+++ b/llvm/include/llvm/IR/PatternMatch.h
@@ -1202,6 +1202,7 @@ m_NSWAdd(const LHS &L, const RHS &R) {
OverflowingBinaryOperator::NoSignedWrap>(L,
R);
}
+
template <typename LHS, typename RHS>
inline OverflowingBinaryOp_match<LHS, RHS, Instruction::Sub,
OverflowingBinaryOperator::NoSignedWrap>
@@ -1235,6 +1236,7 @@ m_NUWAdd(const LHS &L, const RHS &R) {
OverflowingBinaryOperator::NoUnsignedWrap>(
L, R);
}
+
template <typename LHS, typename RHS>
inline OverflowingBinaryOp_match<LHS, RHS, Instruction::Sub,
OverflowingBinaryOperator::NoUnsignedWrap>
@@ -1319,6 +1321,26 @@ m_AddLike(const LHS &L, const RHS &R) {
return m_CombineOr(m_Add(L, R), m_DisjointOr(L, R));
}
+/// Match either "add nsw" or "or disjoint"
+template <typename LHS, typename RHS>
+inline match_combine_or<
+ OverflowingBinaryOp_match<LHS, RHS, Instruction::Add,
+ OverflowingBinaryOperator::NoSignedWrap>,
+ DisjointOr_match<LHS, RHS>>
+m_NSWAddLike(const LHS &L, const RHS &R) {
+ return m_CombineOr(m_NSWAdd(L, R), m_DisjointOr(L, R));
+}
+
+/// Match either "add nuw" or "or disjoint"
+template <typename LHS, typename RHS>
+inline match_combine_or<
+ OverflowingBinaryOp_match<LHS, RHS, Instruction::Add,
+ OverflowingBinaryOperator::NoUnsignedWrap>,
+ DisjointOr_match<LHS, RHS>>
+m_NUWAddLike(const LHS &L, const RHS &R) {
+ return m_CombineOr(m_NUWAdd(L, R), m_DisjointOr(L, R));
+}
+
//===----------------------------------------------------------------------===//
// Class that matches a group of binary opcodes.
//
>From 1f16956df71f13801954ab15faff43dd3e2f792f Mon Sep 17 00:00:00 2001
From: Noah Goldstein <goldstein.w.n at gmail.com>
Date: Wed, 20 Mar 2024 22:09:23 -0500
Subject: [PATCH 2/5] [InstCombine] Add tests for integrating `N{U,S}WAddLike`;
NFC
---
llvm/test/Transforms/InstCombine/add.ll | 79 +++++++++++++++++++
llvm/test/Transforms/InstCombine/div.ll | 26 ++++++
.../InstCombine/sadd-with-overflow.ll | 33 ++++++++
llvm/test/Transforms/InstCombine/shift-add.ll | 33 ++++++++
.../InstCombine/uadd-with-overflow.ll | 24 ++++++
5 files changed, 195 insertions(+)
diff --git a/llvm/test/Transforms/InstCombine/add.ll b/llvm/test/Transforms/InstCombine/add.ll
index 522dcf8db27f42..846da7f760b1d4 100644
--- a/llvm/test/Transforms/InstCombine/add.ll
+++ b/llvm/test/Transforms/InstCombine/add.ll
@@ -3986,5 +3986,84 @@ define i32 @add_reduce_sqr_sum_varC_invalid2(i32 %a, i32 %b) {
ret i32 %ab2
}
+define i32 @fold_sext_addition_or_disjoint(i8 %x) {
+; CHECK-LABEL: @fold_sext_addition_or_disjoint(
+; CHECK-NEXT: [[XX:%.*]] = or disjoint i8 [[X:%.*]], 12
+; CHECK-NEXT: [[SE:%.*]] = sext i8 [[XX]] to i32
+; CHECK-NEXT: [[R:%.*]] = add nsw i32 [[SE]], 1234
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %xx = or disjoint i8 %x, 12
+ %se = sext i8 %xx to i32
+ %r = add i32 %se, 1234
+ ret i32 %r
+}
+
+define i32 @fold_sext_addition_fail(i8 %x) {
+; CHECK-LABEL: @fold_sext_addition_fail(
+; CHECK-NEXT: [[XX:%.*]] = or i8 [[X:%.*]], 12
+; CHECK-NEXT: [[SE:%.*]] = sext i8 [[XX]] to i32
+; CHECK-NEXT: [[R:%.*]] = add nsw i32 [[SE]], 1234
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %xx = or i8 %x, 12
+ %se = sext i8 %xx to i32
+ %r = add i32 %se, 1234
+ ret i32 %r
+}
+
+define i32 @fold_zext_addition_or_disjoint(i8 %x) {
+; CHECK-LABEL: @fold_zext_addition_or_disjoint(
+; CHECK-NEXT: [[XX:%.*]] = or disjoint i8 [[X:%.*]], 12
+; CHECK-NEXT: [[SE:%.*]] = zext i8 [[XX]] to i32
+; CHECK-NEXT: [[R:%.*]] = add nuw nsw i32 [[SE]], 1234
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %xx = or disjoint i8 %x, 12
+ %se = zext i8 %xx to i32
+ %r = add i32 %se, 1234
+ ret i32 %r
+}
+
+define i32 @fold_zext_addition_or_disjoint2(i8 %x) {
+; CHECK-LABEL: @fold_zext_addition_or_disjoint2(
+; CHECK-NEXT: [[XX:%.*]] = or disjoint i8 [[X:%.*]], 18
+; CHECK-NEXT: [[SE:%.*]] = zext i8 [[XX]] to i32
+; CHECK-NEXT: [[R:%.*]] = add nsw i32 [[SE]], -14
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %xx = or disjoint i8 %x, 18
+ %se = zext i8 %xx to i32
+ %r = add i32 %se, -14
+ ret i32 %r
+}
+
+define i32 @fold_zext_addition_fail(i8 %x) {
+; CHECK-LABEL: @fold_zext_addition_fail(
+; CHECK-NEXT: [[XX:%.*]] = or i8 [[X:%.*]], 12
+; CHECK-NEXT: [[SE:%.*]] = zext i8 [[XX]] to i32
+; CHECK-NEXT: [[R:%.*]] = add nuw nsw i32 [[SE]], 1234
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %xx = or i8 %x, 12
+ %se = zext i8 %xx to i32
+ %r = add i32 %se, 1234
+ ret i32 %r
+}
+
+define i32 @fold_zext_addition_fail2(i8 %x) {
+; CHECK-LABEL: @fold_zext_addition_fail2(
+; CHECK-NEXT: [[XX:%.*]] = or i8 [[X:%.*]], 18
+; CHECK-NEXT: [[SE:%.*]] = zext i8 [[XX]] to i32
+; CHECK-NEXT: [[R:%.*]] = add nsw i32 [[SE]], -14
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %xx = or i8 %x, 18
+ %se = zext i8 %xx to i32
+ %r = add i32 %se, -14
+ ret i32 %r
+}
+
+
declare void @llvm.assume(i1)
declare void @fake_func(i32)
diff --git a/llvm/test/Transforms/InstCombine/div.ll b/llvm/test/Transforms/InstCombine/div.ll
index 1309dee817cf65..a4d604b329c3c2 100644
--- a/llvm/test/Transforms/InstCombine/div.ll
+++ b/llvm/test/Transforms/InstCombine/div.ll
@@ -1810,3 +1810,29 @@ define i6 @udiv_distribute_mul_nsw_add_nuw(i6 %x) {
%div = udiv i6 %add, 3
ret i6 %div
}
+
+define i32 @fold_disjoint_or_over_sdiv(i32 %x) {
+; CHECK-LABEL: @fold_disjoint_or_over_sdiv(
+; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[X:%.*]], 9
+; CHECK-NEXT: [[OR:%.*]] = or disjoint i32 [[MUL]], 81
+; CHECK-NEXT: [[R:%.*]] = sdiv i32 [[OR]], 9
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %mul = mul nsw i32 %x, 9
+ %or = or disjoint i32 %mul, 81
+ %r = sdiv i32 %or, 9
+ ret i32 %r
+}
+
+define i32 @fold_disjoint_or_over_udiv(i32 %x) {
+; CHECK-LABEL: @fold_disjoint_or_over_udiv(
+; CHECK-NEXT: [[MUL:%.*]] = mul nuw i32 [[X:%.*]], 9
+; CHECK-NEXT: [[OR:%.*]] = or disjoint i32 [[MUL]], 81
+; CHECK-NEXT: [[R:%.*]] = udiv i32 [[OR]], 9
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %mul = mul nuw i32 %x, 9
+ %or = or disjoint i32 %mul, 81
+ %r = udiv i32 %or, 9
+ ret i32 %r
+}
diff --git a/llvm/test/Transforms/InstCombine/sadd-with-overflow.ll b/llvm/test/Transforms/InstCombine/sadd-with-overflow.ll
index 4b37ccbe3370b6..904dd480caafa6 100644
--- a/llvm/test/Transforms/InstCombine/sadd-with-overflow.ll
+++ b/llvm/test/Transforms/InstCombine/sadd-with-overflow.ll
@@ -122,3 +122,36 @@ define { i32, i1 } @fold_sub_simple(i32 %x) {
%b = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %a, i32 30)
ret { i32, i1 } %b
}
+
+define { i32, i1 } @fold_with_distjoin_or(i32 %x) {
+; CHECK-LABEL: @fold_with_distjoin_or(
+; CHECK-NEXT: [[B:%.*]] = add i32 [[X:%.*]], 6
+; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i32, i1 } { i32 poison, i1 false }, i32 [[B]], 0
+; CHECK-NEXT: ret { i32, i1 } [[TMP1]]
+;
+ %a = or disjoint i32 %x, 13
+ %b = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %a, i32 -7)
+ ret { i32, i1 } %b
+}
+
+define { i32, i1 } @fold_with_disjoint_or2(i32 %x) {
+; CHECK-LABEL: @fold_with_disjoint_or2(
+; CHECK-NEXT: [[A:%.*]] = or disjoint i32 [[X:%.*]], 100
+; CHECK-NEXT: [[B:%.*]] = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 [[A]], i32 27)
+; CHECK-NEXT: ret { i32, i1 } [[B]]
+;
+ %a = or disjoint i32 %x, 100
+ %b = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %a, i32 27)
+ ret { i32, i1 } %b
+}
+
+define { i32, i1 } @fold_with_or_fail(i32 %x) {
+; CHECK-LABEL: @fold_with_or_fail(
+; CHECK-NEXT: [[A:%.*]] = or i32 [[X:%.*]], 100
+; CHECK-NEXT: [[B:%.*]] = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 [[A]], i32 27)
+; CHECK-NEXT: ret { i32, i1 } [[B]]
+;
+ %a = or i32 %x, 100
+ %b = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %a, i32 27)
+ ret { i32, i1 } %b
+}
diff --git a/llvm/test/Transforms/InstCombine/shift-add.ll b/llvm/test/Transforms/InstCombine/shift-add.ll
index 1b25675059930b..2be6d9b29d5269 100644
--- a/llvm/test/Transforms/InstCombine/shift-add.ll
+++ b/llvm/test/Transforms/InstCombine/shift-add.ll
@@ -775,3 +775,36 @@ define <3 x i32> @add3_i96(<3 x i32> %0, <3 x i32> %1) {
%25 = insertelement <3 x i32> %24, i32 %20, i32 2
ret <3 x i32> %25
}
+
+define i8 @shl_fold_or_disjoint_cnt(i8 %x) {
+; CHECK-LABEL: @shl_fold_or_disjoint_cnt(
+; CHECK-NEXT: [[A:%.*]] = or disjoint i8 [[X:%.*]], 3
+; CHECK-NEXT: [[R:%.*]] = shl i8 2, [[A]]
+; CHECK-NEXT: ret i8 [[R]]
+;
+ %a = or disjoint i8 %x, 3
+ %r = shl i8 2, %a
+ ret i8 %r
+}
+
+define <2 x i8> @ashr_fold_or_disjoint_cnt(<2 x i8> %x) {
+; CHECK-LABEL: @ashr_fold_or_disjoint_cnt(
+; CHECK-NEXT: [[A:%.*]] = or disjoint <2 x i8> [[X:%.*]], <i8 3, i8 1>
+; CHECK-NEXT: [[R:%.*]] = lshr <2 x i8> <i8 2, i8 3>, [[A]]
+; CHECK-NEXT: ret <2 x i8> [[R]]
+;
+ %a = or disjoint <2 x i8> %x, <i8 3, i8 1>
+ %r = ashr <2 x i8> <i8 2, i8 3>, %a
+ ret <2 x i8> %r
+}
+
+define <2 x i8> @lshr_fold_or_disjoint_cnt_out_of_bounds(<2 x i8> %x) {
+; CHECK-LABEL: @lshr_fold_or_disjoint_cnt_out_of_bounds(
+; CHECK-NEXT: [[A:%.*]] = or disjoint <2 x i8> [[X:%.*]], <i8 3, i8 8>
+; CHECK-NEXT: [[R:%.*]] = lshr <2 x i8> <i8 2, i8 3>, [[A]]
+; CHECK-NEXT: ret <2 x i8> [[R]]
+;
+ %a = or disjoint <2 x i8> %x, <i8 3, i8 8>
+ %r = lshr <2 x i8> <i8 2, i8 3>, %a
+ ret <2 x i8> %r
+}
diff --git a/llvm/test/Transforms/InstCombine/uadd-with-overflow.ll b/llvm/test/Transforms/InstCombine/uadd-with-overflow.ll
index 28d309baaa41d3..b1819e6c3e2b67 100644
--- a/llvm/test/Transforms/InstCombine/uadd-with-overflow.ll
+++ b/llvm/test/Transforms/InstCombine/uadd-with-overflow.ll
@@ -124,3 +124,27 @@ define { i32, i1 } @no_fold_wrapped_add(i32 %x) {
%b = tail call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 30, i32 %a)
ret { i32, i1 } %b
}
+
+
+define { <2 x i32>, <2 x i1> } @fold_simple_splat_with_disjoint_or_constant(<2 x i32> %x) {
+; CHECK-LABEL: @fold_simple_splat_with_disjoint_or_constant(
+; CHECK-NEXT: [[A:%.*]] = or disjoint <2 x i32> [[X:%.*]], <i32 12, i32 12>
+; CHECK-NEXT: [[B:%.*]] = tail call { <2 x i32>, <2 x i1> } @llvm.uadd.with.overflow.v2i32(<2 x i32> [[A]], <2 x i32> <i32 30, i32 30>)
+; CHECK-NEXT: ret { <2 x i32>, <2 x i1> } [[B]]
+;
+ %a = or disjoint <2 x i32> %x, <i32 12, i32 12>
+ %b = tail call { <2 x i32>, <2 x i1> } @llvm.uadd.with.overflow.v2i32(<2 x i32> %a, <2 x i32> <i32 30, i32 30>)
+ ret { <2 x i32>, <2 x i1> } %b
+}
+
+
+define { <2 x i32>, <2 x i1> } @fold_simple_splat_constant_with_or_fail(<2 x i32> %x) {
+; CHECK-LABEL: @fold_simple_splat_constant_with_or_fail(
+; CHECK-NEXT: [[A:%.*]] = or <2 x i32> [[X:%.*]], <i32 12, i32 12>
+; CHECK-NEXT: [[B:%.*]] = tail call { <2 x i32>, <2 x i1> } @llvm.uadd.with.overflow.v2i32(<2 x i32> [[A]], <2 x i32> <i32 30, i32 30>)
+; CHECK-NEXT: ret { <2 x i32>, <2 x i1> } [[B]]
+;
+ %a = or <2 x i32> %x, <i32 12, i32 12>
+ %b = tail call { <2 x i32>, <2 x i1> } @llvm.uadd.with.overflow.v2i32(<2 x i32> %a, <2 x i32> <i32 30, i32 30>)
+ ret { <2 x i32>, <2 x i1> } %b
+}
>From 1d8534f805901994b6b7700ae3fe59c8622a1207 Mon Sep 17 00:00:00 2001
From: Noah Goldstein <goldstein.w.n at gmail.com>
Date: Wed, 20 Mar 2024 22:09:33 -0500
Subject: [PATCH 3/5] [InstCombine] integrate `N{U,S}WAddLike` into existing
folds
Just went a quick replacement of `N{U,S}WAdd` with the `Like` variant
that old matches `or disjoint`
---
.../Transforms/InstCombine/InstCombineAddSub.cpp | 8 +++++---
.../Transforms/InstCombine/InstCombineCalls.cpp | 5 +++--
.../InstCombine/InstCombineMulDivRem.cpp | 8 ++++----
.../Transforms/InstCombine/InstCombineShifts.cpp | 2 +-
llvm/test/Transforms/InstCombine/add.ll | 15 ++++++---------
llvm/test/Transforms/InstCombine/div.ll | 8 ++------
.../Transforms/InstCombine/sadd-with-overflow.ll | 3 +--
llvm/test/Transforms/InstCombine/shift-add.ll | 10 +++-------
.../Transforms/InstCombine/uadd-with-overflow.ll | 3 +--
9 files changed, 26 insertions(+), 36 deletions(-)
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp b/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
index aaf7184a5562cd..a978e9a643f5e9 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
@@ -819,7 +819,7 @@ static Instruction *foldNoWrapAdd(BinaryOperator &Add,
Value *X;
const APInt *C1, *C2;
if (match(Op1, m_APInt(C1)) &&
- match(Op0, m_OneUse(m_ZExt(m_NUWAdd(m_Value(X), m_APInt(C2))))) &&
+ match(Op0, m_OneUse(m_ZExt(m_NUWAddLike(m_Value(X), m_APInt(C2))))) &&
C1->isNegative() && C1->sge(-C2->sext(C1->getBitWidth()))) {
Constant *NewC =
ConstantInt::get(X->getType(), *C2 + C1->trunc(C2->getBitWidth()));
@@ -829,14 +829,16 @@ static Instruction *foldNoWrapAdd(BinaryOperator &Add,
// More general combining of constants in the wide type.
// (sext (X +nsw NarrowC)) + C --> (sext X) + (sext(NarrowC) + C)
Constant *NarrowC;
- if (match(Op0, m_OneUse(m_SExt(m_NSWAdd(m_Value(X), m_Constant(NarrowC)))))) {
+ if (match(Op0,
+ m_OneUse(m_SExt(m_NSWAddLike(m_Value(X), m_Constant(NarrowC)))))) {
Value *WideC = Builder.CreateSExt(NarrowC, Ty);
Value *NewC = Builder.CreateAdd(WideC, Op1C);
Value *WideX = Builder.CreateSExt(X, Ty);
return BinaryOperator::CreateAdd(WideX, NewC);
}
// (zext (X +nuw NarrowC)) + C --> (zext X) + (zext(NarrowC) + C)
- if (match(Op0, m_OneUse(m_ZExt(m_NUWAdd(m_Value(X), m_Constant(NarrowC)))))) {
+ if (match(Op0,
+ m_OneUse(m_ZExt(m_NUWAddLike(m_Value(X), m_Constant(NarrowC)))))) {
Value *WideC = Builder.CreateZExt(NarrowC, Ty);
Value *NewC = Builder.CreateAdd(WideC, Op1C);
Value *WideX = Builder.CreateZExt(X, Ty);
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
index 426b548c074adf..526fe5d080599f 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
@@ -2093,8 +2093,9 @@ Instruction *InstCombinerImpl::visitCallInst(CallInst &CI) {
Value *Arg0 = II->getArgOperand(0);
Value *Arg1 = II->getArgOperand(1);
bool IsSigned = IID == Intrinsic::sadd_with_overflow;
- bool HasNWAdd = IsSigned ? match(Arg0, m_NSWAdd(m_Value(X), m_APInt(C0)))
- : match(Arg0, m_NUWAdd(m_Value(X), m_APInt(C0)));
+ bool HasNWAdd = IsSigned
+ ? match(Arg0, m_NSWAddLike(m_Value(X), m_APInt(C0)))
+ : match(Arg0, m_NUWAddLike(m_Value(X), m_APInt(C0)));
if (HasNWAdd && match(Arg1, m_APInt(C1))) {
bool Overflow;
APInt NewC =
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
index 9d4c271f990d19..345feeedc2707c 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
@@ -1160,14 +1160,14 @@ Instruction *InstCombinerImpl::commonIDivTransforms(BinaryOperator &I) {
// We need a multiple of the divisor for a signed add constant, but
// unsigned is fine with any constant pair.
if (IsSigned &&
- match(Op0, m_NSWAdd(m_NSWMul(m_Value(X), m_SpecificInt(*C2)),
- m_APInt(C1))) &&
+ match(Op0, m_NSWAddLike(m_NSWMul(m_Value(X), m_SpecificInt(*C2)),
+ m_APInt(C1))) &&
isMultiple(*C1, *C2, Quotient, IsSigned)) {
return BinaryOperator::CreateNSWAdd(X, ConstantInt::get(Ty, Quotient));
}
if (!IsSigned &&
- match(Op0, m_NUWAdd(m_NUWMul(m_Value(X), m_SpecificInt(*C2)),
- m_APInt(C1)))) {
+ match(Op0, m_NUWAddLike(m_NUWMul(m_Value(X), m_SpecificInt(*C2)),
+ m_APInt(C1)))) {
return BinaryOperator::CreateNUWAdd(X,
ConstantInt::get(Ty, C1->udiv(*C2)));
}
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
index eafd2889ec50bd..95aa2119e2d88b 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
@@ -437,7 +437,7 @@ Instruction *InstCombinerImpl::commonShiftTransforms(BinaryOperator &I) {
Value *A;
Constant *C, *C1;
if (match(Op0, m_Constant(C)) &&
- match(Op1, m_NUWAdd(m_Value(A), m_Constant(C1)))) {
+ match(Op1, m_NUWAddLike(m_Value(A), m_Constant(C1)))) {
Value *NewC = Builder.CreateBinOp(I.getOpcode(), C, C1);
BinaryOperator *NewShiftOp = BinaryOperator::Create(I.getOpcode(), NewC, A);
if (I.getOpcode() == Instruction::Shl) {
diff --git a/llvm/test/Transforms/InstCombine/add.ll b/llvm/test/Transforms/InstCombine/add.ll
index 846da7f760b1d4..ec3aca26514caf 100644
--- a/llvm/test/Transforms/InstCombine/add.ll
+++ b/llvm/test/Transforms/InstCombine/add.ll
@@ -3988,9 +3988,8 @@ define i32 @add_reduce_sqr_sum_varC_invalid2(i32 %a, i32 %b) {
define i32 @fold_sext_addition_or_disjoint(i8 %x) {
; CHECK-LABEL: @fold_sext_addition_or_disjoint(
-; CHECK-NEXT: [[XX:%.*]] = or disjoint i8 [[X:%.*]], 12
-; CHECK-NEXT: [[SE:%.*]] = sext i8 [[XX]] to i32
-; CHECK-NEXT: [[R:%.*]] = add nsw i32 [[SE]], 1234
+; CHECK-NEXT: [[SE:%.*]] = sext i8 [[XX:%.*]] to i32
+; CHECK-NEXT: [[R:%.*]] = add nsw i32 [[SE]], 1246
; CHECK-NEXT: ret i32 [[R]]
;
%xx = or disjoint i8 %x, 12
@@ -4014,9 +4013,8 @@ define i32 @fold_sext_addition_fail(i8 %x) {
define i32 @fold_zext_addition_or_disjoint(i8 %x) {
; CHECK-LABEL: @fold_zext_addition_or_disjoint(
-; CHECK-NEXT: [[XX:%.*]] = or disjoint i8 [[X:%.*]], 12
-; CHECK-NEXT: [[SE:%.*]] = zext i8 [[XX]] to i32
-; CHECK-NEXT: [[R:%.*]] = add nuw nsw i32 [[SE]], 1234
+; CHECK-NEXT: [[SE:%.*]] = zext i8 [[XX:%.*]] to i32
+; CHECK-NEXT: [[R:%.*]] = add nuw nsw i32 [[SE]], 1246
; CHECK-NEXT: ret i32 [[R]]
;
%xx = or disjoint i8 %x, 12
@@ -4027,10 +4025,9 @@ define i32 @fold_zext_addition_or_disjoint(i8 %x) {
define i32 @fold_zext_addition_or_disjoint2(i8 %x) {
; CHECK-LABEL: @fold_zext_addition_or_disjoint2(
-; CHECK-NEXT: [[XX:%.*]] = or disjoint i8 [[X:%.*]], 18
+; CHECK-NEXT: [[XX:%.*]] = add nuw i8 [[X:%.*]], 4
; CHECK-NEXT: [[SE:%.*]] = zext i8 [[XX]] to i32
-; CHECK-NEXT: [[R:%.*]] = add nsw i32 [[SE]], -14
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: ret i32 [[SE]]
;
%xx = or disjoint i8 %x, 18
%se = zext i8 %xx to i32
diff --git a/llvm/test/Transforms/InstCombine/div.ll b/llvm/test/Transforms/InstCombine/div.ll
index a4d604b329c3c2..e8a25ff44d0296 100644
--- a/llvm/test/Transforms/InstCombine/div.ll
+++ b/llvm/test/Transforms/InstCombine/div.ll
@@ -1813,9 +1813,7 @@ define i6 @udiv_distribute_mul_nsw_add_nuw(i6 %x) {
define i32 @fold_disjoint_or_over_sdiv(i32 %x) {
; CHECK-LABEL: @fold_disjoint_or_over_sdiv(
-; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[X:%.*]], 9
-; CHECK-NEXT: [[OR:%.*]] = or disjoint i32 [[MUL]], 81
-; CHECK-NEXT: [[R:%.*]] = sdiv i32 [[OR]], 9
+; CHECK-NEXT: [[R:%.*]] = add nsw i32 [[X:%.*]], 9
; CHECK-NEXT: ret i32 [[R]]
;
%mul = mul nsw i32 %x, 9
@@ -1826,9 +1824,7 @@ define i32 @fold_disjoint_or_over_sdiv(i32 %x) {
define i32 @fold_disjoint_or_over_udiv(i32 %x) {
; CHECK-LABEL: @fold_disjoint_or_over_udiv(
-; CHECK-NEXT: [[MUL:%.*]] = mul nuw i32 [[X:%.*]], 9
-; CHECK-NEXT: [[OR:%.*]] = or disjoint i32 [[MUL]], 81
-; CHECK-NEXT: [[R:%.*]] = udiv i32 [[OR]], 9
+; CHECK-NEXT: [[R:%.*]] = add nuw i32 [[X:%.*]], 9
; CHECK-NEXT: ret i32 [[R]]
;
%mul = mul nuw i32 %x, 9
diff --git a/llvm/test/Transforms/InstCombine/sadd-with-overflow.ll b/llvm/test/Transforms/InstCombine/sadd-with-overflow.ll
index 904dd480caafa6..729ca03ddfd150 100644
--- a/llvm/test/Transforms/InstCombine/sadd-with-overflow.ll
+++ b/llvm/test/Transforms/InstCombine/sadd-with-overflow.ll
@@ -136,8 +136,7 @@ define { i32, i1 } @fold_with_distjoin_or(i32 %x) {
define { i32, i1 } @fold_with_disjoint_or2(i32 %x) {
; CHECK-LABEL: @fold_with_disjoint_or2(
-; CHECK-NEXT: [[A:%.*]] = or disjoint i32 [[X:%.*]], 100
-; CHECK-NEXT: [[B:%.*]] = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 [[A]], i32 27)
+; CHECK-NEXT: [[B:%.*]] = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 [[X:%.*]], i32 127)
; CHECK-NEXT: ret { i32, i1 } [[B]]
;
%a = or disjoint i32 %x, 100
diff --git a/llvm/test/Transforms/InstCombine/shift-add.ll b/llvm/test/Transforms/InstCombine/shift-add.ll
index 2be6d9b29d5269..aa3a238e0949ce 100644
--- a/llvm/test/Transforms/InstCombine/shift-add.ll
+++ b/llvm/test/Transforms/InstCombine/shift-add.ll
@@ -778,8 +778,7 @@ define <3 x i32> @add3_i96(<3 x i32> %0, <3 x i32> %1) {
define i8 @shl_fold_or_disjoint_cnt(i8 %x) {
; CHECK-LABEL: @shl_fold_or_disjoint_cnt(
-; CHECK-NEXT: [[A:%.*]] = or disjoint i8 [[X:%.*]], 3
-; CHECK-NEXT: [[R:%.*]] = shl i8 2, [[A]]
+; CHECK-NEXT: [[R:%.*]] = shl i8 16, [[X:%.*]]
; CHECK-NEXT: ret i8 [[R]]
;
%a = or disjoint i8 %x, 3
@@ -789,8 +788,7 @@ define i8 @shl_fold_or_disjoint_cnt(i8 %x) {
define <2 x i8> @ashr_fold_or_disjoint_cnt(<2 x i8> %x) {
; CHECK-LABEL: @ashr_fold_or_disjoint_cnt(
-; CHECK-NEXT: [[A:%.*]] = or disjoint <2 x i8> [[X:%.*]], <i8 3, i8 1>
-; CHECK-NEXT: [[R:%.*]] = lshr <2 x i8> <i8 2, i8 3>, [[A]]
+; CHECK-NEXT: [[R:%.*]] = lshr <2 x i8> <i8 0, i8 1>, [[X:%.*]]
; CHECK-NEXT: ret <2 x i8> [[R]]
;
%a = or disjoint <2 x i8> %x, <i8 3, i8 1>
@@ -800,9 +798,7 @@ define <2 x i8> @ashr_fold_or_disjoint_cnt(<2 x i8> %x) {
define <2 x i8> @lshr_fold_or_disjoint_cnt_out_of_bounds(<2 x i8> %x) {
; CHECK-LABEL: @lshr_fold_or_disjoint_cnt_out_of_bounds(
-; CHECK-NEXT: [[A:%.*]] = or disjoint <2 x i8> [[X:%.*]], <i8 3, i8 8>
-; CHECK-NEXT: [[R:%.*]] = lshr <2 x i8> <i8 2, i8 3>, [[A]]
-; CHECK-NEXT: ret <2 x i8> [[R]]
+; CHECK-NEXT: ret <2 x i8> zeroinitializer
;
%a = or disjoint <2 x i8> %x, <i8 3, i8 8>
%r = lshr <2 x i8> <i8 2, i8 3>, %a
diff --git a/llvm/test/Transforms/InstCombine/uadd-with-overflow.ll b/llvm/test/Transforms/InstCombine/uadd-with-overflow.ll
index b1819e6c3e2b67..fd5d38bb38ddc7 100644
--- a/llvm/test/Transforms/InstCombine/uadd-with-overflow.ll
+++ b/llvm/test/Transforms/InstCombine/uadd-with-overflow.ll
@@ -128,8 +128,7 @@ define { i32, i1 } @no_fold_wrapped_add(i32 %x) {
define { <2 x i32>, <2 x i1> } @fold_simple_splat_with_disjoint_or_constant(<2 x i32> %x) {
; CHECK-LABEL: @fold_simple_splat_with_disjoint_or_constant(
-; CHECK-NEXT: [[A:%.*]] = or disjoint <2 x i32> [[X:%.*]], <i32 12, i32 12>
-; CHECK-NEXT: [[B:%.*]] = tail call { <2 x i32>, <2 x i1> } @llvm.uadd.with.overflow.v2i32(<2 x i32> [[A]], <2 x i32> <i32 30, i32 30>)
+; CHECK-NEXT: [[B:%.*]] = call { <2 x i32>, <2 x i1> } @llvm.uadd.with.overflow.v2i32(<2 x i32> [[X:%.*]], <2 x i32> <i32 42, i32 42>)
; CHECK-NEXT: ret { <2 x i32>, <2 x i1> } [[B]]
;
%a = or disjoint <2 x i32> %x, <i32 12, i32 12>
>From f2bd34b5e9aa96530bd8eb3141e134994e577d59 Mon Sep 17 00:00:00 2001
From: Noah Goldstein <goldstein.w.n at gmail.com>
Date: Wed, 20 Mar 2024 23:16:28 -0500
Subject: [PATCH 4/5] [ValueTracking] Add tests for deducing more conditions in
`isTruePredicate`; NFC
---
llvm/test/Transforms/InstCombine/implies.ll | 440 ++++++++++++++++++++
1 file changed, 440 insertions(+)
create mode 100644 llvm/test/Transforms/InstCombine/implies.ll
diff --git a/llvm/test/Transforms/InstCombine/implies.ll b/llvm/test/Transforms/InstCombine/implies.ll
new file mode 100644
index 00000000000000..6741d59f4fccfa
--- /dev/null
+++ b/llvm/test/Transforms/InstCombine/implies.ll
@@ -0,0 +1,440 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -passes=instcombine -S | FileCheck %s
+
+define i1 @or_implies_sle(i8 %x, i8 %y, i1 %other) {
+; CHECK-LABEL: @or_implies_sle(
+; CHECK-NEXT: [[OR:%.*]] = or i8 [[X:%.*]], 23
+; CHECK-NEXT: [[COND_NOT:%.*]] = icmp sgt i8 [[OR]], [[Y:%.*]]
+; CHECK-NEXT: br i1 [[COND_NOT]], label [[F:%.*]], label [[T:%.*]]
+; CHECK: T:
+; CHECK-NEXT: [[R:%.*]] = icmp sle i8 [[X]], [[Y]]
+; CHECK-NEXT: ret i1 [[R]]
+; CHECK: F:
+; CHECK-NEXT: ret i1 [[OTHER:%.*]]
+;
+ %or = or i8 %x, 23
+ %cond = icmp sle i8 %or, %y
+ br i1 %cond, label %T, label %F
+T:
+ %r = icmp sle i8 %x, %y
+ ret i1 %r
+F:
+ ret i1 %other
+}
+
+define i1 @or_implies_sle_fail(i8 %x, i8 %y, i1 %other) {
+; CHECK-LABEL: @or_implies_sle_fail(
+; CHECK-NEXT: [[OR:%.*]] = or i8 [[X:%.*]], -34
+; CHECK-NEXT: [[COND_NOT:%.*]] = icmp sgt i8 [[OR]], [[Y:%.*]]
+; CHECK-NEXT: br i1 [[COND_NOT]], label [[F:%.*]], label [[T:%.*]]
+; CHECK: T:
+; CHECK-NEXT: [[R:%.*]] = icmp sle i8 [[X]], [[Y]]
+; CHECK-NEXT: ret i1 [[R]]
+; CHECK: F:
+; CHECK-NEXT: ret i1 [[OTHER:%.*]]
+;
+ %or = or i8 %x, -34
+ %cond = icmp sle i8 %or, %y
+ br i1 %cond, label %T, label %F
+T:
+ %r = icmp sle i8 %x, %y
+ ret i1 %r
+F:
+ ret i1 %other
+}
+
+define i1 @or_distjoint_implies_ule(i8 %x, i8 %y, i1 %other) {
+; CHECK-LABEL: @or_distjoint_implies_ule(
+; CHECK-NEXT: [[X2:%.*]] = or disjoint i8 [[X:%.*]], 24
+; CHECK-NEXT: [[COND_NOT:%.*]] = icmp ugt i8 [[X2]], [[Y:%.*]]
+; CHECK-NEXT: br i1 [[COND_NOT]], label [[F:%.*]], label [[T:%.*]]
+; CHECK: T:
+; CHECK-NEXT: [[X1:%.*]] = or disjoint i8 [[X]], 23
+; CHECK-NEXT: [[R:%.*]] = icmp ule i8 [[X1]], [[Y]]
+; CHECK-NEXT: ret i1 [[R]]
+; CHECK: F:
+; CHECK-NEXT: ret i1 [[OTHER:%.*]]
+;
+ %x1 = or disjoint i8 %x, 23
+ %x2 = or disjoint i8 %x, 24
+
+ %cond = icmp ule i8 %x2, %y
+ br i1 %cond, label %T, label %F
+T:
+ %r = icmp ule i8 %x1, %y
+ ret i1 %r
+F:
+ ret i1 %other
+}
+
+define i1 @or_distjoint_implies_ule_fail(i8 %x, i8 %y, i1 %other) {
+; CHECK-LABEL: @or_distjoint_implies_ule_fail(
+; CHECK-NEXT: [[X2:%.*]] = or disjoint i8 [[X:%.*]], 24
+; CHECK-NEXT: [[COND_NOT:%.*]] = icmp ugt i8 [[X2]], [[Y:%.*]]
+; CHECK-NEXT: br i1 [[COND_NOT]], label [[F:%.*]], label [[T:%.*]]
+; CHECK: T:
+; CHECK-NEXT: [[X1:%.*]] = or disjoint i8 [[X]], 28
+; CHECK-NEXT: [[R:%.*]] = icmp ule i8 [[X1]], [[Y]]
+; CHECK-NEXT: ret i1 [[R]]
+; CHECK: F:
+; CHECK-NEXT: ret i1 [[OTHER:%.*]]
+;
+ %x1 = or disjoint i8 %x, 28
+ %x2 = or disjoint i8 %x, 24
+
+ %cond = icmp ule i8 %x2, %y
+ br i1 %cond, label %T, label %F
+T:
+ %r = icmp ule i8 %x1, %y
+ ret i1 %r
+F:
+ ret i1 %other
+}
+
+define i1 @or_prove_distjoin_implies_ule(i8 %xx, i8 %y, i1 %other) {
+; CHECK-LABEL: @or_prove_distjoin_implies_ule(
+; CHECK-NEXT: [[X:%.*]] = and i8 [[XX:%.*]], -16
+; CHECK-NEXT: [[X2:%.*]] = or disjoint i8 [[X]], 10
+; CHECK-NEXT: [[COND_NOT:%.*]] = icmp ugt i8 [[X2]], [[Y:%.*]]
+; CHECK-NEXT: br i1 [[COND_NOT]], label [[F:%.*]], label [[T:%.*]]
+; CHECK: T:
+; CHECK-NEXT: ret i1 true
+; CHECK: F:
+; CHECK-NEXT: ret i1 [[OTHER:%.*]]
+;
+ %x = and i8 %xx, -16
+ %x1 = or i8 %x, 7
+ %x2 = or i8 %x, 10
+
+ %cond = icmp ule i8 %x2, %y
+ br i1 %cond, label %T, label %F
+T:
+ %r = icmp ule i8 %x1, %y
+ ret i1 %r
+F:
+ ret i1 %other
+}
+
+define i1 @src_or_distjoint_implies_sle(i8 %x, i8 %y, i1 %other) {
+; CHECK-LABEL: @src_or_distjoint_implies_sle(
+; CHECK-NEXT: [[X2:%.*]] = or disjoint i8 [[X:%.*]], 24
+; CHECK-NEXT: [[COND_NOT:%.*]] = icmp sgt i8 [[X2]], [[Y:%.*]]
+; CHECK-NEXT: br i1 [[COND_NOT]], label [[F:%.*]], label [[T:%.*]]
+; CHECK: T:
+; CHECK-NEXT: [[X1:%.*]] = or disjoint i8 [[X]], 23
+; CHECK-NEXT: [[R:%.*]] = icmp sle i8 [[X1]], [[Y]]
+; CHECK-NEXT: ret i1 [[R]]
+; CHECK: F:
+; CHECK-NEXT: ret i1 [[OTHER:%.*]]
+;
+ %x1 = or disjoint i8 %x, 23
+ %x2 = or disjoint i8 %x, 24
+
+ %cond = icmp sle i8 %x2, %y
+ br i1 %cond, label %T, label %F
+T:
+ %r = icmp sle i8 %x1, %y
+ ret i1 %r
+F:
+ ret i1 %other
+}
+
+define i1 @src_or_distjoint_implies_sle_fail(i8 %x, i8 %y, i1 %other) {
+; CHECK-LABEL: @src_or_distjoint_implies_sle_fail(
+; CHECK-NEXT: [[X2:%.*]] = or disjoint i8 [[X:%.*]], 24
+; CHECK-NEXT: [[COND_NOT:%.*]] = icmp slt i8 [[X2]], [[Y:%.*]]
+; CHECK-NEXT: br i1 [[COND_NOT]], label [[F:%.*]], label [[T:%.*]]
+; CHECK: T:
+; CHECK-NEXT: [[X1:%.*]] = or disjoint i8 [[X]], 23
+; CHECK-NEXT: [[R:%.*]] = icmp sle i8 [[X1]], [[Y]]
+; CHECK-NEXT: ret i1 [[R]]
+; CHECK: F:
+; CHECK-NEXT: ret i1 [[OTHER:%.*]]
+;
+ %x1 = or disjoint i8 %x, 23
+ %x2 = or disjoint i8 %x, 24
+
+ %cond = icmp sle i8 %y, %x2
+ br i1 %cond, label %T, label %F
+T:
+ %r = icmp sle i8 %x1, %y
+ ret i1 %r
+F:
+ ret i1 %other
+}
+
+define i1 @src_addnsw_implies_sle(i8 %x, i8 %y, i1 %other) {
+; CHECK-LABEL: @src_addnsw_implies_sle(
+; CHECK-NEXT: [[X2:%.*]] = add nsw i8 [[X:%.*]], 24
+; CHECK-NEXT: [[COND_NOT:%.*]] = icmp sgt i8 [[X2]], [[Y:%.*]]
+; CHECK-NEXT: br i1 [[COND_NOT]], label [[F:%.*]], label [[T:%.*]]
+; CHECK: T:
+; CHECK-NEXT: [[X1:%.*]] = add nsw i8 [[X]], 23
+; CHECK-NEXT: [[R:%.*]] = icmp sle i8 [[X1]], [[Y]]
+; CHECK-NEXT: ret i1 [[R]]
+; CHECK: F:
+; CHECK-NEXT: ret i1 [[OTHER:%.*]]
+;
+ %x1 = add nsw i8 %x, 23
+ %x2 = add nsw i8 %x, 24
+
+ %cond = icmp sle i8 %x2, %y
+ br i1 %cond, label %T, label %F
+T:
+ %r = icmp sle i8 %x1, %y
+ ret i1 %r
+F:
+ ret i1 %other
+}
+
+define i1 @src_addnsw_implies_sle_fail(i8 %x, i8 %y, i1 %other) {
+; CHECK-LABEL: @src_addnsw_implies_sle_fail(
+; CHECK-NEXT: [[X2:%.*]] = add nsw i8 [[X:%.*]], 23
+; CHECK-NEXT: [[COND_NOT:%.*]] = icmp sgt i8 [[X2]], [[Y:%.*]]
+; CHECK-NEXT: br i1 [[COND_NOT]], label [[F:%.*]], label [[T:%.*]]
+; CHECK: T:
+; CHECK-NEXT: [[X1:%.*]] = add nsw i8 [[X]], 24
+; CHECK-NEXT: [[R:%.*]] = icmp sle i8 [[X1]], [[Y]]
+; CHECK-NEXT: ret i1 [[R]]
+; CHECK: F:
+; CHECK-NEXT: ret i1 [[OTHER:%.*]]
+;
+ %x1 = add nsw i8 %x, 24
+ %x2 = add nsw i8 %x, 23
+
+ %cond = icmp sle i8 %x2, %y
+ br i1 %cond, label %T, label %F
+T:
+ %r = icmp sle i8 %x1, %y
+ ret i1 %r
+F:
+ ret i1 %other
+}
+
+define i1 @src_and_implies_ult(i8 %x, i8 %y, i8 %z, i1 %other) {
+; CHECK-LABEL: @src_and_implies_ult(
+; CHECK-NEXT: [[COND:%.*]] = icmp ult i8 [[X:%.*]], [[Z:%.*]]
+; CHECK-NEXT: br i1 [[COND]], label [[T:%.*]], label [[F:%.*]]
+; CHECK: T:
+; CHECK-NEXT: [[AND:%.*]] = and i8 [[Z]], [[X]]
+; CHECK-NEXT: [[R:%.*]] = icmp ne i8 [[AND]], [[Z]]
+; CHECK-NEXT: ret i1 [[R]]
+; CHECK: F:
+; CHECK-NEXT: ret i1 [[OTHER:%.*]]
+;
+ %cond = icmp ult i8 %x, %z
+ br i1 %cond, label %T, label %F
+T:
+ %and = and i8 %z, %x
+ %r = icmp ult i8 %and, %z
+ ret i1 %r
+F:
+ ret i1 %other
+}
+
+define i1 @src_and_implies_ult_fail(i8 %x, i8 %y, i8 %z, i1 %other) {
+; CHECK-LABEL: @src_and_implies_ult_fail(
+; CHECK-NEXT: [[COND_NOT:%.*]] = icmp ugt i8 [[X:%.*]], [[Z:%.*]]
+; CHECK-NEXT: br i1 [[COND_NOT]], label [[F:%.*]], label [[T:%.*]]
+; CHECK: T:
+; CHECK-NEXT: [[AND:%.*]] = and i8 [[X]], [[Z]]
+; CHECK-NEXT: [[R:%.*]] = icmp ne i8 [[AND]], [[Z]]
+; CHECK-NEXT: ret i1 [[R]]
+; CHECK: F:
+; CHECK-NEXT: ret i1 [[OTHER:%.*]]
+;
+ %cond = icmp ule i8 %x, %z
+ br i1 %cond, label %T, label %F
+T:
+ %and = and i8 %x, %z
+ %r = icmp ult i8 %and, %z
+ ret i1 %r
+F:
+ ret i1 %other
+}
+
+define i1 @src_and_implies_slt_fail(i8 %x, i8 %y, i8 %z, i1 %other) {
+; CHECK-LABEL: @src_and_implies_slt_fail(
+; CHECK-NEXT: [[COND:%.*]] = icmp slt i8 [[X:%.*]], [[Z:%.*]]
+; CHECK-NEXT: br i1 [[COND]], label [[T:%.*]], label [[F:%.*]]
+; CHECK: T:
+; CHECK-NEXT: [[AND:%.*]] = and i8 [[X]], [[Y:%.*]]
+; CHECK-NEXT: [[R:%.*]] = icmp slt i8 [[AND]], [[Z]]
+; CHECK-NEXT: ret i1 [[R]]
+; CHECK: F:
+; CHECK-NEXT: ret i1 [[OTHER:%.*]]
+;
+ %cond = icmp slt i8 %x, %z
+ br i1 %cond, label %T, label %F
+T:
+ %and = and i8 %x, %y
+ %r = icmp slt i8 %and, %z
+ ret i1 %r
+F:
+ ret i1 %other
+}
+
+define i1 @src_or_implies_ule(i8 %x, i8 %y, i8 %z, i1 %other) {
+; CHECK-LABEL: @src_or_implies_ule(
+; CHECK-NEXT: [[OR:%.*]] = or i8 [[Y:%.*]], [[X:%.*]]
+; CHECK-NEXT: [[COND_NOT:%.*]] = icmp ugt i8 [[OR]], [[Z:%.*]]
+; CHECK-NEXT: br i1 [[COND_NOT]], label [[F:%.*]], label [[T:%.*]]
+; CHECK: T:
+; CHECK-NEXT: [[R:%.*]] = icmp ule i8 [[X]], [[Z]]
+; CHECK-NEXT: ret i1 [[R]]
+; CHECK: F:
+; CHECK-NEXT: ret i1 [[OTHER:%.*]]
+;
+ %or = or i8 %y, %x
+ %cond = icmp uge i8 %z, %or
+ br i1 %cond, label %T, label %F
+T:
+ %r = icmp ule i8 %x, %z
+ ret i1 %r
+F:
+ ret i1 %other
+}
+
+define i1 @src_or_implies_false_ugt_todo(i8 %x, i8 %y, i8 %z, i1 %other) {
+; CHECK-LABEL: @src_or_implies_false_ugt_todo(
+; CHECK-NEXT: [[OR:%.*]] = or i8 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: [[COND:%.*]] = icmp ugt i8 [[OR]], [[Z:%.*]]
+; CHECK-NEXT: br i1 [[COND]], label [[T:%.*]], label [[F:%.*]]
+; CHECK: T:
+; CHECK-NEXT: ret i1 [[OTHER:%.*]]
+; CHECK: F:
+; CHECK-NEXT: [[R:%.*]] = icmp ugt i8 [[X]], [[Z]]
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %or = or i8 %x, %y
+ %cond = icmp ugt i8 %or, %z
+ br i1 %cond, label %T, label %F
+T:
+ ret i1 %other
+F:
+ %r = icmp ugt i8 %x, %z
+ ret i1 %r
+
+}
+
+define i1 @src_udiv_implies_ult(i8 %x, i8 %z, i1 %other) {
+; CHECK-LABEL: @src_udiv_implies_ult(
+; CHECK-NEXT: [[COND:%.*]] = icmp ugt i8 [[Z:%.*]], [[X:%.*]]
+; CHECK-NEXT: br i1 [[COND]], label [[T:%.*]], label [[F:%.*]]
+; CHECK: T:
+; CHECK-NEXT: [[AND:%.*]] = udiv i8 [[X]], 3
+; CHECK-NEXT: [[R:%.*]] = icmp ult i8 [[AND]], [[Z]]
+; CHECK-NEXT: ret i1 [[R]]
+; CHECK: F:
+; CHECK-NEXT: ret i1 [[OTHER:%.*]]
+;
+ %cond = icmp ugt i8 %z, %x
+ br i1 %cond, label %T, label %F
+T:
+ %and = udiv i8 %x, 3
+ %r = icmp ult i8 %and, %z
+ ret i1 %r
+F:
+ ret i1 %other
+}
+
+define i1 @src_udiv_implies_ult2(i8 %x, i8 %z, i1 %other) {
+; CHECK-LABEL: @src_udiv_implies_ult2(
+; CHECK-NEXT: [[COND_NOT:%.*]] = icmp ugt i8 [[Z:%.*]], [[X:%.*]]
+; CHECK-NEXT: br i1 [[COND_NOT]], label [[F:%.*]], label [[T:%.*]]
+; CHECK: T:
+; CHECK-NEXT: ret i1 [[OTHER:%.*]]
+; CHECK: F:
+; CHECK-NEXT: [[AND:%.*]] = udiv i8 [[X]], 3
+; CHECK-NEXT: [[R:%.*]] = icmp ult i8 [[AND]], [[Z]]
+; CHECK-NEXT: ret i1 [[R]]
+;
+ %cond = icmp ule i8 %z, %x
+ br i1 %cond, label %T, label %F
+T:
+ ret i1 %other
+F:
+ %and = udiv i8 %x, 3
+ %r = icmp ult i8 %and, %z
+ ret i1 %r
+}
+
+define i1 @src_smin_implies_sle(i8 %x, i8 %y, i8 %z, i1 %other) {
+; CHECK-LABEL: @src_smin_implies_sle(
+; CHECK-NEXT: [[COND_NOT:%.*]] = icmp sgt i8 [[X:%.*]], [[Z:%.*]]
+; CHECK-NEXT: br i1 [[COND_NOT]], label [[F:%.*]], label [[T:%.*]]
+; CHECK: T:
+; CHECK-NEXT: ret i1 true
+; CHECK: F:
+; CHECK-NEXT: ret i1 [[OTHER:%.*]]
+;
+ %cond = icmp sle i8 %x, %z
+ br i1 %cond, label %T, label %F
+T:
+ %um = call i8 @llvm.smin.i8(i8 %x, i8 %y)
+ %r = icmp sle i8 %um, %z
+ ret i1 %r
+F:
+ ret i1 %other
+}
+
+define i1 @src_umin_implies_ule(i8 %x, i8 %y, i8 %z, i1 %other) {
+; CHECK-LABEL: @src_umin_implies_ule(
+; CHECK-NEXT: [[COND_NOT:%.*]] = icmp ugt i8 [[X:%.*]], [[Z:%.*]]
+; CHECK-NEXT: br i1 [[COND_NOT]], label [[F:%.*]], label [[T:%.*]]
+; CHECK: T:
+; CHECK-NEXT: ret i1 true
+; CHECK: F:
+; CHECK-NEXT: ret i1 [[OTHER:%.*]]
+;
+ %cond = icmp ule i8 %x, %z
+ br i1 %cond, label %T, label %F
+T:
+ %um = call i8 @llvm.umin.i8(i8 %x, i8 %y)
+ %r = icmp ule i8 %um, %z
+ ret i1 %r
+F:
+ ret i1 %other
+}
+
+define i1 @src_umax_implies_ule(i8 %x, i8 %y, i8 %z, i1 %other) {
+; CHECK-LABEL: @src_umax_implies_ule(
+; CHECK-NEXT: [[UM:%.*]] = call i8 @llvm.umax.i8(i8 [[X:%.*]], i8 [[Y:%.*]])
+; CHECK-NEXT: [[COND_NOT:%.*]] = icmp ugt i8 [[UM]], [[Z:%.*]]
+; CHECK-NEXT: br i1 [[COND_NOT]], label [[F:%.*]], label [[T:%.*]]
+; CHECK: T:
+; CHECK-NEXT: [[R:%.*]] = icmp ule i8 [[X]], [[Z]]
+; CHECK-NEXT: ret i1 [[R]]
+; CHECK: F:
+; CHECK-NEXT: ret i1 [[OTHER:%.*]]
+;
+ %um = call i8 @llvm.umax.i8(i8 %x, i8 %y)
+ %cond = icmp ule i8 %um, %z
+ br i1 %cond, label %T, label %F
+T:
+ %r = icmp ule i8 %x, %z
+ ret i1 %r
+F:
+ ret i1 %other
+}
+
+define i1 @src_smax_implies_sle(i8 %x, i8 %y, i8 %z, i1 %other) {
+; CHECK-LABEL: @src_smax_implies_sle(
+; CHECK-NEXT: [[UM:%.*]] = call i8 @llvm.smax.i8(i8 [[X:%.*]], i8 [[Y:%.*]])
+; CHECK-NEXT: [[COND_NOT:%.*]] = icmp sgt i8 [[UM]], [[Z:%.*]]
+; CHECK-NEXT: br i1 [[COND_NOT]], label [[F:%.*]], label [[T:%.*]]
+; CHECK: T:
+; CHECK-NEXT: [[R:%.*]] = icmp sle i8 [[X]], [[Z]]
+; CHECK-NEXT: ret i1 [[R]]
+; CHECK: F:
+; CHECK-NEXT: ret i1 [[OTHER:%.*]]
+;
+ %um = call i8 @llvm.smax.i8(i8 %x, i8 %y)
+ %cond = icmp sle i8 %um, %z
+ br i1 %cond, label %T, label %F
+T:
+ %r = icmp sle i8 %x, %z
+ ret i1 %r
+F:
+ ret i1 %other
+}
>From cc9138151deeec5df38b98cf0b124c9fa2a282a2 Mon Sep 17 00:00:00 2001
From: Noah Goldstein <goldstein.w.n at gmail.com>
Date: Wed, 20 Mar 2024 22:08:22 -0500
Subject: [PATCH 5/5] [ValueTracking] Add more conditions in to
`isTruePredicate`
There is one notable "regression". This patch replaces the bespoke `or
disjoint` logic we a direct match. This means we fail some
simplification during `instsimplify`.
All the cases we fail in `instsimplify` we do handle in `instcombine`
as we add `disjoint` flags.
Other than that, just some basic cases.
See proofs: https://alive2.llvm.org/ce/z/_-g7C8
---
llvm/lib/Analysis/ValueTracking.cpp | 88 ++++++++++++--------
llvm/test/Transforms/InstCombine/implies.ll | 36 +++-----
llvm/test/Transforms/InstSimplify/implies.ll | 16 +++-
3 files changed, 77 insertions(+), 63 deletions(-)
diff --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp
index 797665cf06c875..c7c151a1e9cf25 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -8390,8 +8390,7 @@ bool llvm::matchSimpleRecurrence(const BinaryOperator *I, PHINode *&P,
/// Return true if "icmp Pred LHS RHS" is always true.
static bool isTruePredicate(CmpInst::Predicate Pred, const Value *LHS,
- const Value *RHS, const DataLayout &DL,
- unsigned Depth) {
+ const Value *RHS, const DataLayout &DL) {
if (ICmpInst::isTrueWhenEqual(Pred) && LHS == RHS)
return true;
@@ -8403,8 +8402,26 @@ static bool isTruePredicate(CmpInst::Predicate Pred, const Value *LHS,
const APInt *C;
// LHS s<= LHS +_{nsw} C if C >= 0
- if (match(RHS, m_NSWAdd(m_Specific(LHS), m_APInt(C))))
+ // LHS s<= LHS | C if C >= 0
+ if (match(RHS, m_NSWAdd(m_Specific(LHS), m_APInt(C))) ||
+ match(RHS, m_Or(m_Specific(LHS), m_APInt(C))))
return !C->isNegative();
+
+ // LHS s<= smax(LHS, V) for any V
+ if (match(RHS, m_c_SMax(m_Specific(LHS), m_Value())))
+ return true;
+
+ // smin(RHS, V) s<= RHS for any V
+ if (match(LHS, m_c_SMin(m_Specific(RHS), m_Value())))
+ return true;
+
+ // Match A to (X +_{nsw} CA) and B to (X +_{nsw} CB)
+ const Value *X;
+ const APInt *CLHS, *CRHS;
+ if (match(LHS, m_NSWAddLike(m_Value(X), m_APInt(CLHS))) &&
+ match(RHS, m_NSWAddLike(m_Specific(X), m_APInt(CRHS))))
+ return CLHS->sle(*CRHS);
+
return false;
}
@@ -8414,34 +8431,36 @@ static bool isTruePredicate(CmpInst::Predicate Pred, const Value *LHS,
cast<OverflowingBinaryOperator>(RHS)->hasNoUnsignedWrap())
return true;
+ // LHS u<= LHS | V for any V
+ if (match(RHS, m_c_Or(m_Specific(LHS), m_Value())))
+ return true;
+
+ // LHS u<= umax(LHS, V) for any V
+ if (match(RHS, m_c_UMax(m_Specific(LHS), m_Value())))
+ return true;
+
// RHS >> V u<= RHS for any V
if (match(LHS, m_LShr(m_Specific(RHS), m_Value())))
return true;
- // Match A to (X +_{nuw} CA) and B to (X +_{nuw} CB)
- auto MatchNUWAddsToSameValue = [&](const Value *A, const Value *B,
- const Value *&X,
- const APInt *&CA, const APInt *&CB) {
- if (match(A, m_NUWAdd(m_Value(X), m_APInt(CA))) &&
- match(B, m_NUWAdd(m_Specific(X), m_APInt(CB))))
- return true;
+ // RHS u/ C_ugt_1 u<= RHS
+ const APInt *C;
+ if (match(LHS, m_UDiv(m_Specific(RHS), m_APInt(C))) && C->ugt(1))
+ return true;
- // If X & C == 0 then (X | C) == X +_{nuw} C
- if (match(A, m_Or(m_Value(X), m_APInt(CA))) &&
- match(B, m_Or(m_Specific(X), m_APInt(CB)))) {
- KnownBits Known(CA->getBitWidth());
- computeKnownBits(X, Known, DL, Depth + 1, /*AC*/ nullptr,
- /*CxtI*/ nullptr, /*DT*/ nullptr);
- if (CA->isSubsetOf(Known.Zero) && CB->isSubsetOf(Known.Zero))
- return true;
- }
+ // RHS & V u<= RHS for any V
+ if (match(LHS, m_c_And(m_Specific(RHS), m_Value())))
+ return true;
- return false;
- };
+ // umin(RHS, V) u<= RHS for any V
+ if (match(LHS, m_c_UMin(m_Specific(RHS), m_Value())))
+ return true;
+ // Match A to (X +_{nuw} CA) and B to (X +_{nuw} CB)
const Value *X;
const APInt *CLHS, *CRHS;
- if (MatchNUWAddsToSameValue(LHS, RHS, X, CLHS, CRHS))
+ if (match(LHS, m_NUWAddLike(m_Value(X), m_APInt(CLHS))) &&
+ match(RHS, m_NUWAddLike(m_Specific(X), m_APInt(CRHS))))
return CLHS->ule(*CRHS);
return false;
@@ -8454,36 +8473,36 @@ static bool isTruePredicate(CmpInst::Predicate Pred, const Value *LHS,
static std::optional<bool>
isImpliedCondOperands(CmpInst::Predicate Pred, const Value *ALHS,
const Value *ARHS, const Value *BLHS, const Value *BRHS,
- const DataLayout &DL, unsigned Depth) {
+ const DataLayout &DL) {
switch (Pred) {
default:
return std::nullopt;
case CmpInst::ICMP_SLT:
case CmpInst::ICMP_SLE:
- if (isTruePredicate(CmpInst::ICMP_SLE, BLHS, ALHS, DL, Depth) &&
- isTruePredicate(CmpInst::ICMP_SLE, ARHS, BRHS, DL, Depth))
+ if (isTruePredicate(CmpInst::ICMP_SLE, BLHS, ALHS, DL) &&
+ isTruePredicate(CmpInst::ICMP_SLE, ARHS, BRHS, DL))
return true;
return std::nullopt;
case CmpInst::ICMP_SGT:
case CmpInst::ICMP_SGE:
- if (isTruePredicate(CmpInst::ICMP_SLE, ALHS, BLHS, DL, Depth) &&
- isTruePredicate(CmpInst::ICMP_SLE, BRHS, ARHS, DL, Depth))
+ if (isTruePredicate(CmpInst::ICMP_SLE, ALHS, BLHS, DL) &&
+ isTruePredicate(CmpInst::ICMP_SLE, BRHS, ARHS, DL))
return true;
return std::nullopt;
case CmpInst::ICMP_ULT:
case CmpInst::ICMP_ULE:
- if (isTruePredicate(CmpInst::ICMP_ULE, BLHS, ALHS, DL, Depth) &&
- isTruePredicate(CmpInst::ICMP_ULE, ARHS, BRHS, DL, Depth))
+ if (isTruePredicate(CmpInst::ICMP_ULE, BLHS, ALHS, DL) &&
+ isTruePredicate(CmpInst::ICMP_ULE, ARHS, BRHS, DL))
return true;
return std::nullopt;
case CmpInst::ICMP_UGT:
case CmpInst::ICMP_UGE:
- if (isTruePredicate(CmpInst::ICMP_ULE, ALHS, BLHS, DL, Depth) &&
- isTruePredicate(CmpInst::ICMP_ULE, BRHS, ARHS, DL, Depth))
+ if (isTruePredicate(CmpInst::ICMP_ULE, ALHS, BLHS, DL) &&
+ isTruePredicate(CmpInst::ICMP_ULE, BRHS, ARHS, DL))
return true;
return std::nullopt;
}
@@ -8527,7 +8546,7 @@ static std::optional<bool> isImpliedCondICmps(const ICmpInst *LHS,
CmpInst::Predicate RPred,
const Value *R0, const Value *R1,
const DataLayout &DL,
- bool LHSIsTrue, unsigned Depth) {
+ bool LHSIsTrue) {
Value *L0 = LHS->getOperand(0);
Value *L1 = LHS->getOperand(1);
@@ -8574,7 +8593,7 @@ static std::optional<bool> isImpliedCondICmps(const ICmpInst *LHS,
return LPred == RPred;
if (LPred == RPred)
- return isImpliedCondOperands(LPred, L0, L1, R0, R1, DL, Depth);
+ return isImpliedCondOperands(LPred, L0, L1, R0, R1, DL);
return std::nullopt;
}
@@ -8636,8 +8655,7 @@ llvm::isImpliedCondition(const Value *LHS, CmpInst::Predicate RHSPred,
// Both LHS and RHS are icmps.
const ICmpInst *LHSCmp = dyn_cast<ICmpInst>(LHS);
if (LHSCmp)
- return isImpliedCondICmps(LHSCmp, RHSPred, RHSOp0, RHSOp1, DL, LHSIsTrue,
- Depth);
+ return isImpliedCondICmps(LHSCmp, RHSPred, RHSOp0, RHSOp1, DL, LHSIsTrue);
/// The LHS should be an 'or', 'and', or a 'select' instruction. We expect
/// the RHS to be an icmp.
diff --git a/llvm/test/Transforms/InstCombine/implies.ll b/llvm/test/Transforms/InstCombine/implies.ll
index 6741d59f4fccfa..c02d84d3f83711 100644
--- a/llvm/test/Transforms/InstCombine/implies.ll
+++ b/llvm/test/Transforms/InstCombine/implies.ll
@@ -7,8 +7,7 @@ define i1 @or_implies_sle(i8 %x, i8 %y, i1 %other) {
; CHECK-NEXT: [[COND_NOT:%.*]] = icmp sgt i8 [[OR]], [[Y:%.*]]
; CHECK-NEXT: br i1 [[COND_NOT]], label [[F:%.*]], label [[T:%.*]]
; CHECK: T:
-; CHECK-NEXT: [[R:%.*]] = icmp sle i8 [[X]], [[Y]]
-; CHECK-NEXT: ret i1 [[R]]
+; CHECK-NEXT: ret i1 true
; CHECK: F:
; CHECK-NEXT: ret i1 [[OTHER:%.*]]
;
@@ -49,9 +48,7 @@ define i1 @or_distjoint_implies_ule(i8 %x, i8 %y, i1 %other) {
; CHECK-NEXT: [[COND_NOT:%.*]] = icmp ugt i8 [[X2]], [[Y:%.*]]
; CHECK-NEXT: br i1 [[COND_NOT]], label [[F:%.*]], label [[T:%.*]]
; CHECK: T:
-; CHECK-NEXT: [[X1:%.*]] = or disjoint i8 [[X]], 23
-; CHECK-NEXT: [[R:%.*]] = icmp ule i8 [[X1]], [[Y]]
-; CHECK-NEXT: ret i1 [[R]]
+; CHECK-NEXT: ret i1 true
; CHECK: F:
; CHECK-NEXT: ret i1 [[OTHER:%.*]]
;
@@ -121,9 +118,7 @@ define i1 @src_or_distjoint_implies_sle(i8 %x, i8 %y, i1 %other) {
; CHECK-NEXT: [[COND_NOT:%.*]] = icmp sgt i8 [[X2]], [[Y:%.*]]
; CHECK-NEXT: br i1 [[COND_NOT]], label [[F:%.*]], label [[T:%.*]]
; CHECK: T:
-; CHECK-NEXT: [[X1:%.*]] = or disjoint i8 [[X]], 23
-; CHECK-NEXT: [[R:%.*]] = icmp sle i8 [[X1]], [[Y]]
-; CHECK-NEXT: ret i1 [[R]]
+; CHECK-NEXT: ret i1 true
; CHECK: F:
; CHECK-NEXT: ret i1 [[OTHER:%.*]]
;
@@ -169,9 +164,7 @@ define i1 @src_addnsw_implies_sle(i8 %x, i8 %y, i1 %other) {
; CHECK-NEXT: [[COND_NOT:%.*]] = icmp sgt i8 [[X2]], [[Y:%.*]]
; CHECK-NEXT: br i1 [[COND_NOT]], label [[F:%.*]], label [[T:%.*]]
; CHECK: T:
-; CHECK-NEXT: [[X1:%.*]] = add nsw i8 [[X]], 23
-; CHECK-NEXT: [[R:%.*]] = icmp sle i8 [[X1]], [[Y]]
-; CHECK-NEXT: ret i1 [[R]]
+; CHECK-NEXT: ret i1 true
; CHECK: F:
; CHECK-NEXT: ret i1 [[OTHER:%.*]]
;
@@ -216,9 +209,7 @@ define i1 @src_and_implies_ult(i8 %x, i8 %y, i8 %z, i1 %other) {
; CHECK-NEXT: [[COND:%.*]] = icmp ult i8 [[X:%.*]], [[Z:%.*]]
; CHECK-NEXT: br i1 [[COND]], label [[T:%.*]], label [[F:%.*]]
; CHECK: T:
-; CHECK-NEXT: [[AND:%.*]] = and i8 [[Z]], [[X]]
-; CHECK-NEXT: [[R:%.*]] = icmp ne i8 [[AND]], [[Z]]
-; CHECK-NEXT: ret i1 [[R]]
+; CHECK-NEXT: ret i1 true
; CHECK: F:
; CHECK-NEXT: ret i1 [[OTHER:%.*]]
;
@@ -280,8 +271,7 @@ define i1 @src_or_implies_ule(i8 %x, i8 %y, i8 %z, i1 %other) {
; CHECK-NEXT: [[COND_NOT:%.*]] = icmp ugt i8 [[OR]], [[Z:%.*]]
; CHECK-NEXT: br i1 [[COND_NOT]], label [[F:%.*]], label [[T:%.*]]
; CHECK: T:
-; CHECK-NEXT: [[R:%.*]] = icmp ule i8 [[X]], [[Z]]
-; CHECK-NEXT: ret i1 [[R]]
+; CHECK-NEXT: ret i1 true
; CHECK: F:
; CHECK-NEXT: ret i1 [[OTHER:%.*]]
;
@@ -322,9 +312,7 @@ define i1 @src_udiv_implies_ult(i8 %x, i8 %z, i1 %other) {
; CHECK-NEXT: [[COND:%.*]] = icmp ugt i8 [[Z:%.*]], [[X:%.*]]
; CHECK-NEXT: br i1 [[COND]], label [[T:%.*]], label [[F:%.*]]
; CHECK: T:
-; CHECK-NEXT: [[AND:%.*]] = udiv i8 [[X]], 3
-; CHECK-NEXT: [[R:%.*]] = icmp ult i8 [[AND]], [[Z]]
-; CHECK-NEXT: ret i1 [[R]]
+; CHECK-NEXT: ret i1 true
; CHECK: F:
; CHECK-NEXT: ret i1 [[OTHER:%.*]]
;
@@ -345,9 +333,7 @@ define i1 @src_udiv_implies_ult2(i8 %x, i8 %z, i1 %other) {
; CHECK: T:
; CHECK-NEXT: ret i1 [[OTHER:%.*]]
; CHECK: F:
-; CHECK-NEXT: [[AND:%.*]] = udiv i8 [[X]], 3
-; CHECK-NEXT: [[R:%.*]] = icmp ult i8 [[AND]], [[Z]]
-; CHECK-NEXT: ret i1 [[R]]
+; CHECK-NEXT: ret i1 true
;
%cond = icmp ule i8 %z, %x
br i1 %cond, label %T, label %F
@@ -403,8 +389,7 @@ define i1 @src_umax_implies_ule(i8 %x, i8 %y, i8 %z, i1 %other) {
; CHECK-NEXT: [[COND_NOT:%.*]] = icmp ugt i8 [[UM]], [[Z:%.*]]
; CHECK-NEXT: br i1 [[COND_NOT]], label [[F:%.*]], label [[T:%.*]]
; CHECK: T:
-; CHECK-NEXT: [[R:%.*]] = icmp ule i8 [[X]], [[Z]]
-; CHECK-NEXT: ret i1 [[R]]
+; CHECK-NEXT: ret i1 true
; CHECK: F:
; CHECK-NEXT: ret i1 [[OTHER:%.*]]
;
@@ -424,8 +409,7 @@ define i1 @src_smax_implies_sle(i8 %x, i8 %y, i8 %z, i1 %other) {
; CHECK-NEXT: [[COND_NOT:%.*]] = icmp sgt i8 [[UM]], [[Z:%.*]]
; CHECK-NEXT: br i1 [[COND_NOT]], label [[F:%.*]], label [[T:%.*]]
; CHECK: T:
-; CHECK-NEXT: [[R:%.*]] = icmp sle i8 [[X]], [[Z]]
-; CHECK-NEXT: ret i1 [[R]]
+; CHECK-NEXT: ret i1 true
; CHECK: F:
; CHECK-NEXT: ret i1 [[OTHER:%.*]]
;
diff --git a/llvm/test/Transforms/InstSimplify/implies.ll b/llvm/test/Transforms/InstSimplify/implies.ll
index b70dc90da655ef..e29bdb587340c9 100644
--- a/llvm/test/Transforms/InstSimplify/implies.ll
+++ b/llvm/test/Transforms/InstSimplify/implies.ll
@@ -155,7 +155,13 @@ define i1 @test9(i32 %length.i, i32 %i) {
define i1 @test10(i32 %length.i, i32 %x.full) {
; CHECK-LABEL: @test10(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[X:%.*]] = and i32 [[X_FULL:%.*]], -65536
+; CHECK-NEXT: [[LARGE:%.*]] = or i32 [[X]], 100
+; CHECK-NEXT: [[SMALL:%.*]] = or i32 [[X]], 90
+; CHECK-NEXT: [[KNOWN:%.*]] = icmp ult i32 [[LARGE]], [[LENGTH_I:%.*]]
+; CHECK-NEXT: [[TO_PROVE:%.*]] = icmp ult i32 [[SMALL]], [[LENGTH_I]]
+; CHECK-NEXT: [[RES:%.*]] = icmp ule i1 [[KNOWN]], [[TO_PROVE]]
+; CHECK-NEXT: ret i1 [[RES]]
;
%x = and i32 %x.full, 4294901760 ;; 4294901760 == 0xffff0000
%large = or i32 %x, 100
@@ -216,7 +222,13 @@ define i1 @test13(i32 %length.i, i32 %x) {
define i1 @test14(i32 %length.i, i32 %x.full) {
; CHECK-LABEL: @test14(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[X:%.*]] = and i32 [[X_FULL:%.*]], -61681
+; CHECK-NEXT: [[LARGE:%.*]] = or i32 [[X]], 8224
+; CHECK-NEXT: [[SMALL:%.*]] = or i32 [[X]], 4112
+; CHECK-NEXT: [[KNOWN:%.*]] = icmp ult i32 [[LARGE]], [[LENGTH_I:%.*]]
+; CHECK-NEXT: [[TO_PROVE:%.*]] = icmp ult i32 [[SMALL]], [[LENGTH_I]]
+; CHECK-NEXT: [[RES:%.*]] = icmp ule i1 [[KNOWN]], [[TO_PROVE]]
+; CHECK-NEXT: ret i1 [[RES]]
;
%x = and i32 %x.full, 4294905615 ;; 4294905615 == 0xffff0f0f
%large = or i32 %x, 8224 ;; == 0x2020
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