[llvm] [RISCV] Preserve MMO when expanding PseudoRV32ZdinxSD/PseudoRV32ZdinxLD. (PR #85877)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 20 13:28:24 PDT 2024
https://github.com/topperc updated https://github.com/llvm/llvm-project/pull/85877
>From e2b4e48b9ba188e4cd0608d1b246d0650883d3ff Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Tue, 19 Mar 2024 12:01:56 -0700
Subject: [PATCH 1/4] [RISCV] Refactor code to reduce nesting and remove
repeated calls to getOpcode(). NFC
---
llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp | 25 ++++++++++-----------
1 file changed, 12 insertions(+), 13 deletions(-)
diff --git a/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp b/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
index a68674b221d38e..10bf1e88d74146 100644
--- a/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
@@ -431,29 +431,28 @@ bool RISCVRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
}
if (!IsRVVSpill) {
- if (MI.getOpcode() == RISCV::ADDI && !isInt<12>(Offset.getFixed())) {
+ int64_t Val = Offset.getFixed();
+ int64_t Lo12 = SignExtend64<12>(Val);
+ unsigned Opc = MI.getOpcode();
+ if (Opc == RISCV::ADDI && !isInt<12>(Val)) {
// We chose to emit the canonical immediate sequence rather than folding
// the offset into the using add under the theory that doing so doesn't
// save dynamic instruction count and some target may fuse the canonical
// 32 bit immediate sequence. We still need to clear the portion of the
// offset encoded in the immediate.
MI.getOperand(FIOperandNum + 1).ChangeToImmediate(0);
+ } else if ((Opc == RISCV::PREFETCH_I || Opc == RISCV::PREFETCH_R ||
+ Opc == RISCV::PREFETCH_W) &&
+ (Lo12 & 0b11111) != 0) {
+ // Prefetch instructions require the offset to be 32 byte aligned.
+ MI.getOperand(FIOperandNum + 1).ChangeToImmediate(0);
} else {
// We can encode an add with 12 bit signed immediate in the immediate
// operand of our user instruction. As a result, the remaining
// offset can by construction, at worst, a LUI and a ADD.
- int64_t Val = Offset.getFixed();
- int64_t Lo12 = SignExtend64<12>(Val);
- if ((MI.getOpcode() == RISCV::PREFETCH_I ||
- MI.getOpcode() == RISCV::PREFETCH_R ||
- MI.getOpcode() == RISCV::PREFETCH_W) &&
- (Lo12 & 0b11111) != 0)
- MI.getOperand(FIOperandNum + 1).ChangeToImmediate(0);
- else {
- MI.getOperand(FIOperandNum + 1).ChangeToImmediate(Lo12);
- Offset = StackOffset::get((uint64_t)Val - (uint64_t)Lo12,
- Offset.getScalable());
- }
+ MI.getOperand(FIOperandNum + 1).ChangeToImmediate(Lo12);
+ Offset = StackOffset::get((uint64_t)Val - (uint64_t)Lo12,
+ Offset.getScalable());
}
}
>From 3ea54632545daef748003814ee0aeef9a7376500 Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Tue, 19 Mar 2024 14:53:36 -0700
Subject: [PATCH 2/4] [RISCV] Lower the alignment requirement for a GPR pair
spill for Zdinx on RV32.
I believe we can use XLen alignment as long as eliminateFrameIndex
limits the maximum folded offset to 2043. This way when we split
the load/store into two 2 instructions we'll be able to add 4
without overflowing simm12.
The test is long to make sure we generate enough spills to have a
large offset. I'm open to suggestions on ways to shorten it.
---
llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp | 7 +
llvm/lib/Target/RISCV/RISCVRegisterInfo.td | 2 +-
llvm/test/CodeGen/RISCV/zdinx-large-spill.ll | 2873 ++++++++++++++++++
3 files changed, 2881 insertions(+), 1 deletion(-)
create mode 100644 llvm/test/CodeGen/RISCV/zdinx-large-spill.ll
diff --git a/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp b/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
index 10bf1e88d74146..881aab955f7d0b 100644
--- a/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
@@ -446,6 +446,13 @@ bool RISCVRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
(Lo12 & 0b11111) != 0) {
// Prefetch instructions require the offset to be 32 byte aligned.
MI.getOperand(FIOperandNum + 1).ChangeToImmediate(0);
+ } else if ((Opc == RISCV::PseudoRV32ZdinxLD ||
+ Opc == RISCV::PseudoRV32ZdinxSD) &&
+ Lo12 >= 2044) {
+ // This instruction will be split into 2 instructions. The second
+ // instruction will add 4 to the immediate. If that would overflow 12
+ // bits, we can't fold the offset.
+ MI.getOperand(FIOperandNum + 1).ChangeToImmediate(0);
} else {
// We can encode an add with 12 bit signed immediate in the immediate
// operand of our user instruction. As a result, the remaining
diff --git a/llvm/lib/Target/RISCV/RISCVRegisterInfo.td b/llvm/lib/Target/RISCV/RISCVRegisterInfo.td
index 225b57554c1dc0..9da1f73681c68c 100644
--- a/llvm/lib/Target/RISCV/RISCVRegisterInfo.td
+++ b/llvm/lib/Target/RISCV/RISCVRegisterInfo.td
@@ -573,7 +573,7 @@ let RegAltNameIndices = [ABIRegAltName] in {
}
let RegInfos = RegInfoByHwMode<[RV32, RV64],
- [RegInfo<64, 64, 64>, RegInfo<128, 128, 128>]>,
+ [RegInfo<64, 64, 32>, RegInfo<128, 128, 64>]>,
DecoderMethod = "DecodeGPRPairRegisterClass" in
def GPRPair : RegisterClass<"RISCV", [XLenPairFVT], 64, (add
X10_X11, X12_X13, X14_X15, X16_X17,
diff --git a/llvm/test/CodeGen/RISCV/zdinx-large-spill.ll b/llvm/test/CodeGen/RISCV/zdinx-large-spill.ll
new file mode 100644
index 00000000000000..d9856478b19053
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/zdinx-large-spill.ll
@@ -0,0 +1,2873 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
+; RUN: llc < %s -mtriple=riscv32 -mattr=+zdinx | FileCheck %s
+
+; Generate over 2048 bytes of spills by load a bunch of values and then forcing
+; all GPRs to be spilled via inline assembly that clobbers all registes. We
+; want to make sure eliminateFrameIndex doesn't fold sp+2044 as an offset in a
+; GPR pair spill instruction. When we split the pair spill, we would be unable
+; to add 4 to the immediate without overflowing simm12.
+
+; 2040(sp) should be the largest offset we have.
+
+define void @foo(ptr nocapture noundef %0) nounwind {
+; CHECK-LABEL: foo:
+; CHECK: # %bb.0:
+; CHECK-NEXT: addi sp, sp, -2032
+; CHECK-NEXT: sw ra, 2028(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw s0, 2024(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw s1, 2020(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw s2, 2016(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw s3, 2012(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw s4, 2008(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw s5, 2004(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw s6, 2000(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw s7, 1996(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw s8, 1992(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw s9, 1988(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw s10, 1984(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw s11, 1980(sp) # 4-byte Folded Spill
+; CHECK-NEXT: addi sp, sp, -80
+; CHECK-NEXT: sw a0, 8(sp) # 4-byte Folded Spill
+; CHECK-NEXT: lw a2, 0(a0)
+; CHECK-NEXT: lw a3, 4(a0)
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: sw a2, -2044(a1)
+; CHECK-NEXT: sw a3, -2040(a1)
+; CHECK-NEXT: lw a2, 8(a0)
+; CHECK-NEXT: lw a3, 12(a0)
+; CHECK-NEXT: addi a1, sp, 2044
+; CHECK-NEXT: sw a2, 0(a1)
+; CHECK-NEXT: sw a3, 4(a1)
+; CHECK-NEXT: lw a2, 16(a0)
+; CHECK-NEXT: lw a3, 20(a0)
+; CHECK-NEXT: sw a2, 2036(sp)
+; CHECK-NEXT: sw a3, 2040(sp)
+; CHECK-NEXT: lw a2, 24(a0)
+; CHECK-NEXT: lw a3, 28(a0)
+; CHECK-NEXT: sw a2, 2028(sp)
+; CHECK-NEXT: sw a3, 2032(sp)
+; CHECK-NEXT: lw a2, 32(a0)
+; CHECK-NEXT: lw a3, 36(a0)
+; CHECK-NEXT: sw a2, 2020(sp)
+; CHECK-NEXT: sw a3, 2024(sp)
+; CHECK-NEXT: lw a2, 40(a0)
+; CHECK-NEXT: lw a3, 44(a0)
+; CHECK-NEXT: sw a2, 2012(sp)
+; CHECK-NEXT: sw a3, 2016(sp)
+; CHECK-NEXT: lw a2, 48(a0)
+; CHECK-NEXT: lw a3, 52(a0)
+; CHECK-NEXT: sw a2, 2004(sp)
+; CHECK-NEXT: sw a3, 2008(sp)
+; CHECK-NEXT: lw a2, 56(a0)
+; CHECK-NEXT: lw a3, 60(a0)
+; CHECK-NEXT: sw a2, 1996(sp)
+; CHECK-NEXT: sw a3, 2000(sp)
+; CHECK-NEXT: lw a2, 64(a0)
+; CHECK-NEXT: lw a3, 68(a0)
+; CHECK-NEXT: sw a2, 1988(sp)
+; CHECK-NEXT: sw a3, 1992(sp)
+; CHECK-NEXT: lw a2, 72(a0)
+; CHECK-NEXT: lw a3, 76(a0)
+; CHECK-NEXT: sw a2, 1980(sp)
+; CHECK-NEXT: sw a3, 1984(sp)
+; CHECK-NEXT: lw a2, 80(a0)
+; CHECK-NEXT: lw a3, 84(a0)
+; CHECK-NEXT: sw a2, 1972(sp)
+; CHECK-NEXT: sw a3, 1976(sp)
+; CHECK-NEXT: lw a2, 88(a0)
+; CHECK-NEXT: lw a3, 92(a0)
+; CHECK-NEXT: sw a2, 1964(sp)
+; CHECK-NEXT: sw a3, 1968(sp)
+; CHECK-NEXT: lw a2, 96(a0)
+; CHECK-NEXT: lw a3, 100(a0)
+; CHECK-NEXT: sw a2, 1956(sp)
+; CHECK-NEXT: sw a3, 1960(sp)
+; CHECK-NEXT: lw a2, 104(a0)
+; CHECK-NEXT: lw a3, 108(a0)
+; CHECK-NEXT: sw a2, 1948(sp)
+; CHECK-NEXT: sw a3, 1952(sp)
+; CHECK-NEXT: lw a2, 112(a0)
+; CHECK-NEXT: lw a3, 116(a0)
+; CHECK-NEXT: sw a2, 1940(sp)
+; CHECK-NEXT: sw a3, 1944(sp)
+; CHECK-NEXT: lw a2, 120(a0)
+; CHECK-NEXT: lw a3, 124(a0)
+; CHECK-NEXT: sw a2, 1932(sp)
+; CHECK-NEXT: sw a3, 1936(sp)
+; CHECK-NEXT: lw a2, 128(a0)
+; CHECK-NEXT: lw a3, 132(a0)
+; CHECK-NEXT: sw a2, 1924(sp)
+; CHECK-NEXT: sw a3, 1928(sp)
+; CHECK-NEXT: lw a2, 136(a0)
+; CHECK-NEXT: lw a3, 140(a0)
+; CHECK-NEXT: sw a2, 1916(sp)
+; CHECK-NEXT: sw a3, 1920(sp)
+; CHECK-NEXT: lw a2, 144(a0)
+; CHECK-NEXT: lw a3, 148(a0)
+; CHECK-NEXT: sw a2, 1908(sp)
+; CHECK-NEXT: sw a3, 1912(sp)
+; CHECK-NEXT: lw a2, 152(a0)
+; CHECK-NEXT: lw a3, 156(a0)
+; CHECK-NEXT: sw a2, 1900(sp)
+; CHECK-NEXT: sw a3, 1904(sp)
+; CHECK-NEXT: lw a2, 160(a0)
+; CHECK-NEXT: lw a3, 164(a0)
+; CHECK-NEXT: sw a2, 1892(sp)
+; CHECK-NEXT: sw a3, 1896(sp)
+; CHECK-NEXT: lw a2, 168(a0)
+; CHECK-NEXT: lw a3, 172(a0)
+; CHECK-NEXT: sw a2, 1884(sp)
+; CHECK-NEXT: sw a3, 1888(sp)
+; CHECK-NEXT: lw a2, 176(a0)
+; CHECK-NEXT: lw a3, 180(a0)
+; CHECK-NEXT: sw a2, 1876(sp)
+; CHECK-NEXT: sw a3, 1880(sp)
+; CHECK-NEXT: lw a2, 184(a0)
+; CHECK-NEXT: lw a3, 188(a0)
+; CHECK-NEXT: sw a2, 1868(sp)
+; CHECK-NEXT: sw a3, 1872(sp)
+; CHECK-NEXT: lw a2, 192(a0)
+; CHECK-NEXT: lw a3, 196(a0)
+; CHECK-NEXT: sw a2, 1860(sp)
+; CHECK-NEXT: sw a3, 1864(sp)
+; CHECK-NEXT: lw a2, 200(a0)
+; CHECK-NEXT: lw a3, 204(a0)
+; CHECK-NEXT: sw a2, 1852(sp)
+; CHECK-NEXT: sw a3, 1856(sp)
+; CHECK-NEXT: lw a2, 208(a0)
+; CHECK-NEXT: lw a3, 212(a0)
+; CHECK-NEXT: sw a2, 1844(sp)
+; CHECK-NEXT: sw a3, 1848(sp)
+; CHECK-NEXT: lw a2, 216(a0)
+; CHECK-NEXT: lw a3, 220(a0)
+; CHECK-NEXT: sw a2, 1836(sp)
+; CHECK-NEXT: sw a3, 1840(sp)
+; CHECK-NEXT: lw a2, 224(a0)
+; CHECK-NEXT: lw a3, 228(a0)
+; CHECK-NEXT: sw a2, 1828(sp)
+; CHECK-NEXT: sw a3, 1832(sp)
+; CHECK-NEXT: lw a2, 232(a0)
+; CHECK-NEXT: lw a3, 236(a0)
+; CHECK-NEXT: sw a2, 1820(sp)
+; CHECK-NEXT: sw a3, 1824(sp)
+; CHECK-NEXT: lw a2, 240(a0)
+; CHECK-NEXT: lw a3, 244(a0)
+; CHECK-NEXT: sw a2, 1812(sp)
+; CHECK-NEXT: sw a3, 1816(sp)
+; CHECK-NEXT: lw a2, 248(a0)
+; CHECK-NEXT: lw a3, 252(a0)
+; CHECK-NEXT: sw a2, 1804(sp)
+; CHECK-NEXT: sw a3, 1808(sp)
+; CHECK-NEXT: lw a2, 256(a0)
+; CHECK-NEXT: lw a3, 260(a0)
+; CHECK-NEXT: sw a2, 1796(sp)
+; CHECK-NEXT: sw a3, 1800(sp)
+; CHECK-NEXT: lw a2, 264(a0)
+; CHECK-NEXT: lw a3, 268(a0)
+; CHECK-NEXT: sw a2, 1788(sp)
+; CHECK-NEXT: sw a3, 1792(sp)
+; CHECK-NEXT: lw a2, 272(a0)
+; CHECK-NEXT: lw a3, 276(a0)
+; CHECK-NEXT: sw a2, 1780(sp)
+; CHECK-NEXT: sw a3, 1784(sp)
+; CHECK-NEXT: lw a2, 280(a0)
+; CHECK-NEXT: lw a3, 284(a0)
+; CHECK-NEXT: sw a2, 1772(sp)
+; CHECK-NEXT: sw a3, 1776(sp)
+; CHECK-NEXT: lw a2, 288(a0)
+; CHECK-NEXT: lw a3, 292(a0)
+; CHECK-NEXT: sw a2, 1764(sp)
+; CHECK-NEXT: sw a3, 1768(sp)
+; CHECK-NEXT: lw a2, 296(a0)
+; CHECK-NEXT: lw a3, 300(a0)
+; CHECK-NEXT: sw a2, 1756(sp)
+; CHECK-NEXT: sw a3, 1760(sp)
+; CHECK-NEXT: lw a2, 304(a0)
+; CHECK-NEXT: lw a3, 308(a0)
+; CHECK-NEXT: sw a2, 1748(sp)
+; CHECK-NEXT: sw a3, 1752(sp)
+; CHECK-NEXT: lw a2, 312(a0)
+; CHECK-NEXT: lw a3, 316(a0)
+; CHECK-NEXT: sw a2, 1740(sp)
+; CHECK-NEXT: sw a3, 1744(sp)
+; CHECK-NEXT: lw a2, 320(a0)
+; CHECK-NEXT: lw a3, 324(a0)
+; CHECK-NEXT: sw a2, 1732(sp)
+; CHECK-NEXT: sw a3, 1736(sp)
+; CHECK-NEXT: lw a2, 328(a0)
+; CHECK-NEXT: lw a3, 332(a0)
+; CHECK-NEXT: sw a2, 1724(sp)
+; CHECK-NEXT: sw a3, 1728(sp)
+; CHECK-NEXT: lw a2, 336(a0)
+; CHECK-NEXT: lw a3, 340(a0)
+; CHECK-NEXT: sw a2, 1716(sp)
+; CHECK-NEXT: sw a3, 1720(sp)
+; CHECK-NEXT: lw a2, 344(a0)
+; CHECK-NEXT: lw a3, 348(a0)
+; CHECK-NEXT: sw a2, 1708(sp)
+; CHECK-NEXT: sw a3, 1712(sp)
+; CHECK-NEXT: lw a2, 352(a0)
+; CHECK-NEXT: lw a3, 356(a0)
+; CHECK-NEXT: sw a2, 1700(sp)
+; CHECK-NEXT: sw a3, 1704(sp)
+; CHECK-NEXT: lw a2, 360(a0)
+; CHECK-NEXT: lw a3, 364(a0)
+; CHECK-NEXT: sw a2, 1692(sp)
+; CHECK-NEXT: sw a3, 1696(sp)
+; CHECK-NEXT: lw a2, 368(a0)
+; CHECK-NEXT: lw a3, 372(a0)
+; CHECK-NEXT: sw a2, 1684(sp)
+; CHECK-NEXT: sw a3, 1688(sp)
+; CHECK-NEXT: lw a2, 376(a0)
+; CHECK-NEXT: lw a3, 380(a0)
+; CHECK-NEXT: sw a2, 1676(sp)
+; CHECK-NEXT: sw a3, 1680(sp)
+; CHECK-NEXT: lw a2, 384(a0)
+; CHECK-NEXT: lw a3, 388(a0)
+; CHECK-NEXT: sw a2, 1668(sp)
+; CHECK-NEXT: sw a3, 1672(sp)
+; CHECK-NEXT: lw a2, 392(a0)
+; CHECK-NEXT: lw a3, 396(a0)
+; CHECK-NEXT: sw a2, 1660(sp)
+; CHECK-NEXT: sw a3, 1664(sp)
+; CHECK-NEXT: lw a2, 400(a0)
+; CHECK-NEXT: lw a3, 404(a0)
+; CHECK-NEXT: sw a2, 1652(sp)
+; CHECK-NEXT: sw a3, 1656(sp)
+; CHECK-NEXT: lw a2, 408(a0)
+; CHECK-NEXT: lw a3, 412(a0)
+; CHECK-NEXT: sw a2, 1644(sp)
+; CHECK-NEXT: sw a3, 1648(sp)
+; CHECK-NEXT: lw a2, 416(a0)
+; CHECK-NEXT: lw a3, 420(a0)
+; CHECK-NEXT: sw a2, 1636(sp)
+; CHECK-NEXT: sw a3, 1640(sp)
+; CHECK-NEXT: lw a2, 424(a0)
+; CHECK-NEXT: lw a3, 428(a0)
+; CHECK-NEXT: sw a2, 1628(sp)
+; CHECK-NEXT: sw a3, 1632(sp)
+; CHECK-NEXT: lw a2, 432(a0)
+; CHECK-NEXT: lw a3, 436(a0)
+; CHECK-NEXT: sw a2, 1620(sp)
+; CHECK-NEXT: sw a3, 1624(sp)
+; CHECK-NEXT: lw a2, 440(a0)
+; CHECK-NEXT: lw a3, 444(a0)
+; CHECK-NEXT: sw a2, 1612(sp)
+; CHECK-NEXT: sw a3, 1616(sp)
+; CHECK-NEXT: lw a2, 448(a0)
+; CHECK-NEXT: lw a3, 452(a0)
+; CHECK-NEXT: sw a2, 1604(sp)
+; CHECK-NEXT: sw a3, 1608(sp)
+; CHECK-NEXT: lw a2, 456(a0)
+; CHECK-NEXT: lw a3, 460(a0)
+; CHECK-NEXT: sw a2, 1596(sp)
+; CHECK-NEXT: sw a3, 1600(sp)
+; CHECK-NEXT: lw a2, 464(a0)
+; CHECK-NEXT: lw a3, 468(a0)
+; CHECK-NEXT: sw a2, 1588(sp)
+; CHECK-NEXT: sw a3, 1592(sp)
+; CHECK-NEXT: lw a2, 472(a0)
+; CHECK-NEXT: lw a3, 476(a0)
+; CHECK-NEXT: sw a2, 1580(sp)
+; CHECK-NEXT: sw a3, 1584(sp)
+; CHECK-NEXT: lw a2, 480(a0)
+; CHECK-NEXT: lw a3, 484(a0)
+; CHECK-NEXT: sw a2, 1572(sp)
+; CHECK-NEXT: sw a3, 1576(sp)
+; CHECK-NEXT: lw a2, 488(a0)
+; CHECK-NEXT: lw a3, 492(a0)
+; CHECK-NEXT: sw a2, 1564(sp)
+; CHECK-NEXT: sw a3, 1568(sp)
+; CHECK-NEXT: lw a2, 496(a0)
+; CHECK-NEXT: lw a3, 500(a0)
+; CHECK-NEXT: sw a2, 1556(sp)
+; CHECK-NEXT: sw a3, 1560(sp)
+; CHECK-NEXT: lw a2, 504(a0)
+; CHECK-NEXT: lw a3, 508(a0)
+; CHECK-NEXT: sw a2, 1548(sp)
+; CHECK-NEXT: sw a3, 1552(sp)
+; CHECK-NEXT: lw a2, 512(a0)
+; CHECK-NEXT: lw a3, 516(a0)
+; CHECK-NEXT: sw a2, 1540(sp)
+; CHECK-NEXT: sw a3, 1544(sp)
+; CHECK-NEXT: lw a2, 520(a0)
+; CHECK-NEXT: lw a3, 524(a0)
+; CHECK-NEXT: sw a2, 1532(sp)
+; CHECK-NEXT: sw a3, 1536(sp)
+; CHECK-NEXT: lw a2, 528(a0)
+; CHECK-NEXT: lw a3, 532(a0)
+; CHECK-NEXT: sw a2, 1524(sp)
+; CHECK-NEXT: sw a3, 1528(sp)
+; CHECK-NEXT: lw a2, 536(a0)
+; CHECK-NEXT: lw a3, 540(a0)
+; CHECK-NEXT: sw a2, 1516(sp)
+; CHECK-NEXT: sw a3, 1520(sp)
+; CHECK-NEXT: lw a2, 544(a0)
+; CHECK-NEXT: lw a3, 548(a0)
+; CHECK-NEXT: sw a2, 1508(sp)
+; CHECK-NEXT: sw a3, 1512(sp)
+; CHECK-NEXT: lw a2, 552(a0)
+; CHECK-NEXT: lw a3, 556(a0)
+; CHECK-NEXT: sw a2, 1500(sp)
+; CHECK-NEXT: sw a3, 1504(sp)
+; CHECK-NEXT: lw a2, 560(a0)
+; CHECK-NEXT: lw a3, 564(a0)
+; CHECK-NEXT: sw a2, 1492(sp)
+; CHECK-NEXT: sw a3, 1496(sp)
+; CHECK-NEXT: lw a2, 568(a0)
+; CHECK-NEXT: lw a3, 572(a0)
+; CHECK-NEXT: sw a2, 1484(sp)
+; CHECK-NEXT: sw a3, 1488(sp)
+; CHECK-NEXT: lw a2, 576(a0)
+; CHECK-NEXT: lw a3, 580(a0)
+; CHECK-NEXT: sw a2, 1476(sp)
+; CHECK-NEXT: sw a3, 1480(sp)
+; CHECK-NEXT: lw a2, 584(a0)
+; CHECK-NEXT: lw a3, 588(a0)
+; CHECK-NEXT: sw a2, 1468(sp)
+; CHECK-NEXT: sw a3, 1472(sp)
+; CHECK-NEXT: lw a2, 592(a0)
+; CHECK-NEXT: lw a3, 596(a0)
+; CHECK-NEXT: sw a2, 1460(sp)
+; CHECK-NEXT: sw a3, 1464(sp)
+; CHECK-NEXT: lw a2, 600(a0)
+; CHECK-NEXT: lw a3, 604(a0)
+; CHECK-NEXT: sw a2, 1452(sp)
+; CHECK-NEXT: sw a3, 1456(sp)
+; CHECK-NEXT: lw a2, 608(a0)
+; CHECK-NEXT: lw a3, 612(a0)
+; CHECK-NEXT: sw a2, 1444(sp)
+; CHECK-NEXT: sw a3, 1448(sp)
+; CHECK-NEXT: lw a2, 616(a0)
+; CHECK-NEXT: lw a3, 620(a0)
+; CHECK-NEXT: sw a2, 1436(sp)
+; CHECK-NEXT: sw a3, 1440(sp)
+; CHECK-NEXT: lw a2, 624(a0)
+; CHECK-NEXT: lw a3, 628(a0)
+; CHECK-NEXT: sw a2, 1428(sp)
+; CHECK-NEXT: sw a3, 1432(sp)
+; CHECK-NEXT: lw a2, 632(a0)
+; CHECK-NEXT: lw a3, 636(a0)
+; CHECK-NEXT: sw a2, 1420(sp)
+; CHECK-NEXT: sw a3, 1424(sp)
+; CHECK-NEXT: lw a2, 640(a0)
+; CHECK-NEXT: lw a3, 644(a0)
+; CHECK-NEXT: sw a2, 1412(sp)
+; CHECK-NEXT: sw a3, 1416(sp)
+; CHECK-NEXT: lw a2, 648(a0)
+; CHECK-NEXT: lw a3, 652(a0)
+; CHECK-NEXT: sw a2, 1404(sp)
+; CHECK-NEXT: sw a3, 1408(sp)
+; CHECK-NEXT: lw a2, 656(a0)
+; CHECK-NEXT: lw a3, 660(a0)
+; CHECK-NEXT: sw a2, 1396(sp)
+; CHECK-NEXT: sw a3, 1400(sp)
+; CHECK-NEXT: lw a2, 664(a0)
+; CHECK-NEXT: lw a3, 668(a0)
+; CHECK-NEXT: sw a2, 1388(sp)
+; CHECK-NEXT: sw a3, 1392(sp)
+; CHECK-NEXT: lw a2, 672(a0)
+; CHECK-NEXT: lw a3, 676(a0)
+; CHECK-NEXT: sw a2, 1380(sp)
+; CHECK-NEXT: sw a3, 1384(sp)
+; CHECK-NEXT: lw a2, 680(a0)
+; CHECK-NEXT: lw a3, 684(a0)
+; CHECK-NEXT: sw a2, 1372(sp)
+; CHECK-NEXT: sw a3, 1376(sp)
+; CHECK-NEXT: lw a2, 688(a0)
+; CHECK-NEXT: lw a3, 692(a0)
+; CHECK-NEXT: sw a2, 1364(sp)
+; CHECK-NEXT: sw a3, 1368(sp)
+; CHECK-NEXT: lw a2, 696(a0)
+; CHECK-NEXT: lw a3, 700(a0)
+; CHECK-NEXT: sw a2, 1356(sp)
+; CHECK-NEXT: sw a3, 1360(sp)
+; CHECK-NEXT: lw a2, 704(a0)
+; CHECK-NEXT: lw a3, 708(a0)
+; CHECK-NEXT: sw a2, 1348(sp)
+; CHECK-NEXT: sw a3, 1352(sp)
+; CHECK-NEXT: lw a2, 712(a0)
+; CHECK-NEXT: lw a3, 716(a0)
+; CHECK-NEXT: sw a2, 1340(sp)
+; CHECK-NEXT: sw a3, 1344(sp)
+; CHECK-NEXT: lw a2, 720(a0)
+; CHECK-NEXT: lw a3, 724(a0)
+; CHECK-NEXT: sw a2, 1332(sp)
+; CHECK-NEXT: sw a3, 1336(sp)
+; CHECK-NEXT: lw a2, 728(a0)
+; CHECK-NEXT: lw a3, 732(a0)
+; CHECK-NEXT: sw a2, 1324(sp)
+; CHECK-NEXT: sw a3, 1328(sp)
+; CHECK-NEXT: lw a2, 736(a0)
+; CHECK-NEXT: lw a3, 740(a0)
+; CHECK-NEXT: sw a2, 1316(sp)
+; CHECK-NEXT: sw a3, 1320(sp)
+; CHECK-NEXT: lw a2, 744(a0)
+; CHECK-NEXT: lw a3, 748(a0)
+; CHECK-NEXT: sw a2, 1308(sp)
+; CHECK-NEXT: sw a3, 1312(sp)
+; CHECK-NEXT: lw a2, 752(a0)
+; CHECK-NEXT: lw a3, 756(a0)
+; CHECK-NEXT: sw a2, 1300(sp)
+; CHECK-NEXT: sw a3, 1304(sp)
+; CHECK-NEXT: lw a2, 760(a0)
+; CHECK-NEXT: lw a3, 764(a0)
+; CHECK-NEXT: sw a2, 1292(sp)
+; CHECK-NEXT: sw a3, 1296(sp)
+; CHECK-NEXT: lw a2, 768(a0)
+; CHECK-NEXT: lw a3, 772(a0)
+; CHECK-NEXT: sw a2, 1284(sp)
+; CHECK-NEXT: sw a3, 1288(sp)
+; CHECK-NEXT: lw a2, 776(a0)
+; CHECK-NEXT: lw a3, 780(a0)
+; CHECK-NEXT: sw a2, 1276(sp)
+; CHECK-NEXT: sw a3, 1280(sp)
+; CHECK-NEXT: lw a2, 784(a0)
+; CHECK-NEXT: lw a3, 788(a0)
+; CHECK-NEXT: sw a2, 1268(sp)
+; CHECK-NEXT: sw a3, 1272(sp)
+; CHECK-NEXT: lw a2, 792(a0)
+; CHECK-NEXT: lw a3, 796(a0)
+; CHECK-NEXT: sw a2, 1260(sp)
+; CHECK-NEXT: sw a3, 1264(sp)
+; CHECK-NEXT: lw a2, 800(a0)
+; CHECK-NEXT: lw a3, 804(a0)
+; CHECK-NEXT: sw a2, 1252(sp)
+; CHECK-NEXT: sw a3, 1256(sp)
+; CHECK-NEXT: lw a2, 808(a0)
+; CHECK-NEXT: lw a3, 812(a0)
+; CHECK-NEXT: sw a2, 1244(sp)
+; CHECK-NEXT: sw a3, 1248(sp)
+; CHECK-NEXT: lw a2, 816(a0)
+; CHECK-NEXT: lw a3, 820(a0)
+; CHECK-NEXT: sw a2, 1236(sp)
+; CHECK-NEXT: sw a3, 1240(sp)
+; CHECK-NEXT: lw a2, 824(a0)
+; CHECK-NEXT: lw a3, 828(a0)
+; CHECK-NEXT: sw a2, 1228(sp)
+; CHECK-NEXT: sw a3, 1232(sp)
+; CHECK-NEXT: lw a2, 832(a0)
+; CHECK-NEXT: lw a3, 836(a0)
+; CHECK-NEXT: sw a2, 1220(sp)
+; CHECK-NEXT: sw a3, 1224(sp)
+; CHECK-NEXT: lw a2, 840(a0)
+; CHECK-NEXT: lw a3, 844(a0)
+; CHECK-NEXT: sw a2, 1212(sp)
+; CHECK-NEXT: sw a3, 1216(sp)
+; CHECK-NEXT: lw a2, 848(a0)
+; CHECK-NEXT: lw a3, 852(a0)
+; CHECK-NEXT: sw a2, 1204(sp)
+; CHECK-NEXT: sw a3, 1208(sp)
+; CHECK-NEXT: lw a2, 856(a0)
+; CHECK-NEXT: lw a3, 860(a0)
+; CHECK-NEXT: sw a2, 1196(sp)
+; CHECK-NEXT: sw a3, 1200(sp)
+; CHECK-NEXT: lw a2, 864(a0)
+; CHECK-NEXT: lw a3, 868(a0)
+; CHECK-NEXT: sw a2, 1188(sp)
+; CHECK-NEXT: sw a3, 1192(sp)
+; CHECK-NEXT: lw a2, 872(a0)
+; CHECK-NEXT: lw a3, 876(a0)
+; CHECK-NEXT: sw a2, 1180(sp)
+; CHECK-NEXT: sw a3, 1184(sp)
+; CHECK-NEXT: lw a2, 880(a0)
+; CHECK-NEXT: lw a3, 884(a0)
+; CHECK-NEXT: sw a2, 1172(sp)
+; CHECK-NEXT: sw a3, 1176(sp)
+; CHECK-NEXT: lw a2, 888(a0)
+; CHECK-NEXT: lw a3, 892(a0)
+; CHECK-NEXT: sw a2, 1164(sp)
+; CHECK-NEXT: sw a3, 1168(sp)
+; CHECK-NEXT: lw a2, 896(a0)
+; CHECK-NEXT: lw a3, 900(a0)
+; CHECK-NEXT: sw a2, 1156(sp)
+; CHECK-NEXT: sw a3, 1160(sp)
+; CHECK-NEXT: lw a2, 904(a0)
+; CHECK-NEXT: lw a3, 908(a0)
+; CHECK-NEXT: sw a2, 1148(sp)
+; CHECK-NEXT: sw a3, 1152(sp)
+; CHECK-NEXT: lw a2, 912(a0)
+; CHECK-NEXT: lw a3, 916(a0)
+; CHECK-NEXT: sw a2, 1140(sp)
+; CHECK-NEXT: sw a3, 1144(sp)
+; CHECK-NEXT: lw a2, 920(a0)
+; CHECK-NEXT: lw a3, 924(a0)
+; CHECK-NEXT: sw a2, 1132(sp)
+; CHECK-NEXT: sw a3, 1136(sp)
+; CHECK-NEXT: lw a2, 928(a0)
+; CHECK-NEXT: lw a3, 932(a0)
+; CHECK-NEXT: sw a2, 1124(sp)
+; CHECK-NEXT: sw a3, 1128(sp)
+; CHECK-NEXT: lw a2, 936(a0)
+; CHECK-NEXT: lw a3, 940(a0)
+; CHECK-NEXT: sw a2, 1116(sp)
+; CHECK-NEXT: sw a3, 1120(sp)
+; CHECK-NEXT: lw a2, 944(a0)
+; CHECK-NEXT: lw a3, 948(a0)
+; CHECK-NEXT: sw a2, 1108(sp)
+; CHECK-NEXT: sw a3, 1112(sp)
+; CHECK-NEXT: lw a2, 952(a0)
+; CHECK-NEXT: lw a3, 956(a0)
+; CHECK-NEXT: sw a2, 1100(sp)
+; CHECK-NEXT: sw a3, 1104(sp)
+; CHECK-NEXT: lw a2, 960(a0)
+; CHECK-NEXT: lw a3, 964(a0)
+; CHECK-NEXT: sw a2, 1092(sp)
+; CHECK-NEXT: sw a3, 1096(sp)
+; CHECK-NEXT: lw a2, 968(a0)
+; CHECK-NEXT: lw a3, 972(a0)
+; CHECK-NEXT: sw a2, 1084(sp)
+; CHECK-NEXT: sw a3, 1088(sp)
+; CHECK-NEXT: lw a2, 976(a0)
+; CHECK-NEXT: lw a3, 980(a0)
+; CHECK-NEXT: sw a2, 1076(sp)
+; CHECK-NEXT: sw a3, 1080(sp)
+; CHECK-NEXT: lw a2, 984(a0)
+; CHECK-NEXT: lw a3, 988(a0)
+; CHECK-NEXT: sw a2, 1068(sp)
+; CHECK-NEXT: sw a3, 1072(sp)
+; CHECK-NEXT: lw a2, 992(a0)
+; CHECK-NEXT: lw a3, 996(a0)
+; CHECK-NEXT: sw a2, 1060(sp)
+; CHECK-NEXT: sw a3, 1064(sp)
+; CHECK-NEXT: lw a2, 1000(a0)
+; CHECK-NEXT: lw a3, 1004(a0)
+; CHECK-NEXT: sw a2, 1052(sp)
+; CHECK-NEXT: sw a3, 1056(sp)
+; CHECK-NEXT: lw a2, 1008(a0)
+; CHECK-NEXT: lw a3, 1012(a0)
+; CHECK-NEXT: sw a2, 1044(sp)
+; CHECK-NEXT: sw a3, 1048(sp)
+; CHECK-NEXT: lw a2, 1016(a0)
+; CHECK-NEXT: lw a3, 1020(a0)
+; CHECK-NEXT: sw a2, 1036(sp)
+; CHECK-NEXT: sw a3, 1040(sp)
+; CHECK-NEXT: lw a2, 1024(a0)
+; CHECK-NEXT: lw a3, 1028(a0)
+; CHECK-NEXT: sw a2, 1028(sp)
+; CHECK-NEXT: sw a3, 1032(sp)
+; CHECK-NEXT: lw a2, 1032(a0)
+; CHECK-NEXT: lw a3, 1036(a0)
+; CHECK-NEXT: sw a2, 1020(sp)
+; CHECK-NEXT: sw a3, 1024(sp)
+; CHECK-NEXT: lw a2, 1040(a0)
+; CHECK-NEXT: lw a3, 1044(a0)
+; CHECK-NEXT: sw a2, 1012(sp)
+; CHECK-NEXT: sw a3, 1016(sp)
+; CHECK-NEXT: lw a2, 1048(a0)
+; CHECK-NEXT: lw a3, 1052(a0)
+; CHECK-NEXT: sw a2, 1004(sp)
+; CHECK-NEXT: sw a3, 1008(sp)
+; CHECK-NEXT: lw a2, 1056(a0)
+; CHECK-NEXT: lw a3, 1060(a0)
+; CHECK-NEXT: sw a2, 996(sp)
+; CHECK-NEXT: sw a3, 1000(sp)
+; CHECK-NEXT: lw a2, 1064(a0)
+; CHECK-NEXT: lw a3, 1068(a0)
+; CHECK-NEXT: sw a2, 988(sp)
+; CHECK-NEXT: sw a3, 992(sp)
+; CHECK-NEXT: lw a2, 1072(a0)
+; CHECK-NEXT: lw a3, 1076(a0)
+; CHECK-NEXT: sw a2, 980(sp)
+; CHECK-NEXT: sw a3, 984(sp)
+; CHECK-NEXT: lw a2, 1080(a0)
+; CHECK-NEXT: lw a3, 1084(a0)
+; CHECK-NEXT: sw a2, 972(sp)
+; CHECK-NEXT: sw a3, 976(sp)
+; CHECK-NEXT: lw a2, 1088(a0)
+; CHECK-NEXT: lw a3, 1092(a0)
+; CHECK-NEXT: sw a2, 964(sp)
+; CHECK-NEXT: sw a3, 968(sp)
+; CHECK-NEXT: lw a2, 1096(a0)
+; CHECK-NEXT: lw a3, 1100(a0)
+; CHECK-NEXT: sw a2, 956(sp)
+; CHECK-NEXT: sw a3, 960(sp)
+; CHECK-NEXT: lw a2, 1104(a0)
+; CHECK-NEXT: lw a3, 1108(a0)
+; CHECK-NEXT: sw a2, 948(sp)
+; CHECK-NEXT: sw a3, 952(sp)
+; CHECK-NEXT: lw a2, 1112(a0)
+; CHECK-NEXT: lw a3, 1116(a0)
+; CHECK-NEXT: sw a2, 940(sp)
+; CHECK-NEXT: sw a3, 944(sp)
+; CHECK-NEXT: lw a2, 1120(a0)
+; CHECK-NEXT: lw a3, 1124(a0)
+; CHECK-NEXT: sw a2, 932(sp)
+; CHECK-NEXT: sw a3, 936(sp)
+; CHECK-NEXT: lw a2, 1128(a0)
+; CHECK-NEXT: lw a3, 1132(a0)
+; CHECK-NEXT: sw a2, 924(sp)
+; CHECK-NEXT: sw a3, 928(sp)
+; CHECK-NEXT: lw a2, 1136(a0)
+; CHECK-NEXT: lw a3, 1140(a0)
+; CHECK-NEXT: sw a2, 916(sp)
+; CHECK-NEXT: sw a3, 920(sp)
+; CHECK-NEXT: lw a2, 1144(a0)
+; CHECK-NEXT: lw a3, 1148(a0)
+; CHECK-NEXT: sw a2, 908(sp)
+; CHECK-NEXT: sw a3, 912(sp)
+; CHECK-NEXT: lw a2, 1152(a0)
+; CHECK-NEXT: lw a3, 1156(a0)
+; CHECK-NEXT: sw a2, 900(sp)
+; CHECK-NEXT: sw a3, 904(sp)
+; CHECK-NEXT: lw a2, 1160(a0)
+; CHECK-NEXT: lw a3, 1164(a0)
+; CHECK-NEXT: sw a2, 892(sp)
+; CHECK-NEXT: sw a3, 896(sp)
+; CHECK-NEXT: lw a2, 1168(a0)
+; CHECK-NEXT: lw a3, 1172(a0)
+; CHECK-NEXT: sw a2, 884(sp)
+; CHECK-NEXT: sw a3, 888(sp)
+; CHECK-NEXT: lw a2, 1176(a0)
+; CHECK-NEXT: lw a3, 1180(a0)
+; CHECK-NEXT: sw a2, 876(sp)
+; CHECK-NEXT: sw a3, 880(sp)
+; CHECK-NEXT: lw a2, 1184(a0)
+; CHECK-NEXT: lw a3, 1188(a0)
+; CHECK-NEXT: sw a2, 868(sp)
+; CHECK-NEXT: sw a3, 872(sp)
+; CHECK-NEXT: lw a2, 1192(a0)
+; CHECK-NEXT: lw a3, 1196(a0)
+; CHECK-NEXT: sw a2, 860(sp)
+; CHECK-NEXT: sw a3, 864(sp)
+; CHECK-NEXT: lw a2, 1200(a0)
+; CHECK-NEXT: lw a3, 1204(a0)
+; CHECK-NEXT: sw a2, 852(sp)
+; CHECK-NEXT: sw a3, 856(sp)
+; CHECK-NEXT: lw a2, 1208(a0)
+; CHECK-NEXT: lw a3, 1212(a0)
+; CHECK-NEXT: sw a2, 844(sp)
+; CHECK-NEXT: sw a3, 848(sp)
+; CHECK-NEXT: lw a2, 1216(a0)
+; CHECK-NEXT: lw a3, 1220(a0)
+; CHECK-NEXT: sw a2, 836(sp)
+; CHECK-NEXT: sw a3, 840(sp)
+; CHECK-NEXT: lw a2, 1224(a0)
+; CHECK-NEXT: lw a3, 1228(a0)
+; CHECK-NEXT: sw a2, 828(sp)
+; CHECK-NEXT: sw a3, 832(sp)
+; CHECK-NEXT: lw a2, 1232(a0)
+; CHECK-NEXT: lw a3, 1236(a0)
+; CHECK-NEXT: sw a2, 820(sp)
+; CHECK-NEXT: sw a3, 824(sp)
+; CHECK-NEXT: lw a2, 1240(a0)
+; CHECK-NEXT: lw a3, 1244(a0)
+; CHECK-NEXT: sw a2, 812(sp)
+; CHECK-NEXT: sw a3, 816(sp)
+; CHECK-NEXT: lw a2, 1248(a0)
+; CHECK-NEXT: lw a3, 1252(a0)
+; CHECK-NEXT: sw a2, 804(sp)
+; CHECK-NEXT: sw a3, 808(sp)
+; CHECK-NEXT: lw a2, 1256(a0)
+; CHECK-NEXT: lw a3, 1260(a0)
+; CHECK-NEXT: sw a2, 796(sp)
+; CHECK-NEXT: sw a3, 800(sp)
+; CHECK-NEXT: lw a2, 1264(a0)
+; CHECK-NEXT: lw a3, 1268(a0)
+; CHECK-NEXT: sw a2, 788(sp)
+; CHECK-NEXT: sw a3, 792(sp)
+; CHECK-NEXT: lw a2, 1272(a0)
+; CHECK-NEXT: lw a3, 1276(a0)
+; CHECK-NEXT: sw a2, 780(sp)
+; CHECK-NEXT: sw a3, 784(sp)
+; CHECK-NEXT: lw a2, 1280(a0)
+; CHECK-NEXT: lw a3, 1284(a0)
+; CHECK-NEXT: sw a2, 772(sp)
+; CHECK-NEXT: sw a3, 776(sp)
+; CHECK-NEXT: lw a2, 1288(a0)
+; CHECK-NEXT: lw a3, 1292(a0)
+; CHECK-NEXT: sw a2, 764(sp)
+; CHECK-NEXT: sw a3, 768(sp)
+; CHECK-NEXT: lw a2, 1296(a0)
+; CHECK-NEXT: lw a3, 1300(a0)
+; CHECK-NEXT: sw a2, 756(sp)
+; CHECK-NEXT: sw a3, 760(sp)
+; CHECK-NEXT: lw a2, 1304(a0)
+; CHECK-NEXT: lw a3, 1308(a0)
+; CHECK-NEXT: sw a2, 748(sp)
+; CHECK-NEXT: sw a3, 752(sp)
+; CHECK-NEXT: lw a2, 1312(a0)
+; CHECK-NEXT: lw a3, 1316(a0)
+; CHECK-NEXT: sw a2, 740(sp)
+; CHECK-NEXT: sw a3, 744(sp)
+; CHECK-NEXT: lw a2, 1320(a0)
+; CHECK-NEXT: lw a3, 1324(a0)
+; CHECK-NEXT: sw a2, 732(sp)
+; CHECK-NEXT: sw a3, 736(sp)
+; CHECK-NEXT: lw a2, 1328(a0)
+; CHECK-NEXT: lw a3, 1332(a0)
+; CHECK-NEXT: sw a2, 724(sp)
+; CHECK-NEXT: sw a3, 728(sp)
+; CHECK-NEXT: lw a2, 1336(a0)
+; CHECK-NEXT: lw a3, 1340(a0)
+; CHECK-NEXT: sw a2, 716(sp)
+; CHECK-NEXT: sw a3, 720(sp)
+; CHECK-NEXT: lw a2, 1344(a0)
+; CHECK-NEXT: lw a3, 1348(a0)
+; CHECK-NEXT: sw a2, 708(sp)
+; CHECK-NEXT: sw a3, 712(sp)
+; CHECK-NEXT: lw a2, 1352(a0)
+; CHECK-NEXT: lw a3, 1356(a0)
+; CHECK-NEXT: sw a2, 700(sp)
+; CHECK-NEXT: sw a3, 704(sp)
+; CHECK-NEXT: lw a2, 1360(a0)
+; CHECK-NEXT: lw a3, 1364(a0)
+; CHECK-NEXT: sw a2, 692(sp)
+; CHECK-NEXT: sw a3, 696(sp)
+; CHECK-NEXT: lw a2, 1368(a0)
+; CHECK-NEXT: lw a3, 1372(a0)
+; CHECK-NEXT: sw a2, 684(sp)
+; CHECK-NEXT: sw a3, 688(sp)
+; CHECK-NEXT: lw a2, 1376(a0)
+; CHECK-NEXT: lw a3, 1380(a0)
+; CHECK-NEXT: sw a2, 676(sp)
+; CHECK-NEXT: sw a3, 680(sp)
+; CHECK-NEXT: lw a2, 1384(a0)
+; CHECK-NEXT: lw a3, 1388(a0)
+; CHECK-NEXT: sw a2, 668(sp)
+; CHECK-NEXT: sw a3, 672(sp)
+; CHECK-NEXT: lw a2, 1392(a0)
+; CHECK-NEXT: lw a3, 1396(a0)
+; CHECK-NEXT: sw a2, 660(sp)
+; CHECK-NEXT: sw a3, 664(sp)
+; CHECK-NEXT: lw a2, 1400(a0)
+; CHECK-NEXT: lw a3, 1404(a0)
+; CHECK-NEXT: sw a2, 652(sp)
+; CHECK-NEXT: sw a3, 656(sp)
+; CHECK-NEXT: lw a2, 1408(a0)
+; CHECK-NEXT: lw a3, 1412(a0)
+; CHECK-NEXT: sw a2, 644(sp)
+; CHECK-NEXT: sw a3, 648(sp)
+; CHECK-NEXT: lw a2, 1416(a0)
+; CHECK-NEXT: lw a3, 1420(a0)
+; CHECK-NEXT: sw a2, 636(sp)
+; CHECK-NEXT: sw a3, 640(sp)
+; CHECK-NEXT: lw a2, 1424(a0)
+; CHECK-NEXT: lw a3, 1428(a0)
+; CHECK-NEXT: sw a2, 628(sp)
+; CHECK-NEXT: sw a3, 632(sp)
+; CHECK-NEXT: lw a2, 1432(a0)
+; CHECK-NEXT: lw a3, 1436(a0)
+; CHECK-NEXT: sw a2, 620(sp)
+; CHECK-NEXT: sw a3, 624(sp)
+; CHECK-NEXT: lw a2, 1440(a0)
+; CHECK-NEXT: lw a3, 1444(a0)
+; CHECK-NEXT: sw a2, 612(sp)
+; CHECK-NEXT: sw a3, 616(sp)
+; CHECK-NEXT: lw a2, 1448(a0)
+; CHECK-NEXT: lw a3, 1452(a0)
+; CHECK-NEXT: sw a2, 604(sp)
+; CHECK-NEXT: sw a3, 608(sp)
+; CHECK-NEXT: lw a2, 1456(a0)
+; CHECK-NEXT: lw a3, 1460(a0)
+; CHECK-NEXT: sw a2, 596(sp)
+; CHECK-NEXT: sw a3, 600(sp)
+; CHECK-NEXT: lw a2, 1464(a0)
+; CHECK-NEXT: lw a3, 1468(a0)
+; CHECK-NEXT: sw a2, 588(sp)
+; CHECK-NEXT: sw a3, 592(sp)
+; CHECK-NEXT: lw a2, 1472(a0)
+; CHECK-NEXT: lw a3, 1476(a0)
+; CHECK-NEXT: sw a2, 580(sp)
+; CHECK-NEXT: sw a3, 584(sp)
+; CHECK-NEXT: lw a2, 1480(a0)
+; CHECK-NEXT: lw a3, 1484(a0)
+; CHECK-NEXT: sw a2, 572(sp)
+; CHECK-NEXT: sw a3, 576(sp)
+; CHECK-NEXT: lw a2, 1488(a0)
+; CHECK-NEXT: lw a3, 1492(a0)
+; CHECK-NEXT: sw a2, 564(sp)
+; CHECK-NEXT: sw a3, 568(sp)
+; CHECK-NEXT: lw a2, 1496(a0)
+; CHECK-NEXT: lw a3, 1500(a0)
+; CHECK-NEXT: sw a2, 556(sp)
+; CHECK-NEXT: sw a3, 560(sp)
+; CHECK-NEXT: lw a2, 1504(a0)
+; CHECK-NEXT: lw a3, 1508(a0)
+; CHECK-NEXT: sw a2, 548(sp)
+; CHECK-NEXT: sw a3, 552(sp)
+; CHECK-NEXT: lw a2, 1512(a0)
+; CHECK-NEXT: lw a3, 1516(a0)
+; CHECK-NEXT: sw a2, 540(sp)
+; CHECK-NEXT: sw a3, 544(sp)
+; CHECK-NEXT: lw a2, 1520(a0)
+; CHECK-NEXT: lw a3, 1524(a0)
+; CHECK-NEXT: sw a2, 532(sp)
+; CHECK-NEXT: sw a3, 536(sp)
+; CHECK-NEXT: lw a2, 1528(a0)
+; CHECK-NEXT: lw a3, 1532(a0)
+; CHECK-NEXT: sw a2, 524(sp)
+; CHECK-NEXT: sw a3, 528(sp)
+; CHECK-NEXT: lw a2, 1536(a0)
+; CHECK-NEXT: lw a3, 1540(a0)
+; CHECK-NEXT: sw a2, 516(sp)
+; CHECK-NEXT: sw a3, 520(sp)
+; CHECK-NEXT: lw a2, 1544(a0)
+; CHECK-NEXT: lw a3, 1548(a0)
+; CHECK-NEXT: sw a2, 508(sp)
+; CHECK-NEXT: sw a3, 512(sp)
+; CHECK-NEXT: lw a2, 1552(a0)
+; CHECK-NEXT: lw a3, 1556(a0)
+; CHECK-NEXT: sw a2, 500(sp)
+; CHECK-NEXT: sw a3, 504(sp)
+; CHECK-NEXT: lw a2, 1560(a0)
+; CHECK-NEXT: lw a3, 1564(a0)
+; CHECK-NEXT: sw a2, 492(sp)
+; CHECK-NEXT: sw a3, 496(sp)
+; CHECK-NEXT: lw a2, 1568(a0)
+; CHECK-NEXT: lw a3, 1572(a0)
+; CHECK-NEXT: sw a2, 484(sp)
+; CHECK-NEXT: sw a3, 488(sp)
+; CHECK-NEXT: lw a2, 1576(a0)
+; CHECK-NEXT: lw a3, 1580(a0)
+; CHECK-NEXT: sw a2, 476(sp)
+; CHECK-NEXT: sw a3, 480(sp)
+; CHECK-NEXT: lw a2, 1584(a0)
+; CHECK-NEXT: lw a3, 1588(a0)
+; CHECK-NEXT: sw a2, 468(sp)
+; CHECK-NEXT: sw a3, 472(sp)
+; CHECK-NEXT: lw a2, 1592(a0)
+; CHECK-NEXT: lw a3, 1596(a0)
+; CHECK-NEXT: sw a2, 460(sp)
+; CHECK-NEXT: sw a3, 464(sp)
+; CHECK-NEXT: lw a2, 1600(a0)
+; CHECK-NEXT: lw a3, 1604(a0)
+; CHECK-NEXT: sw a2, 452(sp)
+; CHECK-NEXT: sw a3, 456(sp)
+; CHECK-NEXT: lw a2, 1608(a0)
+; CHECK-NEXT: lw a3, 1612(a0)
+; CHECK-NEXT: sw a2, 444(sp)
+; CHECK-NEXT: sw a3, 448(sp)
+; CHECK-NEXT: lw a2, 1616(a0)
+; CHECK-NEXT: lw a3, 1620(a0)
+; CHECK-NEXT: sw a2, 436(sp)
+; CHECK-NEXT: sw a3, 440(sp)
+; CHECK-NEXT: lw a2, 1624(a0)
+; CHECK-NEXT: lw a3, 1628(a0)
+; CHECK-NEXT: sw a2, 428(sp)
+; CHECK-NEXT: sw a3, 432(sp)
+; CHECK-NEXT: lw a2, 1632(a0)
+; CHECK-NEXT: lw a3, 1636(a0)
+; CHECK-NEXT: sw a2, 420(sp)
+; CHECK-NEXT: sw a3, 424(sp)
+; CHECK-NEXT: lw a2, 1640(a0)
+; CHECK-NEXT: lw a3, 1644(a0)
+; CHECK-NEXT: sw a2, 412(sp)
+; CHECK-NEXT: sw a3, 416(sp)
+; CHECK-NEXT: lw a2, 1648(a0)
+; CHECK-NEXT: lw a3, 1652(a0)
+; CHECK-NEXT: sw a2, 404(sp)
+; CHECK-NEXT: sw a3, 408(sp)
+; CHECK-NEXT: lw a2, 1656(a0)
+; CHECK-NEXT: lw a3, 1660(a0)
+; CHECK-NEXT: sw a2, 396(sp)
+; CHECK-NEXT: sw a3, 400(sp)
+; CHECK-NEXT: lw a2, 1664(a0)
+; CHECK-NEXT: lw a3, 1668(a0)
+; CHECK-NEXT: sw a2, 388(sp)
+; CHECK-NEXT: sw a3, 392(sp)
+; CHECK-NEXT: lw a2, 1672(a0)
+; CHECK-NEXT: lw a3, 1676(a0)
+; CHECK-NEXT: sw a2, 380(sp)
+; CHECK-NEXT: sw a3, 384(sp)
+; CHECK-NEXT: lw a2, 1680(a0)
+; CHECK-NEXT: lw a3, 1684(a0)
+; CHECK-NEXT: sw a2, 372(sp)
+; CHECK-NEXT: sw a3, 376(sp)
+; CHECK-NEXT: lw a2, 1688(a0)
+; CHECK-NEXT: lw a3, 1692(a0)
+; CHECK-NEXT: sw a2, 364(sp)
+; CHECK-NEXT: sw a3, 368(sp)
+; CHECK-NEXT: lw a2, 1696(a0)
+; CHECK-NEXT: lw a3, 1700(a0)
+; CHECK-NEXT: sw a2, 356(sp)
+; CHECK-NEXT: sw a3, 360(sp)
+; CHECK-NEXT: lw a2, 1704(a0)
+; CHECK-NEXT: lw a3, 1708(a0)
+; CHECK-NEXT: sw a2, 348(sp)
+; CHECK-NEXT: sw a3, 352(sp)
+; CHECK-NEXT: lw a2, 1712(a0)
+; CHECK-NEXT: lw a3, 1716(a0)
+; CHECK-NEXT: sw a2, 340(sp)
+; CHECK-NEXT: sw a3, 344(sp)
+; CHECK-NEXT: lw a2, 1720(a0)
+; CHECK-NEXT: lw a3, 1724(a0)
+; CHECK-NEXT: sw a2, 332(sp)
+; CHECK-NEXT: sw a3, 336(sp)
+; CHECK-NEXT: lw a2, 1728(a0)
+; CHECK-NEXT: lw a3, 1732(a0)
+; CHECK-NEXT: sw a2, 324(sp)
+; CHECK-NEXT: sw a3, 328(sp)
+; CHECK-NEXT: lw a2, 1736(a0)
+; CHECK-NEXT: lw a3, 1740(a0)
+; CHECK-NEXT: sw a2, 316(sp)
+; CHECK-NEXT: sw a3, 320(sp)
+; CHECK-NEXT: lw a2, 1744(a0)
+; CHECK-NEXT: lw a3, 1748(a0)
+; CHECK-NEXT: sw a2, 308(sp)
+; CHECK-NEXT: sw a3, 312(sp)
+; CHECK-NEXT: lw a2, 1752(a0)
+; CHECK-NEXT: lw a3, 1756(a0)
+; CHECK-NEXT: sw a2, 300(sp)
+; CHECK-NEXT: sw a3, 304(sp)
+; CHECK-NEXT: lw a2, 1760(a0)
+; CHECK-NEXT: lw a3, 1764(a0)
+; CHECK-NEXT: sw a2, 292(sp)
+; CHECK-NEXT: sw a3, 296(sp)
+; CHECK-NEXT: lw a2, 1768(a0)
+; CHECK-NEXT: lw a3, 1772(a0)
+; CHECK-NEXT: sw a2, 284(sp)
+; CHECK-NEXT: sw a3, 288(sp)
+; CHECK-NEXT: lw a2, 1776(a0)
+; CHECK-NEXT: lw a3, 1780(a0)
+; CHECK-NEXT: sw a2, 276(sp)
+; CHECK-NEXT: sw a3, 280(sp)
+; CHECK-NEXT: lw a2, 1784(a0)
+; CHECK-NEXT: lw a3, 1788(a0)
+; CHECK-NEXT: sw a2, 268(sp)
+; CHECK-NEXT: sw a3, 272(sp)
+; CHECK-NEXT: lw a2, 1792(a0)
+; CHECK-NEXT: lw a3, 1796(a0)
+; CHECK-NEXT: sw a2, 260(sp)
+; CHECK-NEXT: sw a3, 264(sp)
+; CHECK-NEXT: lw a2, 1800(a0)
+; CHECK-NEXT: lw a3, 1804(a0)
+; CHECK-NEXT: sw a2, 252(sp)
+; CHECK-NEXT: sw a3, 256(sp)
+; CHECK-NEXT: lw a2, 1808(a0)
+; CHECK-NEXT: lw a3, 1812(a0)
+; CHECK-NEXT: sw a2, 244(sp)
+; CHECK-NEXT: sw a3, 248(sp)
+; CHECK-NEXT: lw a2, 1816(a0)
+; CHECK-NEXT: lw a3, 1820(a0)
+; CHECK-NEXT: sw a2, 236(sp)
+; CHECK-NEXT: sw a3, 240(sp)
+; CHECK-NEXT: lw a2, 1824(a0)
+; CHECK-NEXT: lw a3, 1828(a0)
+; CHECK-NEXT: sw a2, 228(sp)
+; CHECK-NEXT: sw a3, 232(sp)
+; CHECK-NEXT: lw a2, 1832(a0)
+; CHECK-NEXT: lw a3, 1836(a0)
+; CHECK-NEXT: sw a2, 220(sp)
+; CHECK-NEXT: sw a3, 224(sp)
+; CHECK-NEXT: lw a2, 1840(a0)
+; CHECK-NEXT: lw a3, 1844(a0)
+; CHECK-NEXT: sw a2, 212(sp)
+; CHECK-NEXT: sw a3, 216(sp)
+; CHECK-NEXT: lw a2, 1848(a0)
+; CHECK-NEXT: lw a3, 1852(a0)
+; CHECK-NEXT: sw a2, 204(sp)
+; CHECK-NEXT: sw a3, 208(sp)
+; CHECK-NEXT: lw a2, 1856(a0)
+; CHECK-NEXT: lw a3, 1860(a0)
+; CHECK-NEXT: sw a2, 196(sp)
+; CHECK-NEXT: sw a3, 200(sp)
+; CHECK-NEXT: lw a2, 1864(a0)
+; CHECK-NEXT: lw a3, 1868(a0)
+; CHECK-NEXT: sw a2, 188(sp)
+; CHECK-NEXT: sw a3, 192(sp)
+; CHECK-NEXT: lw a2, 1872(a0)
+; CHECK-NEXT: lw a3, 1876(a0)
+; CHECK-NEXT: sw a2, 180(sp)
+; CHECK-NEXT: sw a3, 184(sp)
+; CHECK-NEXT: lw a2, 1880(a0)
+; CHECK-NEXT: lw a3, 1884(a0)
+; CHECK-NEXT: sw a2, 172(sp)
+; CHECK-NEXT: sw a3, 176(sp)
+; CHECK-NEXT: lw a2, 1888(a0)
+; CHECK-NEXT: lw a3, 1892(a0)
+; CHECK-NEXT: sw a2, 164(sp)
+; CHECK-NEXT: sw a3, 168(sp)
+; CHECK-NEXT: lw a2, 1896(a0)
+; CHECK-NEXT: lw a3, 1900(a0)
+; CHECK-NEXT: sw a2, 156(sp)
+; CHECK-NEXT: sw a3, 160(sp)
+; CHECK-NEXT: lw a2, 1904(a0)
+; CHECK-NEXT: lw a3, 1908(a0)
+; CHECK-NEXT: sw a2, 148(sp)
+; CHECK-NEXT: sw a3, 152(sp)
+; CHECK-NEXT: lw a2, 1912(a0)
+; CHECK-NEXT: lw a3, 1916(a0)
+; CHECK-NEXT: sw a2, 140(sp)
+; CHECK-NEXT: sw a3, 144(sp)
+; CHECK-NEXT: lw a2, 1920(a0)
+; CHECK-NEXT: lw a3, 1924(a0)
+; CHECK-NEXT: sw a2, 132(sp)
+; CHECK-NEXT: sw a3, 136(sp)
+; CHECK-NEXT: lw a2, 1928(a0)
+; CHECK-NEXT: lw a3, 1932(a0)
+; CHECK-NEXT: sw a2, 124(sp)
+; CHECK-NEXT: sw a3, 128(sp)
+; CHECK-NEXT: lw a2, 1936(a0)
+; CHECK-NEXT: lw a3, 1940(a0)
+; CHECK-NEXT: sw a2, 116(sp)
+; CHECK-NEXT: sw a3, 120(sp)
+; CHECK-NEXT: lw a2, 1944(a0)
+; CHECK-NEXT: lw a3, 1948(a0)
+; CHECK-NEXT: sw a2, 108(sp)
+; CHECK-NEXT: sw a3, 112(sp)
+; CHECK-NEXT: lw a2, 1952(a0)
+; CHECK-NEXT: lw a3, 1956(a0)
+; CHECK-NEXT: sw a2, 100(sp)
+; CHECK-NEXT: sw a3, 104(sp)
+; CHECK-NEXT: lw a2, 1960(a0)
+; CHECK-NEXT: lw a3, 1964(a0)
+; CHECK-NEXT: sw a2, 92(sp)
+; CHECK-NEXT: sw a3, 96(sp)
+; CHECK-NEXT: lw a2, 1968(a0)
+; CHECK-NEXT: lw a3, 1972(a0)
+; CHECK-NEXT: sw a2, 84(sp)
+; CHECK-NEXT: sw a3, 88(sp)
+; CHECK-NEXT: lw a2, 1976(a0)
+; CHECK-NEXT: lw a3, 1980(a0)
+; CHECK-NEXT: sw a2, 76(sp)
+; CHECK-NEXT: sw a3, 80(sp)
+; CHECK-NEXT: lw a2, 1984(a0)
+; CHECK-NEXT: lw a3, 1988(a0)
+; CHECK-NEXT: sw a2, 68(sp)
+; CHECK-NEXT: sw a3, 72(sp)
+; CHECK-NEXT: lw a2, 1992(a0)
+; CHECK-NEXT: lw a3, 1996(a0)
+; CHECK-NEXT: sw a2, 60(sp)
+; CHECK-NEXT: sw a3, 64(sp)
+; CHECK-NEXT: lw a2, 2000(a0)
+; CHECK-NEXT: lw a3, 2004(a0)
+; CHECK-NEXT: sw a2, 52(sp)
+; CHECK-NEXT: sw a3, 56(sp)
+; CHECK-NEXT: lw a2, 2008(a0)
+; CHECK-NEXT: lw a3, 2012(a0)
+; CHECK-NEXT: sw a2, 44(sp)
+; CHECK-NEXT: sw a3, 48(sp)
+; CHECK-NEXT: lw a2, 2016(a0)
+; CHECK-NEXT: lw a3, 2020(a0)
+; CHECK-NEXT: sw a2, 36(sp)
+; CHECK-NEXT: sw a3, 40(sp)
+; CHECK-NEXT: lw a2, 2024(a0)
+; CHECK-NEXT: lw a3, 2028(a0)
+; CHECK-NEXT: sw a2, 28(sp)
+; CHECK-NEXT: sw a3, 32(sp)
+; CHECK-NEXT: lw a2, 2032(a0)
+; CHECK-NEXT: lw a3, 2036(a0)
+; CHECK-NEXT: sw a2, 20(sp)
+; CHECK-NEXT: sw a3, 24(sp)
+; CHECK-NEXT: lw a2, 2040(a0)
+; CHECK-NEXT: lw a3, 2044(a0)
+; CHECK-NEXT: sw a2, 12(sp)
+; CHECK-NEXT: sw a3, 16(sp)
+; CHECK-NEXT: #APP
+; CHECK-NEXT: #NO_APP
+; CHECK-NEXT: lw a0, 8(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lui a1, 1
+; CHECK-NEXT: add a1, sp, a1
+; CHECK-NEXT: lw a2, -2044(a1)
+; CHECK-NEXT: lw a3, -2040(a1)
+; CHECK-NEXT: sw a2, 0(a0)
+; CHECK-NEXT: sw a3, 4(a0)
+; CHECK-NEXT: addi a1, sp, 2044
+; CHECK-NEXT: lw a2, 0(a1)
+; CHECK-NEXT: lw a3, 4(a1)
+; CHECK-NEXT: sw a2, 8(a0)
+; CHECK-NEXT: sw a3, 12(a0)
+; CHECK-NEXT: lw a2, 2036(sp)
+; CHECK-NEXT: lw a3, 2040(sp)
+; CHECK-NEXT: sw a2, 16(a0)
+; CHECK-NEXT: sw a3, 20(a0)
+; CHECK-NEXT: lw a2, 2028(sp)
+; CHECK-NEXT: lw a3, 2032(sp)
+; CHECK-NEXT: sw a2, 24(a0)
+; CHECK-NEXT: sw a3, 28(a0)
+; CHECK-NEXT: lw a2, 2020(sp)
+; CHECK-NEXT: lw a3, 2024(sp)
+; CHECK-NEXT: sw a2, 32(a0)
+; CHECK-NEXT: sw a3, 36(a0)
+; CHECK-NEXT: lw a2, 2012(sp)
+; CHECK-NEXT: lw a3, 2016(sp)
+; CHECK-NEXT: sw a2, 40(a0)
+; CHECK-NEXT: sw a3, 44(a0)
+; CHECK-NEXT: lw a2, 2004(sp)
+; CHECK-NEXT: lw a3, 2008(sp)
+; CHECK-NEXT: sw a2, 48(a0)
+; CHECK-NEXT: sw a3, 52(a0)
+; CHECK-NEXT: lw a2, 1996(sp)
+; CHECK-NEXT: lw a3, 2000(sp)
+; CHECK-NEXT: sw a2, 56(a0)
+; CHECK-NEXT: sw a3, 60(a0)
+; CHECK-NEXT: lw a2, 1988(sp)
+; CHECK-NEXT: lw a3, 1992(sp)
+; CHECK-NEXT: sw a2, 64(a0)
+; CHECK-NEXT: sw a3, 68(a0)
+; CHECK-NEXT: lw a2, 1980(sp)
+; CHECK-NEXT: lw a3, 1984(sp)
+; CHECK-NEXT: sw a2, 72(a0)
+; CHECK-NEXT: sw a3, 76(a0)
+; CHECK-NEXT: lw a2, 1972(sp)
+; CHECK-NEXT: lw a3, 1976(sp)
+; CHECK-NEXT: sw a2, 80(a0)
+; CHECK-NEXT: sw a3, 84(a0)
+; CHECK-NEXT: lw a2, 1964(sp)
+; CHECK-NEXT: lw a3, 1968(sp)
+; CHECK-NEXT: sw a2, 88(a0)
+; CHECK-NEXT: sw a3, 92(a0)
+; CHECK-NEXT: lw a2, 1956(sp)
+; CHECK-NEXT: lw a3, 1960(sp)
+; CHECK-NEXT: sw a2, 96(a0)
+; CHECK-NEXT: sw a3, 100(a0)
+; CHECK-NEXT: lw a2, 1948(sp)
+; CHECK-NEXT: lw a3, 1952(sp)
+; CHECK-NEXT: sw a2, 104(a0)
+; CHECK-NEXT: sw a3, 108(a0)
+; CHECK-NEXT: lw a2, 1940(sp)
+; CHECK-NEXT: lw a3, 1944(sp)
+; CHECK-NEXT: sw a2, 112(a0)
+; CHECK-NEXT: sw a3, 116(a0)
+; CHECK-NEXT: lw a2, 1932(sp)
+; CHECK-NEXT: lw a3, 1936(sp)
+; CHECK-NEXT: sw a2, 120(a0)
+; CHECK-NEXT: sw a3, 124(a0)
+; CHECK-NEXT: lw a2, 1924(sp)
+; CHECK-NEXT: lw a3, 1928(sp)
+; CHECK-NEXT: sw a2, 128(a0)
+; CHECK-NEXT: sw a3, 132(a0)
+; CHECK-NEXT: lw a2, 1916(sp)
+; CHECK-NEXT: lw a3, 1920(sp)
+; CHECK-NEXT: sw a2, 136(a0)
+; CHECK-NEXT: sw a3, 140(a0)
+; CHECK-NEXT: lw a2, 1908(sp)
+; CHECK-NEXT: lw a3, 1912(sp)
+; CHECK-NEXT: sw a2, 144(a0)
+; CHECK-NEXT: sw a3, 148(a0)
+; CHECK-NEXT: lw a2, 1900(sp)
+; CHECK-NEXT: lw a3, 1904(sp)
+; CHECK-NEXT: sw a2, 152(a0)
+; CHECK-NEXT: sw a3, 156(a0)
+; CHECK-NEXT: lw a2, 1892(sp)
+; CHECK-NEXT: lw a3, 1896(sp)
+; CHECK-NEXT: sw a2, 160(a0)
+; CHECK-NEXT: sw a3, 164(a0)
+; CHECK-NEXT: lw a2, 1884(sp)
+; CHECK-NEXT: lw a3, 1888(sp)
+; CHECK-NEXT: sw a2, 168(a0)
+; CHECK-NEXT: sw a3, 172(a0)
+; CHECK-NEXT: lw a2, 1876(sp)
+; CHECK-NEXT: lw a3, 1880(sp)
+; CHECK-NEXT: sw a2, 176(a0)
+; CHECK-NEXT: sw a3, 180(a0)
+; CHECK-NEXT: lw a2, 1868(sp)
+; CHECK-NEXT: lw a3, 1872(sp)
+; CHECK-NEXT: sw a2, 184(a0)
+; CHECK-NEXT: sw a3, 188(a0)
+; CHECK-NEXT: lw a2, 1860(sp)
+; CHECK-NEXT: lw a3, 1864(sp)
+; CHECK-NEXT: sw a2, 192(a0)
+; CHECK-NEXT: sw a3, 196(a0)
+; CHECK-NEXT: lw a2, 1852(sp)
+; CHECK-NEXT: lw a3, 1856(sp)
+; CHECK-NEXT: sw a2, 200(a0)
+; CHECK-NEXT: sw a3, 204(a0)
+; CHECK-NEXT: lw a2, 1844(sp)
+; CHECK-NEXT: lw a3, 1848(sp)
+; CHECK-NEXT: sw a2, 208(a0)
+; CHECK-NEXT: sw a3, 212(a0)
+; CHECK-NEXT: lw a2, 1836(sp)
+; CHECK-NEXT: lw a3, 1840(sp)
+; CHECK-NEXT: sw a2, 216(a0)
+; CHECK-NEXT: sw a3, 220(a0)
+; CHECK-NEXT: lw a2, 1828(sp)
+; CHECK-NEXT: lw a3, 1832(sp)
+; CHECK-NEXT: sw a2, 224(a0)
+; CHECK-NEXT: sw a3, 228(a0)
+; CHECK-NEXT: lw a2, 1820(sp)
+; CHECK-NEXT: lw a3, 1824(sp)
+; CHECK-NEXT: sw a2, 232(a0)
+; CHECK-NEXT: sw a3, 236(a0)
+; CHECK-NEXT: lw a2, 1812(sp)
+; CHECK-NEXT: lw a3, 1816(sp)
+; CHECK-NEXT: sw a2, 240(a0)
+; CHECK-NEXT: sw a3, 244(a0)
+; CHECK-NEXT: lw a2, 1804(sp)
+; CHECK-NEXT: lw a3, 1808(sp)
+; CHECK-NEXT: sw a2, 248(a0)
+; CHECK-NEXT: sw a3, 252(a0)
+; CHECK-NEXT: lw a2, 1796(sp)
+; CHECK-NEXT: lw a3, 1800(sp)
+; CHECK-NEXT: sw a2, 256(a0)
+; CHECK-NEXT: sw a3, 260(a0)
+; CHECK-NEXT: lw a2, 1788(sp)
+; CHECK-NEXT: lw a3, 1792(sp)
+; CHECK-NEXT: sw a2, 264(a0)
+; CHECK-NEXT: sw a3, 268(a0)
+; CHECK-NEXT: lw a2, 1780(sp)
+; CHECK-NEXT: lw a3, 1784(sp)
+; CHECK-NEXT: sw a2, 272(a0)
+; CHECK-NEXT: sw a3, 276(a0)
+; CHECK-NEXT: lw a2, 1772(sp)
+; CHECK-NEXT: lw a3, 1776(sp)
+; CHECK-NEXT: sw a2, 280(a0)
+; CHECK-NEXT: sw a3, 284(a0)
+; CHECK-NEXT: lw a2, 1764(sp)
+; CHECK-NEXT: lw a3, 1768(sp)
+; CHECK-NEXT: sw a2, 288(a0)
+; CHECK-NEXT: sw a3, 292(a0)
+; CHECK-NEXT: lw a2, 1756(sp)
+; CHECK-NEXT: lw a3, 1760(sp)
+; CHECK-NEXT: sw a2, 296(a0)
+; CHECK-NEXT: sw a3, 300(a0)
+; CHECK-NEXT: lw a2, 1748(sp)
+; CHECK-NEXT: lw a3, 1752(sp)
+; CHECK-NEXT: sw a2, 304(a0)
+; CHECK-NEXT: sw a3, 308(a0)
+; CHECK-NEXT: lw a2, 1740(sp)
+; CHECK-NEXT: lw a3, 1744(sp)
+; CHECK-NEXT: sw a2, 312(a0)
+; CHECK-NEXT: sw a3, 316(a0)
+; CHECK-NEXT: lw a2, 1732(sp)
+; CHECK-NEXT: lw a3, 1736(sp)
+; CHECK-NEXT: sw a2, 320(a0)
+; CHECK-NEXT: sw a3, 324(a0)
+; CHECK-NEXT: lw a2, 1724(sp)
+; CHECK-NEXT: lw a3, 1728(sp)
+; CHECK-NEXT: sw a2, 328(a0)
+; CHECK-NEXT: sw a3, 332(a0)
+; CHECK-NEXT: lw a2, 1716(sp)
+; CHECK-NEXT: lw a3, 1720(sp)
+; CHECK-NEXT: sw a2, 336(a0)
+; CHECK-NEXT: sw a3, 340(a0)
+; CHECK-NEXT: lw a2, 1708(sp)
+; CHECK-NEXT: lw a3, 1712(sp)
+; CHECK-NEXT: sw a2, 344(a0)
+; CHECK-NEXT: sw a3, 348(a0)
+; CHECK-NEXT: lw a2, 1700(sp)
+; CHECK-NEXT: lw a3, 1704(sp)
+; CHECK-NEXT: sw a2, 352(a0)
+; CHECK-NEXT: sw a3, 356(a0)
+; CHECK-NEXT: lw a2, 1692(sp)
+; CHECK-NEXT: lw a3, 1696(sp)
+; CHECK-NEXT: sw a2, 360(a0)
+; CHECK-NEXT: sw a3, 364(a0)
+; CHECK-NEXT: lw a2, 1684(sp)
+; CHECK-NEXT: lw a3, 1688(sp)
+; CHECK-NEXT: sw a2, 368(a0)
+; CHECK-NEXT: sw a3, 372(a0)
+; CHECK-NEXT: lw a2, 1676(sp)
+; CHECK-NEXT: lw a3, 1680(sp)
+; CHECK-NEXT: sw a2, 376(a0)
+; CHECK-NEXT: sw a3, 380(a0)
+; CHECK-NEXT: lw a2, 1668(sp)
+; CHECK-NEXT: lw a3, 1672(sp)
+; CHECK-NEXT: sw a2, 384(a0)
+; CHECK-NEXT: sw a3, 388(a0)
+; CHECK-NEXT: lw a2, 1660(sp)
+; CHECK-NEXT: lw a3, 1664(sp)
+; CHECK-NEXT: sw a2, 392(a0)
+; CHECK-NEXT: sw a3, 396(a0)
+; CHECK-NEXT: lw a2, 1652(sp)
+; CHECK-NEXT: lw a3, 1656(sp)
+; CHECK-NEXT: sw a2, 400(a0)
+; CHECK-NEXT: sw a3, 404(a0)
+; CHECK-NEXT: lw a2, 1644(sp)
+; CHECK-NEXT: lw a3, 1648(sp)
+; CHECK-NEXT: sw a2, 408(a0)
+; CHECK-NEXT: sw a3, 412(a0)
+; CHECK-NEXT: lw a2, 1636(sp)
+; CHECK-NEXT: lw a3, 1640(sp)
+; CHECK-NEXT: sw a2, 416(a0)
+; CHECK-NEXT: sw a3, 420(a0)
+; CHECK-NEXT: lw a2, 1628(sp)
+; CHECK-NEXT: lw a3, 1632(sp)
+; CHECK-NEXT: sw a2, 424(a0)
+; CHECK-NEXT: sw a3, 428(a0)
+; CHECK-NEXT: lw a2, 1620(sp)
+; CHECK-NEXT: lw a3, 1624(sp)
+; CHECK-NEXT: sw a2, 432(a0)
+; CHECK-NEXT: sw a3, 436(a0)
+; CHECK-NEXT: lw a2, 1612(sp)
+; CHECK-NEXT: lw a3, 1616(sp)
+; CHECK-NEXT: sw a2, 440(a0)
+; CHECK-NEXT: sw a3, 444(a0)
+; CHECK-NEXT: lw a2, 1604(sp)
+; CHECK-NEXT: lw a3, 1608(sp)
+; CHECK-NEXT: sw a2, 448(a0)
+; CHECK-NEXT: sw a3, 452(a0)
+; CHECK-NEXT: lw a2, 1596(sp)
+; CHECK-NEXT: lw a3, 1600(sp)
+; CHECK-NEXT: sw a2, 456(a0)
+; CHECK-NEXT: sw a3, 460(a0)
+; CHECK-NEXT: lw a2, 1588(sp)
+; CHECK-NEXT: lw a3, 1592(sp)
+; CHECK-NEXT: sw a2, 464(a0)
+; CHECK-NEXT: sw a3, 468(a0)
+; CHECK-NEXT: lw a2, 1580(sp)
+; CHECK-NEXT: lw a3, 1584(sp)
+; CHECK-NEXT: sw a2, 472(a0)
+; CHECK-NEXT: sw a3, 476(a0)
+; CHECK-NEXT: lw a2, 1572(sp)
+; CHECK-NEXT: lw a3, 1576(sp)
+; CHECK-NEXT: sw a2, 480(a0)
+; CHECK-NEXT: sw a3, 484(a0)
+; CHECK-NEXT: lw a2, 1564(sp)
+; CHECK-NEXT: lw a3, 1568(sp)
+; CHECK-NEXT: sw a2, 488(a0)
+; CHECK-NEXT: sw a3, 492(a0)
+; CHECK-NEXT: lw a2, 1556(sp)
+; CHECK-NEXT: lw a3, 1560(sp)
+; CHECK-NEXT: sw a2, 496(a0)
+; CHECK-NEXT: sw a3, 500(a0)
+; CHECK-NEXT: lw a2, 1548(sp)
+; CHECK-NEXT: lw a3, 1552(sp)
+; CHECK-NEXT: sw a2, 504(a0)
+; CHECK-NEXT: sw a3, 508(a0)
+; CHECK-NEXT: lw a2, 1540(sp)
+; CHECK-NEXT: lw a3, 1544(sp)
+; CHECK-NEXT: sw a2, 512(a0)
+; CHECK-NEXT: sw a3, 516(a0)
+; CHECK-NEXT: lw a2, 1532(sp)
+; CHECK-NEXT: lw a3, 1536(sp)
+; CHECK-NEXT: sw a2, 520(a0)
+; CHECK-NEXT: sw a3, 524(a0)
+; CHECK-NEXT: lw a2, 1524(sp)
+; CHECK-NEXT: lw a3, 1528(sp)
+; CHECK-NEXT: sw a2, 528(a0)
+; CHECK-NEXT: sw a3, 532(a0)
+; CHECK-NEXT: lw a2, 1516(sp)
+; CHECK-NEXT: lw a3, 1520(sp)
+; CHECK-NEXT: sw a2, 536(a0)
+; CHECK-NEXT: sw a3, 540(a0)
+; CHECK-NEXT: lw a2, 1508(sp)
+; CHECK-NEXT: lw a3, 1512(sp)
+; CHECK-NEXT: sw a2, 544(a0)
+; CHECK-NEXT: sw a3, 548(a0)
+; CHECK-NEXT: lw a2, 1500(sp)
+; CHECK-NEXT: lw a3, 1504(sp)
+; CHECK-NEXT: sw a2, 552(a0)
+; CHECK-NEXT: sw a3, 556(a0)
+; CHECK-NEXT: lw a2, 1492(sp)
+; CHECK-NEXT: lw a3, 1496(sp)
+; CHECK-NEXT: sw a2, 560(a0)
+; CHECK-NEXT: sw a3, 564(a0)
+; CHECK-NEXT: lw a2, 1484(sp)
+; CHECK-NEXT: lw a3, 1488(sp)
+; CHECK-NEXT: sw a2, 568(a0)
+; CHECK-NEXT: sw a3, 572(a0)
+; CHECK-NEXT: lw a2, 1476(sp)
+; CHECK-NEXT: lw a3, 1480(sp)
+; CHECK-NEXT: sw a2, 576(a0)
+; CHECK-NEXT: sw a3, 580(a0)
+; CHECK-NEXT: lw a2, 1468(sp)
+; CHECK-NEXT: lw a3, 1472(sp)
+; CHECK-NEXT: sw a2, 584(a0)
+; CHECK-NEXT: sw a3, 588(a0)
+; CHECK-NEXT: lw a2, 1460(sp)
+; CHECK-NEXT: lw a3, 1464(sp)
+; CHECK-NEXT: sw a2, 592(a0)
+; CHECK-NEXT: sw a3, 596(a0)
+; CHECK-NEXT: lw a2, 1452(sp)
+; CHECK-NEXT: lw a3, 1456(sp)
+; CHECK-NEXT: sw a2, 600(a0)
+; CHECK-NEXT: sw a3, 604(a0)
+; CHECK-NEXT: lw a2, 1444(sp)
+; CHECK-NEXT: lw a3, 1448(sp)
+; CHECK-NEXT: sw a2, 608(a0)
+; CHECK-NEXT: sw a3, 612(a0)
+; CHECK-NEXT: lw a2, 1436(sp)
+; CHECK-NEXT: lw a3, 1440(sp)
+; CHECK-NEXT: sw a2, 616(a0)
+; CHECK-NEXT: sw a3, 620(a0)
+; CHECK-NEXT: lw a2, 1428(sp)
+; CHECK-NEXT: lw a3, 1432(sp)
+; CHECK-NEXT: sw a2, 624(a0)
+; CHECK-NEXT: sw a3, 628(a0)
+; CHECK-NEXT: lw a2, 1420(sp)
+; CHECK-NEXT: lw a3, 1424(sp)
+; CHECK-NEXT: sw a2, 632(a0)
+; CHECK-NEXT: sw a3, 636(a0)
+; CHECK-NEXT: lw a2, 1412(sp)
+; CHECK-NEXT: lw a3, 1416(sp)
+; CHECK-NEXT: sw a2, 640(a0)
+; CHECK-NEXT: sw a3, 644(a0)
+; CHECK-NEXT: lw a2, 1404(sp)
+; CHECK-NEXT: lw a3, 1408(sp)
+; CHECK-NEXT: sw a2, 648(a0)
+; CHECK-NEXT: sw a3, 652(a0)
+; CHECK-NEXT: lw a2, 1396(sp)
+; CHECK-NEXT: lw a3, 1400(sp)
+; CHECK-NEXT: sw a2, 656(a0)
+; CHECK-NEXT: sw a3, 660(a0)
+; CHECK-NEXT: lw a2, 1388(sp)
+; CHECK-NEXT: lw a3, 1392(sp)
+; CHECK-NEXT: sw a2, 664(a0)
+; CHECK-NEXT: sw a3, 668(a0)
+; CHECK-NEXT: lw a2, 1380(sp)
+; CHECK-NEXT: lw a3, 1384(sp)
+; CHECK-NEXT: sw a2, 672(a0)
+; CHECK-NEXT: sw a3, 676(a0)
+; CHECK-NEXT: lw a2, 1372(sp)
+; CHECK-NEXT: lw a3, 1376(sp)
+; CHECK-NEXT: sw a2, 680(a0)
+; CHECK-NEXT: sw a3, 684(a0)
+; CHECK-NEXT: lw a2, 1364(sp)
+; CHECK-NEXT: lw a3, 1368(sp)
+; CHECK-NEXT: sw a2, 688(a0)
+; CHECK-NEXT: sw a3, 692(a0)
+; CHECK-NEXT: lw a2, 1356(sp)
+; CHECK-NEXT: lw a3, 1360(sp)
+; CHECK-NEXT: sw a2, 696(a0)
+; CHECK-NEXT: sw a3, 700(a0)
+; CHECK-NEXT: lw a2, 1348(sp)
+; CHECK-NEXT: lw a3, 1352(sp)
+; CHECK-NEXT: sw a2, 704(a0)
+; CHECK-NEXT: sw a3, 708(a0)
+; CHECK-NEXT: lw a2, 1340(sp)
+; CHECK-NEXT: lw a3, 1344(sp)
+; CHECK-NEXT: sw a2, 712(a0)
+; CHECK-NEXT: sw a3, 716(a0)
+; CHECK-NEXT: lw a2, 1332(sp)
+; CHECK-NEXT: lw a3, 1336(sp)
+; CHECK-NEXT: sw a2, 720(a0)
+; CHECK-NEXT: sw a3, 724(a0)
+; CHECK-NEXT: lw a2, 1324(sp)
+; CHECK-NEXT: lw a3, 1328(sp)
+; CHECK-NEXT: sw a2, 728(a0)
+; CHECK-NEXT: sw a3, 732(a0)
+; CHECK-NEXT: lw a2, 1316(sp)
+; CHECK-NEXT: lw a3, 1320(sp)
+; CHECK-NEXT: sw a2, 736(a0)
+; CHECK-NEXT: sw a3, 740(a0)
+; CHECK-NEXT: lw a2, 1308(sp)
+; CHECK-NEXT: lw a3, 1312(sp)
+; CHECK-NEXT: sw a2, 744(a0)
+; CHECK-NEXT: sw a3, 748(a0)
+; CHECK-NEXT: lw a2, 1300(sp)
+; CHECK-NEXT: lw a3, 1304(sp)
+; CHECK-NEXT: sw a2, 752(a0)
+; CHECK-NEXT: sw a3, 756(a0)
+; CHECK-NEXT: lw a2, 1292(sp)
+; CHECK-NEXT: lw a3, 1296(sp)
+; CHECK-NEXT: sw a2, 760(a0)
+; CHECK-NEXT: sw a3, 764(a0)
+; CHECK-NEXT: lw a2, 1284(sp)
+; CHECK-NEXT: lw a3, 1288(sp)
+; CHECK-NEXT: sw a2, 768(a0)
+; CHECK-NEXT: sw a3, 772(a0)
+; CHECK-NEXT: lw a2, 1276(sp)
+; CHECK-NEXT: lw a3, 1280(sp)
+; CHECK-NEXT: sw a2, 776(a0)
+; CHECK-NEXT: sw a3, 780(a0)
+; CHECK-NEXT: lw a2, 1268(sp)
+; CHECK-NEXT: lw a3, 1272(sp)
+; CHECK-NEXT: sw a2, 784(a0)
+; CHECK-NEXT: sw a3, 788(a0)
+; CHECK-NEXT: lw a2, 1260(sp)
+; CHECK-NEXT: lw a3, 1264(sp)
+; CHECK-NEXT: sw a2, 792(a0)
+; CHECK-NEXT: sw a3, 796(a0)
+; CHECK-NEXT: lw a2, 1252(sp)
+; CHECK-NEXT: lw a3, 1256(sp)
+; CHECK-NEXT: sw a2, 800(a0)
+; CHECK-NEXT: sw a3, 804(a0)
+; CHECK-NEXT: lw a2, 1244(sp)
+; CHECK-NEXT: lw a3, 1248(sp)
+; CHECK-NEXT: sw a2, 808(a0)
+; CHECK-NEXT: sw a3, 812(a0)
+; CHECK-NEXT: lw a2, 1236(sp)
+; CHECK-NEXT: lw a3, 1240(sp)
+; CHECK-NEXT: sw a2, 816(a0)
+; CHECK-NEXT: sw a3, 820(a0)
+; CHECK-NEXT: lw a2, 1228(sp)
+; CHECK-NEXT: lw a3, 1232(sp)
+; CHECK-NEXT: sw a2, 824(a0)
+; CHECK-NEXT: sw a3, 828(a0)
+; CHECK-NEXT: lw a2, 1220(sp)
+; CHECK-NEXT: lw a3, 1224(sp)
+; CHECK-NEXT: sw a2, 832(a0)
+; CHECK-NEXT: sw a3, 836(a0)
+; CHECK-NEXT: lw a2, 1212(sp)
+; CHECK-NEXT: lw a3, 1216(sp)
+; CHECK-NEXT: sw a2, 840(a0)
+; CHECK-NEXT: sw a3, 844(a0)
+; CHECK-NEXT: lw a2, 1204(sp)
+; CHECK-NEXT: lw a3, 1208(sp)
+; CHECK-NEXT: sw a2, 848(a0)
+; CHECK-NEXT: sw a3, 852(a0)
+; CHECK-NEXT: lw a2, 1196(sp)
+; CHECK-NEXT: lw a3, 1200(sp)
+; CHECK-NEXT: sw a2, 856(a0)
+; CHECK-NEXT: sw a3, 860(a0)
+; CHECK-NEXT: lw a2, 1188(sp)
+; CHECK-NEXT: lw a3, 1192(sp)
+; CHECK-NEXT: sw a2, 864(a0)
+; CHECK-NEXT: sw a3, 868(a0)
+; CHECK-NEXT: lw a2, 1180(sp)
+; CHECK-NEXT: lw a3, 1184(sp)
+; CHECK-NEXT: sw a2, 872(a0)
+; CHECK-NEXT: sw a3, 876(a0)
+; CHECK-NEXT: lw a2, 1172(sp)
+; CHECK-NEXT: lw a3, 1176(sp)
+; CHECK-NEXT: sw a2, 880(a0)
+; CHECK-NEXT: sw a3, 884(a0)
+; CHECK-NEXT: lw a2, 1164(sp)
+; CHECK-NEXT: lw a3, 1168(sp)
+; CHECK-NEXT: sw a2, 888(a0)
+; CHECK-NEXT: sw a3, 892(a0)
+; CHECK-NEXT: lw a2, 1156(sp)
+; CHECK-NEXT: lw a3, 1160(sp)
+; CHECK-NEXT: sw a2, 896(a0)
+; CHECK-NEXT: sw a3, 900(a0)
+; CHECK-NEXT: lw a2, 1148(sp)
+; CHECK-NEXT: lw a3, 1152(sp)
+; CHECK-NEXT: sw a2, 904(a0)
+; CHECK-NEXT: sw a3, 908(a0)
+; CHECK-NEXT: lw a2, 1140(sp)
+; CHECK-NEXT: lw a3, 1144(sp)
+; CHECK-NEXT: sw a2, 912(a0)
+; CHECK-NEXT: sw a3, 916(a0)
+; CHECK-NEXT: lw a2, 1132(sp)
+; CHECK-NEXT: lw a3, 1136(sp)
+; CHECK-NEXT: sw a2, 920(a0)
+; CHECK-NEXT: sw a3, 924(a0)
+; CHECK-NEXT: lw a2, 1124(sp)
+; CHECK-NEXT: lw a3, 1128(sp)
+; CHECK-NEXT: sw a2, 928(a0)
+; CHECK-NEXT: sw a3, 932(a0)
+; CHECK-NEXT: lw a2, 1116(sp)
+; CHECK-NEXT: lw a3, 1120(sp)
+; CHECK-NEXT: sw a2, 936(a0)
+; CHECK-NEXT: sw a3, 940(a0)
+; CHECK-NEXT: lw a2, 1108(sp)
+; CHECK-NEXT: lw a3, 1112(sp)
+; CHECK-NEXT: sw a2, 944(a0)
+; CHECK-NEXT: sw a3, 948(a0)
+; CHECK-NEXT: lw a2, 1100(sp)
+; CHECK-NEXT: lw a3, 1104(sp)
+; CHECK-NEXT: sw a2, 952(a0)
+; CHECK-NEXT: sw a3, 956(a0)
+; CHECK-NEXT: lw a2, 1092(sp)
+; CHECK-NEXT: lw a3, 1096(sp)
+; CHECK-NEXT: sw a2, 960(a0)
+; CHECK-NEXT: sw a3, 964(a0)
+; CHECK-NEXT: lw a2, 1084(sp)
+; CHECK-NEXT: lw a3, 1088(sp)
+; CHECK-NEXT: sw a2, 968(a0)
+; CHECK-NEXT: sw a3, 972(a0)
+; CHECK-NEXT: lw a2, 1076(sp)
+; CHECK-NEXT: lw a3, 1080(sp)
+; CHECK-NEXT: sw a2, 976(a0)
+; CHECK-NEXT: sw a3, 980(a0)
+; CHECK-NEXT: lw a2, 1068(sp)
+; CHECK-NEXT: lw a3, 1072(sp)
+; CHECK-NEXT: sw a2, 984(a0)
+; CHECK-NEXT: sw a3, 988(a0)
+; CHECK-NEXT: lw a2, 1060(sp)
+; CHECK-NEXT: lw a3, 1064(sp)
+; CHECK-NEXT: sw a2, 992(a0)
+; CHECK-NEXT: sw a3, 996(a0)
+; CHECK-NEXT: lw a2, 1052(sp)
+; CHECK-NEXT: lw a3, 1056(sp)
+; CHECK-NEXT: sw a2, 1000(a0)
+; CHECK-NEXT: sw a3, 1004(a0)
+; CHECK-NEXT: lw a2, 1044(sp)
+; CHECK-NEXT: lw a3, 1048(sp)
+; CHECK-NEXT: sw a2, 1008(a0)
+; CHECK-NEXT: sw a3, 1012(a0)
+; CHECK-NEXT: lw a2, 1036(sp)
+; CHECK-NEXT: lw a3, 1040(sp)
+; CHECK-NEXT: sw a2, 1016(a0)
+; CHECK-NEXT: sw a3, 1020(a0)
+; CHECK-NEXT: lw a2, 1028(sp)
+; CHECK-NEXT: lw a3, 1032(sp)
+; CHECK-NEXT: sw a2, 1024(a0)
+; CHECK-NEXT: sw a3, 1028(a0)
+; CHECK-NEXT: lw a2, 1020(sp)
+; CHECK-NEXT: lw a3, 1024(sp)
+; CHECK-NEXT: sw a2, 1032(a0)
+; CHECK-NEXT: sw a3, 1036(a0)
+; CHECK-NEXT: lw a2, 1012(sp)
+; CHECK-NEXT: lw a3, 1016(sp)
+; CHECK-NEXT: sw a2, 1040(a0)
+; CHECK-NEXT: sw a3, 1044(a0)
+; CHECK-NEXT: lw a2, 1004(sp)
+; CHECK-NEXT: lw a3, 1008(sp)
+; CHECK-NEXT: sw a2, 1048(a0)
+; CHECK-NEXT: sw a3, 1052(a0)
+; CHECK-NEXT: lw a2, 996(sp)
+; CHECK-NEXT: lw a3, 1000(sp)
+; CHECK-NEXT: sw a2, 1056(a0)
+; CHECK-NEXT: sw a3, 1060(a0)
+; CHECK-NEXT: lw a2, 988(sp)
+; CHECK-NEXT: lw a3, 992(sp)
+; CHECK-NEXT: sw a2, 1064(a0)
+; CHECK-NEXT: sw a3, 1068(a0)
+; CHECK-NEXT: lw a2, 980(sp)
+; CHECK-NEXT: lw a3, 984(sp)
+; CHECK-NEXT: sw a2, 1072(a0)
+; CHECK-NEXT: sw a3, 1076(a0)
+; CHECK-NEXT: lw a2, 972(sp)
+; CHECK-NEXT: lw a3, 976(sp)
+; CHECK-NEXT: sw a2, 1080(a0)
+; CHECK-NEXT: sw a3, 1084(a0)
+; CHECK-NEXT: lw a2, 964(sp)
+; CHECK-NEXT: lw a3, 968(sp)
+; CHECK-NEXT: sw a2, 1088(a0)
+; CHECK-NEXT: sw a3, 1092(a0)
+; CHECK-NEXT: lw a2, 956(sp)
+; CHECK-NEXT: lw a3, 960(sp)
+; CHECK-NEXT: sw a2, 1096(a0)
+; CHECK-NEXT: sw a3, 1100(a0)
+; CHECK-NEXT: lw a2, 948(sp)
+; CHECK-NEXT: lw a3, 952(sp)
+; CHECK-NEXT: sw a2, 1104(a0)
+; CHECK-NEXT: sw a3, 1108(a0)
+; CHECK-NEXT: lw a2, 940(sp)
+; CHECK-NEXT: lw a3, 944(sp)
+; CHECK-NEXT: sw a2, 1112(a0)
+; CHECK-NEXT: sw a3, 1116(a0)
+; CHECK-NEXT: lw a2, 932(sp)
+; CHECK-NEXT: lw a3, 936(sp)
+; CHECK-NEXT: sw a2, 1120(a0)
+; CHECK-NEXT: sw a3, 1124(a0)
+; CHECK-NEXT: lw a2, 924(sp)
+; CHECK-NEXT: lw a3, 928(sp)
+; CHECK-NEXT: sw a2, 1128(a0)
+; CHECK-NEXT: sw a3, 1132(a0)
+; CHECK-NEXT: lw a2, 916(sp)
+; CHECK-NEXT: lw a3, 920(sp)
+; CHECK-NEXT: sw a2, 1136(a0)
+; CHECK-NEXT: sw a3, 1140(a0)
+; CHECK-NEXT: lw a2, 908(sp)
+; CHECK-NEXT: lw a3, 912(sp)
+; CHECK-NEXT: sw a2, 1144(a0)
+; CHECK-NEXT: sw a3, 1148(a0)
+; CHECK-NEXT: lw a2, 900(sp)
+; CHECK-NEXT: lw a3, 904(sp)
+; CHECK-NEXT: sw a2, 1152(a0)
+; CHECK-NEXT: sw a3, 1156(a0)
+; CHECK-NEXT: lw a2, 892(sp)
+; CHECK-NEXT: lw a3, 896(sp)
+; CHECK-NEXT: sw a2, 1160(a0)
+; CHECK-NEXT: sw a3, 1164(a0)
+; CHECK-NEXT: lw a2, 884(sp)
+; CHECK-NEXT: lw a3, 888(sp)
+; CHECK-NEXT: sw a2, 1168(a0)
+; CHECK-NEXT: sw a3, 1172(a0)
+; CHECK-NEXT: lw a2, 876(sp)
+; CHECK-NEXT: lw a3, 880(sp)
+; CHECK-NEXT: sw a2, 1176(a0)
+; CHECK-NEXT: sw a3, 1180(a0)
+; CHECK-NEXT: lw a2, 868(sp)
+; CHECK-NEXT: lw a3, 872(sp)
+; CHECK-NEXT: sw a2, 1184(a0)
+; CHECK-NEXT: sw a3, 1188(a0)
+; CHECK-NEXT: lw a2, 860(sp)
+; CHECK-NEXT: lw a3, 864(sp)
+; CHECK-NEXT: sw a2, 1192(a0)
+; CHECK-NEXT: sw a3, 1196(a0)
+; CHECK-NEXT: lw a2, 852(sp)
+; CHECK-NEXT: lw a3, 856(sp)
+; CHECK-NEXT: sw a2, 1200(a0)
+; CHECK-NEXT: sw a3, 1204(a0)
+; CHECK-NEXT: lw a2, 844(sp)
+; CHECK-NEXT: lw a3, 848(sp)
+; CHECK-NEXT: sw a2, 1208(a0)
+; CHECK-NEXT: sw a3, 1212(a0)
+; CHECK-NEXT: lw a2, 836(sp)
+; CHECK-NEXT: lw a3, 840(sp)
+; CHECK-NEXT: sw a2, 1216(a0)
+; CHECK-NEXT: sw a3, 1220(a0)
+; CHECK-NEXT: lw a2, 828(sp)
+; CHECK-NEXT: lw a3, 832(sp)
+; CHECK-NEXT: sw a2, 1224(a0)
+; CHECK-NEXT: sw a3, 1228(a0)
+; CHECK-NEXT: lw a2, 820(sp)
+; CHECK-NEXT: lw a3, 824(sp)
+; CHECK-NEXT: sw a2, 1232(a0)
+; CHECK-NEXT: sw a3, 1236(a0)
+; CHECK-NEXT: lw a2, 812(sp)
+; CHECK-NEXT: lw a3, 816(sp)
+; CHECK-NEXT: sw a2, 1240(a0)
+; CHECK-NEXT: sw a3, 1244(a0)
+; CHECK-NEXT: lw a2, 804(sp)
+; CHECK-NEXT: lw a3, 808(sp)
+; CHECK-NEXT: sw a2, 1248(a0)
+; CHECK-NEXT: sw a3, 1252(a0)
+; CHECK-NEXT: lw a2, 796(sp)
+; CHECK-NEXT: lw a3, 800(sp)
+; CHECK-NEXT: sw a2, 1256(a0)
+; CHECK-NEXT: sw a3, 1260(a0)
+; CHECK-NEXT: lw a2, 788(sp)
+; CHECK-NEXT: lw a3, 792(sp)
+; CHECK-NEXT: sw a2, 1264(a0)
+; CHECK-NEXT: sw a3, 1268(a0)
+; CHECK-NEXT: lw a2, 780(sp)
+; CHECK-NEXT: lw a3, 784(sp)
+; CHECK-NEXT: sw a2, 1272(a0)
+; CHECK-NEXT: sw a3, 1276(a0)
+; CHECK-NEXT: lw a2, 772(sp)
+; CHECK-NEXT: lw a3, 776(sp)
+; CHECK-NEXT: sw a2, 1280(a0)
+; CHECK-NEXT: sw a3, 1284(a0)
+; CHECK-NEXT: lw a2, 764(sp)
+; CHECK-NEXT: lw a3, 768(sp)
+; CHECK-NEXT: sw a2, 1288(a0)
+; CHECK-NEXT: sw a3, 1292(a0)
+; CHECK-NEXT: lw a2, 756(sp)
+; CHECK-NEXT: lw a3, 760(sp)
+; CHECK-NEXT: sw a2, 1296(a0)
+; CHECK-NEXT: sw a3, 1300(a0)
+; CHECK-NEXT: lw a2, 748(sp)
+; CHECK-NEXT: lw a3, 752(sp)
+; CHECK-NEXT: sw a2, 1304(a0)
+; CHECK-NEXT: sw a3, 1308(a0)
+; CHECK-NEXT: lw a2, 740(sp)
+; CHECK-NEXT: lw a3, 744(sp)
+; CHECK-NEXT: sw a2, 1312(a0)
+; CHECK-NEXT: sw a3, 1316(a0)
+; CHECK-NEXT: lw a2, 732(sp)
+; CHECK-NEXT: lw a3, 736(sp)
+; CHECK-NEXT: sw a2, 1320(a0)
+; CHECK-NEXT: sw a3, 1324(a0)
+; CHECK-NEXT: lw a2, 724(sp)
+; CHECK-NEXT: lw a3, 728(sp)
+; CHECK-NEXT: sw a2, 1328(a0)
+; CHECK-NEXT: sw a3, 1332(a0)
+; CHECK-NEXT: lw a2, 716(sp)
+; CHECK-NEXT: lw a3, 720(sp)
+; CHECK-NEXT: sw a2, 1336(a0)
+; CHECK-NEXT: sw a3, 1340(a0)
+; CHECK-NEXT: lw a2, 708(sp)
+; CHECK-NEXT: lw a3, 712(sp)
+; CHECK-NEXT: sw a2, 1344(a0)
+; CHECK-NEXT: sw a3, 1348(a0)
+; CHECK-NEXT: lw a2, 700(sp)
+; CHECK-NEXT: lw a3, 704(sp)
+; CHECK-NEXT: sw a2, 1352(a0)
+; CHECK-NEXT: sw a3, 1356(a0)
+; CHECK-NEXT: lw a2, 692(sp)
+; CHECK-NEXT: lw a3, 696(sp)
+; CHECK-NEXT: sw a2, 1360(a0)
+; CHECK-NEXT: sw a3, 1364(a0)
+; CHECK-NEXT: lw a2, 684(sp)
+; CHECK-NEXT: lw a3, 688(sp)
+; CHECK-NEXT: sw a2, 1368(a0)
+; CHECK-NEXT: sw a3, 1372(a0)
+; CHECK-NEXT: lw a2, 676(sp)
+; CHECK-NEXT: lw a3, 680(sp)
+; CHECK-NEXT: sw a2, 1376(a0)
+; CHECK-NEXT: sw a3, 1380(a0)
+; CHECK-NEXT: lw a2, 668(sp)
+; CHECK-NEXT: lw a3, 672(sp)
+; CHECK-NEXT: sw a2, 1384(a0)
+; CHECK-NEXT: sw a3, 1388(a0)
+; CHECK-NEXT: lw a2, 660(sp)
+; CHECK-NEXT: lw a3, 664(sp)
+; CHECK-NEXT: sw a2, 1392(a0)
+; CHECK-NEXT: sw a3, 1396(a0)
+; CHECK-NEXT: lw a2, 652(sp)
+; CHECK-NEXT: lw a3, 656(sp)
+; CHECK-NEXT: sw a2, 1400(a0)
+; CHECK-NEXT: sw a3, 1404(a0)
+; CHECK-NEXT: lw a2, 644(sp)
+; CHECK-NEXT: lw a3, 648(sp)
+; CHECK-NEXT: sw a2, 1408(a0)
+; CHECK-NEXT: sw a3, 1412(a0)
+; CHECK-NEXT: lw a2, 636(sp)
+; CHECK-NEXT: lw a3, 640(sp)
+; CHECK-NEXT: sw a2, 1416(a0)
+; CHECK-NEXT: sw a3, 1420(a0)
+; CHECK-NEXT: lw a2, 628(sp)
+; CHECK-NEXT: lw a3, 632(sp)
+; CHECK-NEXT: sw a2, 1424(a0)
+; CHECK-NEXT: sw a3, 1428(a0)
+; CHECK-NEXT: lw a2, 620(sp)
+; CHECK-NEXT: lw a3, 624(sp)
+; CHECK-NEXT: sw a2, 1432(a0)
+; CHECK-NEXT: sw a3, 1436(a0)
+; CHECK-NEXT: lw a2, 612(sp)
+; CHECK-NEXT: lw a3, 616(sp)
+; CHECK-NEXT: sw a2, 1440(a0)
+; CHECK-NEXT: sw a3, 1444(a0)
+; CHECK-NEXT: lw a2, 604(sp)
+; CHECK-NEXT: lw a3, 608(sp)
+; CHECK-NEXT: sw a2, 1448(a0)
+; CHECK-NEXT: sw a3, 1452(a0)
+; CHECK-NEXT: lw a2, 596(sp)
+; CHECK-NEXT: lw a3, 600(sp)
+; CHECK-NEXT: sw a2, 1456(a0)
+; CHECK-NEXT: sw a3, 1460(a0)
+; CHECK-NEXT: lw a2, 588(sp)
+; CHECK-NEXT: lw a3, 592(sp)
+; CHECK-NEXT: sw a2, 1464(a0)
+; CHECK-NEXT: sw a3, 1468(a0)
+; CHECK-NEXT: lw a2, 580(sp)
+; CHECK-NEXT: lw a3, 584(sp)
+; CHECK-NEXT: sw a2, 1472(a0)
+; CHECK-NEXT: sw a3, 1476(a0)
+; CHECK-NEXT: lw a2, 572(sp)
+; CHECK-NEXT: lw a3, 576(sp)
+; CHECK-NEXT: sw a2, 1480(a0)
+; CHECK-NEXT: sw a3, 1484(a0)
+; CHECK-NEXT: lw a2, 564(sp)
+; CHECK-NEXT: lw a3, 568(sp)
+; CHECK-NEXT: sw a2, 1488(a0)
+; CHECK-NEXT: sw a3, 1492(a0)
+; CHECK-NEXT: lw a2, 556(sp)
+; CHECK-NEXT: lw a3, 560(sp)
+; CHECK-NEXT: sw a2, 1496(a0)
+; CHECK-NEXT: sw a3, 1500(a0)
+; CHECK-NEXT: lw a2, 548(sp)
+; CHECK-NEXT: lw a3, 552(sp)
+; CHECK-NEXT: sw a2, 1504(a0)
+; CHECK-NEXT: sw a3, 1508(a0)
+; CHECK-NEXT: lw a2, 540(sp)
+; CHECK-NEXT: lw a3, 544(sp)
+; CHECK-NEXT: sw a2, 1512(a0)
+; CHECK-NEXT: sw a3, 1516(a0)
+; CHECK-NEXT: lw a2, 532(sp)
+; CHECK-NEXT: lw a3, 536(sp)
+; CHECK-NEXT: sw a2, 1520(a0)
+; CHECK-NEXT: sw a3, 1524(a0)
+; CHECK-NEXT: lw a2, 524(sp)
+; CHECK-NEXT: lw a3, 528(sp)
+; CHECK-NEXT: sw a2, 1528(a0)
+; CHECK-NEXT: sw a3, 1532(a0)
+; CHECK-NEXT: lw a2, 516(sp)
+; CHECK-NEXT: lw a3, 520(sp)
+; CHECK-NEXT: sw a2, 1536(a0)
+; CHECK-NEXT: sw a3, 1540(a0)
+; CHECK-NEXT: lw a2, 508(sp)
+; CHECK-NEXT: lw a3, 512(sp)
+; CHECK-NEXT: sw a2, 1544(a0)
+; CHECK-NEXT: sw a3, 1548(a0)
+; CHECK-NEXT: lw a2, 500(sp)
+; CHECK-NEXT: lw a3, 504(sp)
+; CHECK-NEXT: sw a2, 1552(a0)
+; CHECK-NEXT: sw a3, 1556(a0)
+; CHECK-NEXT: lw a2, 492(sp)
+; CHECK-NEXT: lw a3, 496(sp)
+; CHECK-NEXT: sw a2, 1560(a0)
+; CHECK-NEXT: sw a3, 1564(a0)
+; CHECK-NEXT: lw a2, 484(sp)
+; CHECK-NEXT: lw a3, 488(sp)
+; CHECK-NEXT: sw a2, 1568(a0)
+; CHECK-NEXT: sw a3, 1572(a0)
+; CHECK-NEXT: lw a2, 476(sp)
+; CHECK-NEXT: lw a3, 480(sp)
+; CHECK-NEXT: sw a2, 1576(a0)
+; CHECK-NEXT: sw a3, 1580(a0)
+; CHECK-NEXT: lw a2, 468(sp)
+; CHECK-NEXT: lw a3, 472(sp)
+; CHECK-NEXT: sw a2, 1584(a0)
+; CHECK-NEXT: sw a3, 1588(a0)
+; CHECK-NEXT: lw a2, 460(sp)
+; CHECK-NEXT: lw a3, 464(sp)
+; CHECK-NEXT: sw a2, 1592(a0)
+; CHECK-NEXT: sw a3, 1596(a0)
+; CHECK-NEXT: lw a2, 452(sp)
+; CHECK-NEXT: lw a3, 456(sp)
+; CHECK-NEXT: sw a2, 1600(a0)
+; CHECK-NEXT: sw a3, 1604(a0)
+; CHECK-NEXT: lw a2, 444(sp)
+; CHECK-NEXT: lw a3, 448(sp)
+; CHECK-NEXT: sw a2, 1608(a0)
+; CHECK-NEXT: sw a3, 1612(a0)
+; CHECK-NEXT: lw a2, 436(sp)
+; CHECK-NEXT: lw a3, 440(sp)
+; CHECK-NEXT: sw a2, 1616(a0)
+; CHECK-NEXT: sw a3, 1620(a0)
+; CHECK-NEXT: lw a2, 428(sp)
+; CHECK-NEXT: lw a3, 432(sp)
+; CHECK-NEXT: sw a2, 1624(a0)
+; CHECK-NEXT: sw a3, 1628(a0)
+; CHECK-NEXT: lw a2, 420(sp)
+; CHECK-NEXT: lw a3, 424(sp)
+; CHECK-NEXT: sw a2, 1632(a0)
+; CHECK-NEXT: sw a3, 1636(a0)
+; CHECK-NEXT: lw a2, 412(sp)
+; CHECK-NEXT: lw a3, 416(sp)
+; CHECK-NEXT: sw a2, 1640(a0)
+; CHECK-NEXT: sw a3, 1644(a0)
+; CHECK-NEXT: lw a2, 404(sp)
+; CHECK-NEXT: lw a3, 408(sp)
+; CHECK-NEXT: sw a2, 1648(a0)
+; CHECK-NEXT: sw a3, 1652(a0)
+; CHECK-NEXT: lw a2, 396(sp)
+; CHECK-NEXT: lw a3, 400(sp)
+; CHECK-NEXT: sw a2, 1656(a0)
+; CHECK-NEXT: sw a3, 1660(a0)
+; CHECK-NEXT: lw a2, 388(sp)
+; CHECK-NEXT: lw a3, 392(sp)
+; CHECK-NEXT: sw a2, 1664(a0)
+; CHECK-NEXT: sw a3, 1668(a0)
+; CHECK-NEXT: lw a2, 380(sp)
+; CHECK-NEXT: lw a3, 384(sp)
+; CHECK-NEXT: sw a2, 1672(a0)
+; CHECK-NEXT: sw a3, 1676(a0)
+; CHECK-NEXT: lw a2, 372(sp)
+; CHECK-NEXT: lw a3, 376(sp)
+; CHECK-NEXT: sw a2, 1680(a0)
+; CHECK-NEXT: sw a3, 1684(a0)
+; CHECK-NEXT: lw a2, 364(sp)
+; CHECK-NEXT: lw a3, 368(sp)
+; CHECK-NEXT: sw a2, 1688(a0)
+; CHECK-NEXT: sw a3, 1692(a0)
+; CHECK-NEXT: lw a2, 356(sp)
+; CHECK-NEXT: lw a3, 360(sp)
+; CHECK-NEXT: sw a2, 1696(a0)
+; CHECK-NEXT: sw a3, 1700(a0)
+; CHECK-NEXT: lw a2, 348(sp)
+; CHECK-NEXT: lw a3, 352(sp)
+; CHECK-NEXT: sw a2, 1704(a0)
+; CHECK-NEXT: sw a3, 1708(a0)
+; CHECK-NEXT: lw a2, 340(sp)
+; CHECK-NEXT: lw a3, 344(sp)
+; CHECK-NEXT: sw a2, 1712(a0)
+; CHECK-NEXT: sw a3, 1716(a0)
+; CHECK-NEXT: lw a2, 332(sp)
+; CHECK-NEXT: lw a3, 336(sp)
+; CHECK-NEXT: sw a2, 1720(a0)
+; CHECK-NEXT: sw a3, 1724(a0)
+; CHECK-NEXT: lw a2, 324(sp)
+; CHECK-NEXT: lw a3, 328(sp)
+; CHECK-NEXT: sw a2, 1728(a0)
+; CHECK-NEXT: sw a3, 1732(a0)
+; CHECK-NEXT: lw a2, 316(sp)
+; CHECK-NEXT: lw a3, 320(sp)
+; CHECK-NEXT: sw a2, 1736(a0)
+; CHECK-NEXT: sw a3, 1740(a0)
+; CHECK-NEXT: lw a2, 308(sp)
+; CHECK-NEXT: lw a3, 312(sp)
+; CHECK-NEXT: sw a2, 1744(a0)
+; CHECK-NEXT: sw a3, 1748(a0)
+; CHECK-NEXT: lw a2, 300(sp)
+; CHECK-NEXT: lw a3, 304(sp)
+; CHECK-NEXT: sw a2, 1752(a0)
+; CHECK-NEXT: sw a3, 1756(a0)
+; CHECK-NEXT: lw a2, 292(sp)
+; CHECK-NEXT: lw a3, 296(sp)
+; CHECK-NEXT: sw a2, 1760(a0)
+; CHECK-NEXT: sw a3, 1764(a0)
+; CHECK-NEXT: lw a2, 284(sp)
+; CHECK-NEXT: lw a3, 288(sp)
+; CHECK-NEXT: sw a2, 1768(a0)
+; CHECK-NEXT: sw a3, 1772(a0)
+; CHECK-NEXT: lw a2, 276(sp)
+; CHECK-NEXT: lw a3, 280(sp)
+; CHECK-NEXT: sw a2, 1776(a0)
+; CHECK-NEXT: sw a3, 1780(a0)
+; CHECK-NEXT: lw a2, 268(sp)
+; CHECK-NEXT: lw a3, 272(sp)
+; CHECK-NEXT: sw a2, 1784(a0)
+; CHECK-NEXT: sw a3, 1788(a0)
+; CHECK-NEXT: lw a2, 260(sp)
+; CHECK-NEXT: lw a3, 264(sp)
+; CHECK-NEXT: sw a2, 1792(a0)
+; CHECK-NEXT: sw a3, 1796(a0)
+; CHECK-NEXT: lw a2, 252(sp)
+; CHECK-NEXT: lw a3, 256(sp)
+; CHECK-NEXT: sw a2, 1800(a0)
+; CHECK-NEXT: sw a3, 1804(a0)
+; CHECK-NEXT: lw a2, 244(sp)
+; CHECK-NEXT: lw a3, 248(sp)
+; CHECK-NEXT: sw a2, 1808(a0)
+; CHECK-NEXT: sw a3, 1812(a0)
+; CHECK-NEXT: lw a2, 236(sp)
+; CHECK-NEXT: lw a3, 240(sp)
+; CHECK-NEXT: sw a2, 1816(a0)
+; CHECK-NEXT: sw a3, 1820(a0)
+; CHECK-NEXT: lw a2, 228(sp)
+; CHECK-NEXT: lw a3, 232(sp)
+; CHECK-NEXT: sw a2, 1824(a0)
+; CHECK-NEXT: sw a3, 1828(a0)
+; CHECK-NEXT: lw a2, 220(sp)
+; CHECK-NEXT: lw a3, 224(sp)
+; CHECK-NEXT: sw a2, 1832(a0)
+; CHECK-NEXT: sw a3, 1836(a0)
+; CHECK-NEXT: lw a2, 212(sp)
+; CHECK-NEXT: lw a3, 216(sp)
+; CHECK-NEXT: sw a2, 1840(a0)
+; CHECK-NEXT: sw a3, 1844(a0)
+; CHECK-NEXT: lw a2, 204(sp)
+; CHECK-NEXT: lw a3, 208(sp)
+; CHECK-NEXT: sw a2, 1848(a0)
+; CHECK-NEXT: sw a3, 1852(a0)
+; CHECK-NEXT: lw a2, 196(sp)
+; CHECK-NEXT: lw a3, 200(sp)
+; CHECK-NEXT: sw a2, 1856(a0)
+; CHECK-NEXT: sw a3, 1860(a0)
+; CHECK-NEXT: lw a2, 188(sp)
+; CHECK-NEXT: lw a3, 192(sp)
+; CHECK-NEXT: sw a2, 1864(a0)
+; CHECK-NEXT: sw a3, 1868(a0)
+; CHECK-NEXT: lw a2, 180(sp)
+; CHECK-NEXT: lw a3, 184(sp)
+; CHECK-NEXT: sw a2, 1872(a0)
+; CHECK-NEXT: sw a3, 1876(a0)
+; CHECK-NEXT: lw a2, 172(sp)
+; CHECK-NEXT: lw a3, 176(sp)
+; CHECK-NEXT: sw a2, 1880(a0)
+; CHECK-NEXT: sw a3, 1884(a0)
+; CHECK-NEXT: lw a2, 164(sp)
+; CHECK-NEXT: lw a3, 168(sp)
+; CHECK-NEXT: sw a2, 1888(a0)
+; CHECK-NEXT: sw a3, 1892(a0)
+; CHECK-NEXT: lw a2, 156(sp)
+; CHECK-NEXT: lw a3, 160(sp)
+; CHECK-NEXT: sw a2, 1896(a0)
+; CHECK-NEXT: sw a3, 1900(a0)
+; CHECK-NEXT: lw a2, 148(sp)
+; CHECK-NEXT: lw a3, 152(sp)
+; CHECK-NEXT: sw a2, 1904(a0)
+; CHECK-NEXT: sw a3, 1908(a0)
+; CHECK-NEXT: lw a2, 140(sp)
+; CHECK-NEXT: lw a3, 144(sp)
+; CHECK-NEXT: sw a2, 1912(a0)
+; CHECK-NEXT: sw a3, 1916(a0)
+; CHECK-NEXT: lw a2, 132(sp)
+; CHECK-NEXT: lw a3, 136(sp)
+; CHECK-NEXT: sw a2, 1920(a0)
+; CHECK-NEXT: sw a3, 1924(a0)
+; CHECK-NEXT: lw a2, 124(sp)
+; CHECK-NEXT: lw a3, 128(sp)
+; CHECK-NEXT: sw a2, 1928(a0)
+; CHECK-NEXT: sw a3, 1932(a0)
+; CHECK-NEXT: lw a2, 116(sp)
+; CHECK-NEXT: lw a3, 120(sp)
+; CHECK-NEXT: sw a2, 1936(a0)
+; CHECK-NEXT: sw a3, 1940(a0)
+; CHECK-NEXT: lw a2, 108(sp)
+; CHECK-NEXT: lw a3, 112(sp)
+; CHECK-NEXT: sw a2, 1944(a0)
+; CHECK-NEXT: sw a3, 1948(a0)
+; CHECK-NEXT: lw a2, 100(sp)
+; CHECK-NEXT: lw a3, 104(sp)
+; CHECK-NEXT: sw a2, 1952(a0)
+; CHECK-NEXT: sw a3, 1956(a0)
+; CHECK-NEXT: lw a2, 92(sp)
+; CHECK-NEXT: lw a3, 96(sp)
+; CHECK-NEXT: sw a2, 1960(a0)
+; CHECK-NEXT: sw a3, 1964(a0)
+; CHECK-NEXT: lw a2, 84(sp)
+; CHECK-NEXT: lw a3, 88(sp)
+; CHECK-NEXT: sw a2, 1968(a0)
+; CHECK-NEXT: sw a3, 1972(a0)
+; CHECK-NEXT: lw a2, 76(sp)
+; CHECK-NEXT: lw a3, 80(sp)
+; CHECK-NEXT: sw a2, 1976(a0)
+; CHECK-NEXT: sw a3, 1980(a0)
+; CHECK-NEXT: lw a2, 68(sp)
+; CHECK-NEXT: lw a3, 72(sp)
+; CHECK-NEXT: sw a2, 1984(a0)
+; CHECK-NEXT: sw a3, 1988(a0)
+; CHECK-NEXT: lw a2, 60(sp)
+; CHECK-NEXT: lw a3, 64(sp)
+; CHECK-NEXT: sw a2, 1992(a0)
+; CHECK-NEXT: sw a3, 1996(a0)
+; CHECK-NEXT: lw a2, 52(sp)
+; CHECK-NEXT: lw a3, 56(sp)
+; CHECK-NEXT: sw a2, 2000(a0)
+; CHECK-NEXT: sw a3, 2004(a0)
+; CHECK-NEXT: lw a2, 44(sp)
+; CHECK-NEXT: lw a3, 48(sp)
+; CHECK-NEXT: sw a2, 2008(a0)
+; CHECK-NEXT: sw a3, 2012(a0)
+; CHECK-NEXT: lw a2, 36(sp)
+; CHECK-NEXT: lw a3, 40(sp)
+; CHECK-NEXT: sw a2, 2016(a0)
+; CHECK-NEXT: sw a3, 2020(a0)
+; CHECK-NEXT: lw a2, 28(sp)
+; CHECK-NEXT: lw a3, 32(sp)
+; CHECK-NEXT: sw a2, 2024(a0)
+; CHECK-NEXT: sw a3, 2028(a0)
+; CHECK-NEXT: lw a2, 20(sp)
+; CHECK-NEXT: lw a3, 24(sp)
+; CHECK-NEXT: sw a2, 2032(a0)
+; CHECK-NEXT: sw a3, 2036(a0)
+; CHECK-NEXT: lw a2, 12(sp)
+; CHECK-NEXT: lw a3, 16(sp)
+; CHECK-NEXT: sw a2, 2040(a0)
+; CHECK-NEXT: sw a3, 2044(a0)
+; CHECK-NEXT: addi sp, sp, 80
+; CHECK-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw s0, 2024(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw s1, 2020(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw s2, 2016(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw s3, 2012(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw s4, 2008(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw s5, 2004(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw s6, 2000(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw s7, 1996(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw s8, 1992(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw s9, 1988(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw s10, 1984(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw s11, 1980(sp) # 4-byte Folded Reload
+; CHECK-NEXT: addi sp, sp, 2032
+; CHECK-NEXT: ret
+ %2 = load double, ptr %0, align 8
+ %3 = getelementptr inbounds i8, ptr %0, i32 8
+ %4 = load double, ptr %3, align 8
+ %5 = getelementptr inbounds i8, ptr %0, i32 16
+ %6 = load double, ptr %5, align 8
+ %7 = getelementptr inbounds i8, ptr %0, i32 24
+ %8 = load double, ptr %7, align 8
+ %9 = getelementptr inbounds i8, ptr %0, i32 32
+ %10 = load double, ptr %9, align 8
+ %11 = getelementptr inbounds i8, ptr %0, i32 40
+ %12 = load double, ptr %11, align 8
+ %13 = getelementptr inbounds i8, ptr %0, i32 48
+ %14 = load double, ptr %13, align 8
+ %15 = getelementptr inbounds i8, ptr %0, i32 56
+ %16 = load double, ptr %15, align 8
+ %17 = getelementptr inbounds i8, ptr %0, i32 64
+ %18 = load double, ptr %17, align 8
+ %19 = getelementptr inbounds i8, ptr %0, i32 72
+ %20 = load double, ptr %19, align 8
+ %21 = getelementptr inbounds i8, ptr %0, i32 80
+ %22 = load double, ptr %21, align 8
+ %23 = getelementptr inbounds i8, ptr %0, i32 88
+ %24 = load double, ptr %23, align 8
+ %25 = getelementptr inbounds i8, ptr %0, i32 96
+ %26 = load double, ptr %25, align 8
+ %27 = getelementptr inbounds i8, ptr %0, i32 104
+ %28 = load double, ptr %27, align 8
+ %29 = getelementptr inbounds i8, ptr %0, i32 112
+ %30 = load double, ptr %29, align 8
+ %31 = getelementptr inbounds i8, ptr %0, i32 120
+ %32 = load double, ptr %31, align 8
+ %33 = getelementptr inbounds i8, ptr %0, i32 128
+ %34 = load double, ptr %33, align 8
+ %35 = getelementptr inbounds i8, ptr %0, i32 136
+ %36 = load double, ptr %35, align 8
+ %37 = getelementptr inbounds i8, ptr %0, i32 144
+ %38 = load double, ptr %37, align 8
+ %39 = getelementptr inbounds i8, ptr %0, i32 152
+ %40 = load double, ptr %39, align 8
+ %41 = getelementptr inbounds i8, ptr %0, i32 160
+ %42 = load double, ptr %41, align 8
+ %43 = getelementptr inbounds i8, ptr %0, i32 168
+ %44 = load double, ptr %43, align 8
+ %45 = getelementptr inbounds i8, ptr %0, i32 176
+ %46 = load double, ptr %45, align 8
+ %47 = getelementptr inbounds i8, ptr %0, i32 184
+ %48 = load double, ptr %47, align 8
+ %49 = getelementptr inbounds i8, ptr %0, i32 192
+ %50 = load double, ptr %49, align 8
+ %51 = getelementptr inbounds i8, ptr %0, i32 200
+ %52 = load double, ptr %51, align 8
+ %53 = getelementptr inbounds i8, ptr %0, i32 208
+ %54 = load double, ptr %53, align 8
+ %55 = getelementptr inbounds i8, ptr %0, i32 216
+ %56 = load double, ptr %55, align 8
+ %57 = getelementptr inbounds i8, ptr %0, i32 224
+ %58 = load double, ptr %57, align 8
+ %59 = getelementptr inbounds i8, ptr %0, i32 232
+ %60 = load double, ptr %59, align 8
+ %61 = getelementptr inbounds i8, ptr %0, i32 240
+ %62 = load double, ptr %61, align 8
+ %63 = getelementptr inbounds i8, ptr %0, i32 248
+ %64 = load double, ptr %63, align 8
+ %65 = getelementptr inbounds i8, ptr %0, i32 256
+ %66 = load double, ptr %65, align 8
+ %67 = getelementptr inbounds i8, ptr %0, i32 264
+ %68 = load double, ptr %67, align 8
+ %69 = getelementptr inbounds i8, ptr %0, i32 272
+ %70 = load double, ptr %69, align 8
+ %71 = getelementptr inbounds i8, ptr %0, i32 280
+ %72 = load double, ptr %71, align 8
+ %73 = getelementptr inbounds i8, ptr %0, i32 288
+ %74 = load double, ptr %73, align 8
+ %75 = getelementptr inbounds i8, ptr %0, i32 296
+ %76 = load double, ptr %75, align 8
+ %77 = getelementptr inbounds i8, ptr %0, i32 304
+ %78 = load double, ptr %77, align 8
+ %79 = getelementptr inbounds i8, ptr %0, i32 312
+ %80 = load double, ptr %79, align 8
+ %81 = getelementptr inbounds i8, ptr %0, i32 320
+ %82 = load double, ptr %81, align 8
+ %83 = getelementptr inbounds i8, ptr %0, i32 328
+ %84 = load double, ptr %83, align 8
+ %85 = getelementptr inbounds i8, ptr %0, i32 336
+ %86 = load double, ptr %85, align 8
+ %87 = getelementptr inbounds i8, ptr %0, i32 344
+ %88 = load double, ptr %87, align 8
+ %89 = getelementptr inbounds i8, ptr %0, i32 352
+ %90 = load double, ptr %89, align 8
+ %91 = getelementptr inbounds i8, ptr %0, i32 360
+ %92 = load double, ptr %91, align 8
+ %93 = getelementptr inbounds i8, ptr %0, i32 368
+ %94 = load double, ptr %93, align 8
+ %95 = getelementptr inbounds i8, ptr %0, i32 376
+ %96 = load double, ptr %95, align 8
+ %97 = getelementptr inbounds i8, ptr %0, i32 384
+ %98 = load double, ptr %97, align 8
+ %99 = getelementptr inbounds i8, ptr %0, i32 392
+ %100 = load double, ptr %99, align 8
+ %101 = getelementptr inbounds i8, ptr %0, i32 400
+ %102 = load double, ptr %101, align 8
+ %103 = getelementptr inbounds i8, ptr %0, i32 408
+ %104 = load double, ptr %103, align 8
+ %105 = getelementptr inbounds i8, ptr %0, i32 416
+ %106 = load double, ptr %105, align 8
+ %107 = getelementptr inbounds i8, ptr %0, i32 424
+ %108 = load double, ptr %107, align 8
+ %109 = getelementptr inbounds i8, ptr %0, i32 432
+ %110 = load double, ptr %109, align 8
+ %111 = getelementptr inbounds i8, ptr %0, i32 440
+ %112 = load double, ptr %111, align 8
+ %113 = getelementptr inbounds i8, ptr %0, i32 448
+ %114 = load double, ptr %113, align 8
+ %115 = getelementptr inbounds i8, ptr %0, i32 456
+ %116 = load double, ptr %115, align 8
+ %117 = getelementptr inbounds i8, ptr %0, i32 464
+ %118 = load double, ptr %117, align 8
+ %119 = getelementptr inbounds i8, ptr %0, i32 472
+ %120 = load double, ptr %119, align 8
+ %121 = getelementptr inbounds i8, ptr %0, i32 480
+ %122 = load double, ptr %121, align 8
+ %123 = getelementptr inbounds i8, ptr %0, i32 488
+ %124 = load double, ptr %123, align 8
+ %125 = getelementptr inbounds i8, ptr %0, i32 496
+ %126 = load double, ptr %125, align 8
+ %127 = getelementptr inbounds i8, ptr %0, i32 504
+ %128 = load double, ptr %127, align 8
+ %129 = getelementptr inbounds i8, ptr %0, i32 512
+ %130 = load double, ptr %129, align 8
+ %131 = getelementptr inbounds i8, ptr %0, i32 520
+ %132 = load double, ptr %131, align 8
+ %133 = getelementptr inbounds i8, ptr %0, i32 528
+ %134 = load double, ptr %133, align 8
+ %135 = getelementptr inbounds i8, ptr %0, i32 536
+ %136 = load double, ptr %135, align 8
+ %137 = getelementptr inbounds i8, ptr %0, i32 544
+ %138 = load double, ptr %137, align 8
+ %139 = getelementptr inbounds i8, ptr %0, i32 552
+ %140 = load double, ptr %139, align 8
+ %141 = getelementptr inbounds i8, ptr %0, i32 560
+ %142 = load double, ptr %141, align 8
+ %143 = getelementptr inbounds i8, ptr %0, i32 568
+ %144 = load double, ptr %143, align 8
+ %145 = getelementptr inbounds i8, ptr %0, i32 576
+ %146 = load double, ptr %145, align 8
+ %147 = getelementptr inbounds i8, ptr %0, i32 584
+ %148 = load double, ptr %147, align 8
+ %149 = getelementptr inbounds i8, ptr %0, i32 592
+ %150 = load double, ptr %149, align 8
+ %151 = getelementptr inbounds i8, ptr %0, i32 600
+ %152 = load double, ptr %151, align 8
+ %153 = getelementptr inbounds i8, ptr %0, i32 608
+ %154 = load double, ptr %153, align 8
+ %155 = getelementptr inbounds i8, ptr %0, i32 616
+ %156 = load double, ptr %155, align 8
+ %157 = getelementptr inbounds i8, ptr %0, i32 624
+ %158 = load double, ptr %157, align 8
+ %159 = getelementptr inbounds i8, ptr %0, i32 632
+ %160 = load double, ptr %159, align 8
+ %161 = getelementptr inbounds i8, ptr %0, i32 640
+ %162 = load double, ptr %161, align 8
+ %163 = getelementptr inbounds i8, ptr %0, i32 648
+ %164 = load double, ptr %163, align 8
+ %165 = getelementptr inbounds i8, ptr %0, i32 656
+ %166 = load double, ptr %165, align 8
+ %167 = getelementptr inbounds i8, ptr %0, i32 664
+ %168 = load double, ptr %167, align 8
+ %169 = getelementptr inbounds i8, ptr %0, i32 672
+ %170 = load double, ptr %169, align 8
+ %171 = getelementptr inbounds i8, ptr %0, i32 680
+ %172 = load double, ptr %171, align 8
+ %173 = getelementptr inbounds i8, ptr %0, i32 688
+ %174 = load double, ptr %173, align 8
+ %175 = getelementptr inbounds i8, ptr %0, i32 696
+ %176 = load double, ptr %175, align 8
+ %177 = getelementptr inbounds i8, ptr %0, i32 704
+ %178 = load double, ptr %177, align 8
+ %179 = getelementptr inbounds i8, ptr %0, i32 712
+ %180 = load double, ptr %179, align 8
+ %181 = getelementptr inbounds i8, ptr %0, i32 720
+ %182 = load double, ptr %181, align 8
+ %183 = getelementptr inbounds i8, ptr %0, i32 728
+ %184 = load double, ptr %183, align 8
+ %185 = getelementptr inbounds i8, ptr %0, i32 736
+ %186 = load double, ptr %185, align 8
+ %187 = getelementptr inbounds i8, ptr %0, i32 744
+ %188 = load double, ptr %187, align 8
+ %189 = getelementptr inbounds i8, ptr %0, i32 752
+ %190 = load double, ptr %189, align 8
+ %191 = getelementptr inbounds i8, ptr %0, i32 760
+ %192 = load double, ptr %191, align 8
+ %193 = getelementptr inbounds i8, ptr %0, i32 768
+ %194 = load double, ptr %193, align 8
+ %195 = getelementptr inbounds i8, ptr %0, i32 776
+ %196 = load double, ptr %195, align 8
+ %197 = getelementptr inbounds i8, ptr %0, i32 784
+ %198 = load double, ptr %197, align 8
+ %199 = getelementptr inbounds i8, ptr %0, i32 792
+ %200 = load double, ptr %199, align 8
+ %201 = getelementptr inbounds i8, ptr %0, i32 800
+ %202 = load double, ptr %201, align 8
+ %203 = getelementptr inbounds i8, ptr %0, i32 808
+ %204 = load double, ptr %203, align 8
+ %205 = getelementptr inbounds i8, ptr %0, i32 816
+ %206 = load double, ptr %205, align 8
+ %207 = getelementptr inbounds i8, ptr %0, i32 824
+ %208 = load double, ptr %207, align 8
+ %209 = getelementptr inbounds i8, ptr %0, i32 832
+ %210 = load double, ptr %209, align 8
+ %211 = getelementptr inbounds i8, ptr %0, i32 840
+ %212 = load double, ptr %211, align 8
+ %213 = getelementptr inbounds i8, ptr %0, i32 848
+ %214 = load double, ptr %213, align 8
+ %215 = getelementptr inbounds i8, ptr %0, i32 856
+ %216 = load double, ptr %215, align 8
+ %217 = getelementptr inbounds i8, ptr %0, i32 864
+ %218 = load double, ptr %217, align 8
+ %219 = getelementptr inbounds i8, ptr %0, i32 872
+ %220 = load double, ptr %219, align 8
+ %221 = getelementptr inbounds i8, ptr %0, i32 880
+ %222 = load double, ptr %221, align 8
+ %223 = getelementptr inbounds i8, ptr %0, i32 888
+ %224 = load double, ptr %223, align 8
+ %225 = getelementptr inbounds i8, ptr %0, i32 896
+ %226 = load double, ptr %225, align 8
+ %227 = getelementptr inbounds i8, ptr %0, i32 904
+ %228 = load double, ptr %227, align 8
+ %229 = getelementptr inbounds i8, ptr %0, i32 912
+ %230 = load double, ptr %229, align 8
+ %231 = getelementptr inbounds i8, ptr %0, i32 920
+ %232 = load double, ptr %231, align 8
+ %233 = getelementptr inbounds i8, ptr %0, i32 928
+ %234 = load double, ptr %233, align 8
+ %235 = getelementptr inbounds i8, ptr %0, i32 936
+ %236 = load double, ptr %235, align 8
+ %237 = getelementptr inbounds i8, ptr %0, i32 944
+ %238 = load double, ptr %237, align 8
+ %239 = getelementptr inbounds i8, ptr %0, i32 952
+ %240 = load double, ptr %239, align 8
+ %241 = getelementptr inbounds i8, ptr %0, i32 960
+ %242 = load double, ptr %241, align 8
+ %243 = getelementptr inbounds i8, ptr %0, i32 968
+ %244 = load double, ptr %243, align 8
+ %245 = getelementptr inbounds i8, ptr %0, i32 976
+ %246 = load double, ptr %245, align 8
+ %247 = getelementptr inbounds i8, ptr %0, i32 984
+ %248 = load double, ptr %247, align 8
+ %249 = getelementptr inbounds i8, ptr %0, i32 992
+ %250 = load double, ptr %249, align 8
+ %251 = getelementptr inbounds i8, ptr %0, i32 1000
+ %252 = load double, ptr %251, align 8
+ %253 = getelementptr inbounds i8, ptr %0, i32 1008
+ %254 = load double, ptr %253, align 8
+ %255 = getelementptr inbounds i8, ptr %0, i32 1016
+ %256 = load double, ptr %255, align 8
+ %257 = getelementptr inbounds i8, ptr %0, i32 1024
+ %258 = load double, ptr %257, align 8
+ %259 = getelementptr inbounds i8, ptr %0, i32 1032
+ %260 = load double, ptr %259, align 8
+ %261 = getelementptr inbounds i8, ptr %0, i32 1040
+ %262 = load double, ptr %261, align 8
+ %263 = getelementptr inbounds i8, ptr %0, i32 1048
+ %264 = load double, ptr %263, align 8
+ %265 = getelementptr inbounds i8, ptr %0, i32 1056
+ %266 = load double, ptr %265, align 8
+ %267 = getelementptr inbounds i8, ptr %0, i32 1064
+ %268 = load double, ptr %267, align 8
+ %269 = getelementptr inbounds i8, ptr %0, i32 1072
+ %270 = load double, ptr %269, align 8
+ %271 = getelementptr inbounds i8, ptr %0, i32 1080
+ %272 = load double, ptr %271, align 8
+ %273 = getelementptr inbounds i8, ptr %0, i32 1088
+ %274 = load double, ptr %273, align 8
+ %275 = getelementptr inbounds i8, ptr %0, i32 1096
+ %276 = load double, ptr %275, align 8
+ %277 = getelementptr inbounds i8, ptr %0, i32 1104
+ %278 = load double, ptr %277, align 8
+ %279 = getelementptr inbounds i8, ptr %0, i32 1112
+ %280 = load double, ptr %279, align 8
+ %281 = getelementptr inbounds i8, ptr %0, i32 1120
+ %282 = load double, ptr %281, align 8
+ %283 = getelementptr inbounds i8, ptr %0, i32 1128
+ %284 = load double, ptr %283, align 8
+ %285 = getelementptr inbounds i8, ptr %0, i32 1136
+ %286 = load double, ptr %285, align 8
+ %287 = getelementptr inbounds i8, ptr %0, i32 1144
+ %288 = load double, ptr %287, align 8
+ %289 = getelementptr inbounds i8, ptr %0, i32 1152
+ %290 = load double, ptr %289, align 8
+ %291 = getelementptr inbounds i8, ptr %0, i32 1160
+ %292 = load double, ptr %291, align 8
+ %293 = getelementptr inbounds i8, ptr %0, i32 1168
+ %294 = load double, ptr %293, align 8
+ %295 = getelementptr inbounds i8, ptr %0, i32 1176
+ %296 = load double, ptr %295, align 8
+ %297 = getelementptr inbounds i8, ptr %0, i32 1184
+ %298 = load double, ptr %297, align 8
+ %299 = getelementptr inbounds i8, ptr %0, i32 1192
+ %300 = load double, ptr %299, align 8
+ %301 = getelementptr inbounds i8, ptr %0, i32 1200
+ %302 = load double, ptr %301, align 8
+ %303 = getelementptr inbounds i8, ptr %0, i32 1208
+ %304 = load double, ptr %303, align 8
+ %305 = getelementptr inbounds i8, ptr %0, i32 1216
+ %306 = load double, ptr %305, align 8
+ %307 = getelementptr inbounds i8, ptr %0, i32 1224
+ %308 = load double, ptr %307, align 8
+ %309 = getelementptr inbounds i8, ptr %0, i32 1232
+ %310 = load double, ptr %309, align 8
+ %311 = getelementptr inbounds i8, ptr %0, i32 1240
+ %312 = load double, ptr %311, align 8
+ %313 = getelementptr inbounds i8, ptr %0, i32 1248
+ %314 = load double, ptr %313, align 8
+ %315 = getelementptr inbounds i8, ptr %0, i32 1256
+ %316 = load double, ptr %315, align 8
+ %317 = getelementptr inbounds i8, ptr %0, i32 1264
+ %318 = load double, ptr %317, align 8
+ %319 = getelementptr inbounds i8, ptr %0, i32 1272
+ %320 = load double, ptr %319, align 8
+ %321 = getelementptr inbounds i8, ptr %0, i32 1280
+ %322 = load double, ptr %321, align 8
+ %323 = getelementptr inbounds i8, ptr %0, i32 1288
+ %324 = load double, ptr %323, align 8
+ %325 = getelementptr inbounds i8, ptr %0, i32 1296
+ %326 = load double, ptr %325, align 8
+ %327 = getelementptr inbounds i8, ptr %0, i32 1304
+ %328 = load double, ptr %327, align 8
+ %329 = getelementptr inbounds i8, ptr %0, i32 1312
+ %330 = load double, ptr %329, align 8
+ %331 = getelementptr inbounds i8, ptr %0, i32 1320
+ %332 = load double, ptr %331, align 8
+ %333 = getelementptr inbounds i8, ptr %0, i32 1328
+ %334 = load double, ptr %333, align 8
+ %335 = getelementptr inbounds i8, ptr %0, i32 1336
+ %336 = load double, ptr %335, align 8
+ %337 = getelementptr inbounds i8, ptr %0, i32 1344
+ %338 = load double, ptr %337, align 8
+ %339 = getelementptr inbounds i8, ptr %0, i32 1352
+ %340 = load double, ptr %339, align 8
+ %341 = getelementptr inbounds i8, ptr %0, i32 1360
+ %342 = load double, ptr %341, align 8
+ %343 = getelementptr inbounds i8, ptr %0, i32 1368
+ %344 = load double, ptr %343, align 8
+ %345 = getelementptr inbounds i8, ptr %0, i32 1376
+ %346 = load double, ptr %345, align 8
+ %347 = getelementptr inbounds i8, ptr %0, i32 1384
+ %348 = load double, ptr %347, align 8
+ %349 = getelementptr inbounds i8, ptr %0, i32 1392
+ %350 = load double, ptr %349, align 8
+ %351 = getelementptr inbounds i8, ptr %0, i32 1400
+ %352 = load double, ptr %351, align 8
+ %353 = getelementptr inbounds i8, ptr %0, i32 1408
+ %354 = load double, ptr %353, align 8
+ %355 = getelementptr inbounds i8, ptr %0, i32 1416
+ %356 = load double, ptr %355, align 8
+ %357 = getelementptr inbounds i8, ptr %0, i32 1424
+ %358 = load double, ptr %357, align 8
+ %359 = getelementptr inbounds i8, ptr %0, i32 1432
+ %360 = load double, ptr %359, align 8
+ %361 = getelementptr inbounds i8, ptr %0, i32 1440
+ %362 = load double, ptr %361, align 8
+ %363 = getelementptr inbounds i8, ptr %0, i32 1448
+ %364 = load double, ptr %363, align 8
+ %365 = getelementptr inbounds i8, ptr %0, i32 1456
+ %366 = load double, ptr %365, align 8
+ %367 = getelementptr inbounds i8, ptr %0, i32 1464
+ %368 = load double, ptr %367, align 8
+ %369 = getelementptr inbounds i8, ptr %0, i32 1472
+ %370 = load double, ptr %369, align 8
+ %371 = getelementptr inbounds i8, ptr %0, i32 1480
+ %372 = load double, ptr %371, align 8
+ %373 = getelementptr inbounds i8, ptr %0, i32 1488
+ %374 = load double, ptr %373, align 8
+ %375 = getelementptr inbounds i8, ptr %0, i32 1496
+ %376 = load double, ptr %375, align 8
+ %377 = getelementptr inbounds i8, ptr %0, i32 1504
+ %378 = load double, ptr %377, align 8
+ %379 = getelementptr inbounds i8, ptr %0, i32 1512
+ %380 = load double, ptr %379, align 8
+ %381 = getelementptr inbounds i8, ptr %0, i32 1520
+ %382 = load double, ptr %381, align 8
+ %383 = getelementptr inbounds i8, ptr %0, i32 1528
+ %384 = load double, ptr %383, align 8
+ %385 = getelementptr inbounds i8, ptr %0, i32 1536
+ %386 = load double, ptr %385, align 8
+ %387 = getelementptr inbounds i8, ptr %0, i32 1544
+ %388 = load double, ptr %387, align 8
+ %389 = getelementptr inbounds i8, ptr %0, i32 1552
+ %390 = load double, ptr %389, align 8
+ %391 = getelementptr inbounds i8, ptr %0, i32 1560
+ %392 = load double, ptr %391, align 8
+ %393 = getelementptr inbounds i8, ptr %0, i32 1568
+ %394 = load double, ptr %393, align 8
+ %395 = getelementptr inbounds i8, ptr %0, i32 1576
+ %396 = load double, ptr %395, align 8
+ %397 = getelementptr inbounds i8, ptr %0, i32 1584
+ %398 = load double, ptr %397, align 8
+ %399 = getelementptr inbounds i8, ptr %0, i32 1592
+ %400 = load double, ptr %399, align 8
+ %401 = getelementptr inbounds i8, ptr %0, i32 1600
+ %402 = load double, ptr %401, align 8
+ %403 = getelementptr inbounds i8, ptr %0, i32 1608
+ %404 = load double, ptr %403, align 8
+ %405 = getelementptr inbounds i8, ptr %0, i32 1616
+ %406 = load double, ptr %405, align 8
+ %407 = getelementptr inbounds i8, ptr %0, i32 1624
+ %408 = load double, ptr %407, align 8
+ %409 = getelementptr inbounds i8, ptr %0, i32 1632
+ %410 = load double, ptr %409, align 8
+ %411 = getelementptr inbounds i8, ptr %0, i32 1640
+ %412 = load double, ptr %411, align 8
+ %413 = getelementptr inbounds i8, ptr %0, i32 1648
+ %414 = load double, ptr %413, align 8
+ %415 = getelementptr inbounds i8, ptr %0, i32 1656
+ %416 = load double, ptr %415, align 8
+ %417 = getelementptr inbounds i8, ptr %0, i32 1664
+ %418 = load double, ptr %417, align 8
+ %419 = getelementptr inbounds i8, ptr %0, i32 1672
+ %420 = load double, ptr %419, align 8
+ %421 = getelementptr inbounds i8, ptr %0, i32 1680
+ %422 = load double, ptr %421, align 8
+ %423 = getelementptr inbounds i8, ptr %0, i32 1688
+ %424 = load double, ptr %423, align 8
+ %425 = getelementptr inbounds i8, ptr %0, i32 1696
+ %426 = load double, ptr %425, align 8
+ %427 = getelementptr inbounds i8, ptr %0, i32 1704
+ %428 = load double, ptr %427, align 8
+ %429 = getelementptr inbounds i8, ptr %0, i32 1712
+ %430 = load double, ptr %429, align 8
+ %431 = getelementptr inbounds i8, ptr %0, i32 1720
+ %432 = load double, ptr %431, align 8
+ %433 = getelementptr inbounds i8, ptr %0, i32 1728
+ %434 = load double, ptr %433, align 8
+ %435 = getelementptr inbounds i8, ptr %0, i32 1736
+ %436 = load double, ptr %435, align 8
+ %437 = getelementptr inbounds i8, ptr %0, i32 1744
+ %438 = load double, ptr %437, align 8
+ %439 = getelementptr inbounds i8, ptr %0, i32 1752
+ %440 = load double, ptr %439, align 8
+ %441 = getelementptr inbounds i8, ptr %0, i32 1760
+ %442 = load double, ptr %441, align 8
+ %443 = getelementptr inbounds i8, ptr %0, i32 1768
+ %444 = load double, ptr %443, align 8
+ %445 = getelementptr inbounds i8, ptr %0, i32 1776
+ %446 = load double, ptr %445, align 8
+ %447 = getelementptr inbounds i8, ptr %0, i32 1784
+ %448 = load double, ptr %447, align 8
+ %449 = getelementptr inbounds i8, ptr %0, i32 1792
+ %450 = load double, ptr %449, align 8
+ %451 = getelementptr inbounds i8, ptr %0, i32 1800
+ %452 = load double, ptr %451, align 8
+ %453 = getelementptr inbounds i8, ptr %0, i32 1808
+ %454 = load double, ptr %453, align 8
+ %455 = getelementptr inbounds i8, ptr %0, i32 1816
+ %456 = load double, ptr %455, align 8
+ %457 = getelementptr inbounds i8, ptr %0, i32 1824
+ %458 = load double, ptr %457, align 8
+ %459 = getelementptr inbounds i8, ptr %0, i32 1832
+ %460 = load double, ptr %459, align 8
+ %461 = getelementptr inbounds i8, ptr %0, i32 1840
+ %462 = load double, ptr %461, align 8
+ %463 = getelementptr inbounds i8, ptr %0, i32 1848
+ %464 = load double, ptr %463, align 8
+ %465 = getelementptr inbounds i8, ptr %0, i32 1856
+ %466 = load double, ptr %465, align 8
+ %467 = getelementptr inbounds i8, ptr %0, i32 1864
+ %468 = load double, ptr %467, align 8
+ %469 = getelementptr inbounds i8, ptr %0, i32 1872
+ %470 = load double, ptr %469, align 8
+ %471 = getelementptr inbounds i8, ptr %0, i32 1880
+ %472 = load double, ptr %471, align 8
+ %473 = getelementptr inbounds i8, ptr %0, i32 1888
+ %474 = load double, ptr %473, align 8
+ %475 = getelementptr inbounds i8, ptr %0, i32 1896
+ %476 = load double, ptr %475, align 8
+ %477 = getelementptr inbounds i8, ptr %0, i32 1904
+ %478 = load double, ptr %477, align 8
+ %479 = getelementptr inbounds i8, ptr %0, i32 1912
+ %480 = load double, ptr %479, align 8
+ %481 = getelementptr inbounds i8, ptr %0, i32 1920
+ %482 = load double, ptr %481, align 8
+ %483 = getelementptr inbounds i8, ptr %0, i32 1928
+ %484 = load double, ptr %483, align 8
+ %485 = getelementptr inbounds i8, ptr %0, i32 1936
+ %486 = load double, ptr %485, align 8
+ %487 = getelementptr inbounds i8, ptr %0, i32 1944
+ %488 = load double, ptr %487, align 8
+ %489 = getelementptr inbounds i8, ptr %0, i32 1952
+ %490 = load double, ptr %489, align 8
+ %491 = getelementptr inbounds i8, ptr %0, i32 1960
+ %492 = load double, ptr %491, align 8
+ %493 = getelementptr inbounds i8, ptr %0, i32 1968
+ %494 = load double, ptr %493, align 8
+ %495 = getelementptr inbounds i8, ptr %0, i32 1976
+ %496 = load double, ptr %495, align 8
+ %497 = getelementptr inbounds i8, ptr %0, i32 1984
+ %498 = load double, ptr %497, align 8
+ %499 = getelementptr inbounds i8, ptr %0, i32 1992
+ %500 = load double, ptr %499, align 8
+ %501 = getelementptr inbounds i8, ptr %0, i32 2000
+ %502 = load double, ptr %501, align 8
+ %503 = getelementptr inbounds i8, ptr %0, i32 2008
+ %504 = load double, ptr %503, align 8
+ %505 = getelementptr inbounds i8, ptr %0, i32 2016
+ %506 = load double, ptr %505, align 8
+ %507 = getelementptr inbounds i8, ptr %0, i32 2024
+ %508 = load double, ptr %507, align 8
+ %509 = getelementptr inbounds i8, ptr %0, i32 2032
+ %510 = load double, ptr %509, align 8
+ %511 = getelementptr inbounds i8, ptr %0, i32 2040
+ %512 = load double, ptr %511, align 8
+ tail call void asm sideeffect "", "~{x1},~{x5},~{x6},~{x7},~{x8},~{x9},~{x10},~{x11},~{x12},~{x13},~{x14},~{x15},~{x16},~{x17},~{x18},~{x19},~{x20},~{x21},~{x22},~{x23},~{x24},~{x25},~{x26},~{x27},~{x28},~{x29},~{x30},~{x31}"()
+ store double %2, ptr %0, align 8
+ store double %4, ptr %3, align 8
+ store double %6, ptr %5, align 8
+ store double %8, ptr %7, align 8
+ store double %10, ptr %9, align 8
+ store double %12, ptr %11, align 8
+ store double %14, ptr %13, align 8
+ store double %16, ptr %15, align 8
+ store double %18, ptr %17, align 8
+ store double %20, ptr %19, align 8
+ store double %22, ptr %21, align 8
+ store double %24, ptr %23, align 8
+ store double %26, ptr %25, align 8
+ store double %28, ptr %27, align 8
+ store double %30, ptr %29, align 8
+ store double %32, ptr %31, align 8
+ store double %34, ptr %33, align 8
+ store double %36, ptr %35, align 8
+ store double %38, ptr %37, align 8
+ store double %40, ptr %39, align 8
+ store double %42, ptr %41, align 8
+ store double %44, ptr %43, align 8
+ store double %46, ptr %45, align 8
+ store double %48, ptr %47, align 8
+ store double %50, ptr %49, align 8
+ store double %52, ptr %51, align 8
+ store double %54, ptr %53, align 8
+ store double %56, ptr %55, align 8
+ store double %58, ptr %57, align 8
+ store double %60, ptr %59, align 8
+ store double %62, ptr %61, align 8
+ store double %64, ptr %63, align 8
+ store double %66, ptr %65, align 8
+ store double %68, ptr %67, align 8
+ store double %70, ptr %69, align 8
+ store double %72, ptr %71, align 8
+ store double %74, ptr %73, align 8
+ store double %76, ptr %75, align 8
+ store double %78, ptr %77, align 8
+ store double %80, ptr %79, align 8
+ store double %82, ptr %81, align 8
+ store double %84, ptr %83, align 8
+ store double %86, ptr %85, align 8
+ store double %88, ptr %87, align 8
+ store double %90, ptr %89, align 8
+ store double %92, ptr %91, align 8
+ store double %94, ptr %93, align 8
+ store double %96, ptr %95, align 8
+ store double %98, ptr %97, align 8
+ store double %100, ptr %99, align 8
+ store double %102, ptr %101, align 8
+ store double %104, ptr %103, align 8
+ store double %106, ptr %105, align 8
+ store double %108, ptr %107, align 8
+ store double %110, ptr %109, align 8
+ store double %112, ptr %111, align 8
+ store double %114, ptr %113, align 8
+ store double %116, ptr %115, align 8
+ store double %118, ptr %117, align 8
+ store double %120, ptr %119, align 8
+ store double %122, ptr %121, align 8
+ store double %124, ptr %123, align 8
+ store double %126, ptr %125, align 8
+ store double %128, ptr %127, align 8
+ store double %130, ptr %129, align 8
+ store double %132, ptr %131, align 8
+ store double %134, ptr %133, align 8
+ store double %136, ptr %135, align 8
+ store double %138, ptr %137, align 8
+ store double %140, ptr %139, align 8
+ store double %142, ptr %141, align 8
+ store double %144, ptr %143, align 8
+ store double %146, ptr %145, align 8
+ store double %148, ptr %147, align 8
+ store double %150, ptr %149, align 8
+ store double %152, ptr %151, align 8
+ store double %154, ptr %153, align 8
+ store double %156, ptr %155, align 8
+ store double %158, ptr %157, align 8
+ store double %160, ptr %159, align 8
+ store double %162, ptr %161, align 8
+ store double %164, ptr %163, align 8
+ store double %166, ptr %165, align 8
+ store double %168, ptr %167, align 8
+ store double %170, ptr %169, align 8
+ store double %172, ptr %171, align 8
+ store double %174, ptr %173, align 8
+ store double %176, ptr %175, align 8
+ store double %178, ptr %177, align 8
+ store double %180, ptr %179, align 8
+ store double %182, ptr %181, align 8
+ store double %184, ptr %183, align 8
+ store double %186, ptr %185, align 8
+ store double %188, ptr %187, align 8
+ store double %190, ptr %189, align 8
+ store double %192, ptr %191, align 8
+ store double %194, ptr %193, align 8
+ store double %196, ptr %195, align 8
+ store double %198, ptr %197, align 8
+ store double %200, ptr %199, align 8
+ store double %202, ptr %201, align 8
+ store double %204, ptr %203, align 8
+ store double %206, ptr %205, align 8
+ store double %208, ptr %207, align 8
+ store double %210, ptr %209, align 8
+ store double %212, ptr %211, align 8
+ store double %214, ptr %213, align 8
+ store double %216, ptr %215, align 8
+ store double %218, ptr %217, align 8
+ store double %220, ptr %219, align 8
+ store double %222, ptr %221, align 8
+ store double %224, ptr %223, align 8
+ store double %226, ptr %225, align 8
+ store double %228, ptr %227, align 8
+ store double %230, ptr %229, align 8
+ store double %232, ptr %231, align 8
+ store double %234, ptr %233, align 8
+ store double %236, ptr %235, align 8
+ store double %238, ptr %237, align 8
+ store double %240, ptr %239, align 8
+ store double %242, ptr %241, align 8
+ store double %244, ptr %243, align 8
+ store double %246, ptr %245, align 8
+ store double %248, ptr %247, align 8
+ store double %250, ptr %249, align 8
+ store double %252, ptr %251, align 8
+ store double %254, ptr %253, align 8
+ store double %256, ptr %255, align 8
+ store double %258, ptr %257, align 8
+ store double %260, ptr %259, align 8
+ store double %262, ptr %261, align 8
+ store double %264, ptr %263, align 8
+ store double %266, ptr %265, align 8
+ store double %268, ptr %267, align 8
+ store double %270, ptr %269, align 8
+ store double %272, ptr %271, align 8
+ store double %274, ptr %273, align 8
+ store double %276, ptr %275, align 8
+ store double %278, ptr %277, align 8
+ store double %280, ptr %279, align 8
+ store double %282, ptr %281, align 8
+ store double %284, ptr %283, align 8
+ store double %286, ptr %285, align 8
+ store double %288, ptr %287, align 8
+ store double %290, ptr %289, align 8
+ store double %292, ptr %291, align 8
+ store double %294, ptr %293, align 8
+ store double %296, ptr %295, align 8
+ store double %298, ptr %297, align 8
+ store double %300, ptr %299, align 8
+ store double %302, ptr %301, align 8
+ store double %304, ptr %303, align 8
+ store double %306, ptr %305, align 8
+ store double %308, ptr %307, align 8
+ store double %310, ptr %309, align 8
+ store double %312, ptr %311, align 8
+ store double %314, ptr %313, align 8
+ store double %316, ptr %315, align 8
+ store double %318, ptr %317, align 8
+ store double %320, ptr %319, align 8
+ store double %322, ptr %321, align 8
+ store double %324, ptr %323, align 8
+ store double %326, ptr %325, align 8
+ store double %328, ptr %327, align 8
+ store double %330, ptr %329, align 8
+ store double %332, ptr %331, align 8
+ store double %334, ptr %333, align 8
+ store double %336, ptr %335, align 8
+ store double %338, ptr %337, align 8
+ store double %340, ptr %339, align 8
+ store double %342, ptr %341, align 8
+ store double %344, ptr %343, align 8
+ store double %346, ptr %345, align 8
+ store double %348, ptr %347, align 8
+ store double %350, ptr %349, align 8
+ store double %352, ptr %351, align 8
+ store double %354, ptr %353, align 8
+ store double %356, ptr %355, align 8
+ store double %358, ptr %357, align 8
+ store double %360, ptr %359, align 8
+ store double %362, ptr %361, align 8
+ store double %364, ptr %363, align 8
+ store double %366, ptr %365, align 8
+ store double %368, ptr %367, align 8
+ store double %370, ptr %369, align 8
+ store double %372, ptr %371, align 8
+ store double %374, ptr %373, align 8
+ store double %376, ptr %375, align 8
+ store double %378, ptr %377, align 8
+ store double %380, ptr %379, align 8
+ store double %382, ptr %381, align 8
+ store double %384, ptr %383, align 8
+ store double %386, ptr %385, align 8
+ store double %388, ptr %387, align 8
+ store double %390, ptr %389, align 8
+ store double %392, ptr %391, align 8
+ store double %394, ptr %393, align 8
+ store double %396, ptr %395, align 8
+ store double %398, ptr %397, align 8
+ store double %400, ptr %399, align 8
+ store double %402, ptr %401, align 8
+ store double %404, ptr %403, align 8
+ store double %406, ptr %405, align 8
+ store double %408, ptr %407, align 8
+ store double %410, ptr %409, align 8
+ store double %412, ptr %411, align 8
+ store double %414, ptr %413, align 8
+ store double %416, ptr %415, align 8
+ store double %418, ptr %417, align 8
+ store double %420, ptr %419, align 8
+ store double %422, ptr %421, align 8
+ store double %424, ptr %423, align 8
+ store double %426, ptr %425, align 8
+ store double %428, ptr %427, align 8
+ store double %430, ptr %429, align 8
+ store double %432, ptr %431, align 8
+ store double %434, ptr %433, align 8
+ store double %436, ptr %435, align 8
+ store double %438, ptr %437, align 8
+ store double %440, ptr %439, align 8
+ store double %442, ptr %441, align 8
+ store double %444, ptr %443, align 8
+ store double %446, ptr %445, align 8
+ store double %448, ptr %447, align 8
+ store double %450, ptr %449, align 8
+ store double %452, ptr %451, align 8
+ store double %454, ptr %453, align 8
+ store double %456, ptr %455, align 8
+ store double %458, ptr %457, align 8
+ store double %460, ptr %459, align 8
+ store double %462, ptr %461, align 8
+ store double %464, ptr %463, align 8
+ store double %466, ptr %465, align 8
+ store double %468, ptr %467, align 8
+ store double %470, ptr %469, align 8
+ store double %472, ptr %471, align 8
+ store double %474, ptr %473, align 8
+ store double %476, ptr %475, align 8
+ store double %478, ptr %477, align 8
+ store double %480, ptr %479, align 8
+ store double %482, ptr %481, align 8
+ store double %484, ptr %483, align 8
+ store double %486, ptr %485, align 8
+ store double %488, ptr %487, align 8
+ store double %490, ptr %489, align 8
+ store double %492, ptr %491, align 8
+ store double %494, ptr %493, align 8
+ store double %496, ptr %495, align 8
+ store double %498, ptr %497, align 8
+ store double %500, ptr %499, align 8
+ store double %502, ptr %501, align 8
+ store double %504, ptr %503, align 8
+ store double %506, ptr %505, align 8
+ store double %508, ptr %507, align 8
+ store double %510, ptr %509, align 8
+ store double %512, ptr %511, align 8
+ ret void
+}
>From 5ff25a22a3e3f6706669f96d09d68bb00a45bf30 Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Tue, 19 Mar 2024 16:06:19 -0700
Subject: [PATCH 3/4] [RISCV] Preserve MMO when expanding
PseudoRV32ZdinxSD/PseudoRV32ZdinxLD.
This allows the asm printer to print the stack spill/reload
messages.
---
.../Target/RISCV/RISCVExpandPseudoInsts.cpp | 79 +-
llvm/test/CodeGen/RISCV/zdinx-large-spill.ll | 2048 ++++++++---------
2 files changed, 1079 insertions(+), 1048 deletions(-)
diff --git a/llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp b/llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
index 0a314fdd41cbe2..080a37c9a05ed9 100644
--- a/llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
+++ b/llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
@@ -312,26 +312,40 @@ bool RISCVExpandPseudo::expandRV32ZdinxStore(MachineBasicBlock &MBB,
TRI->getSubReg(MBBI->getOperand(0).getReg(), RISCV::sub_gpr_even);
Register Hi =
TRI->getSubReg(MBBI->getOperand(0).getReg(), RISCV::sub_gpr_odd);
- BuildMI(MBB, MBBI, DL, TII->get(RISCV::SW))
- .addReg(Lo, getKillRegState(MBBI->getOperand(0).isKill()))
- .addReg(MBBI->getOperand(1).getReg())
- .add(MBBI->getOperand(2));
+ auto MIBLo = BuildMI(MBB, MBBI, DL, TII->get(RISCV::SW))
+ .addReg(Lo, getKillRegState(MBBI->getOperand(0).isKill()))
+ .addReg(MBBI->getOperand(1).getReg())
+ .add(MBBI->getOperand(2));
+
+ MachineMemOperand *MMOHi = nullptr;
+ if (MBBI->hasOneMemOperand()) {
+ MachineMemOperand *OldMMO = MBBI->memoperands().front();
+ MachineFunction *MF = MBB.getParent();
+ MachineMemOperand *MMOLo = MF->getMachineMemOperand(OldMMO, 0, 4);
+ MMOHi = MF->getMachineMemOperand(OldMMO, 4, 4);
+ MIBLo.setMemRefs(MMOLo);
+ }
+
if (MBBI->getOperand(2).isGlobal() || MBBI->getOperand(2).isCPI()) {
// FIXME: Zdinx RV32 can not work on unaligned memory.
assert(!STI->hasFastUnalignedAccess());
assert(MBBI->getOperand(2).getOffset() % 8 == 0);
MBBI->getOperand(2).setOffset(MBBI->getOperand(2).getOffset() + 4);
- BuildMI(MBB, MBBI, DL, TII->get(RISCV::SW))
- .addReg(Hi, getKillRegState(MBBI->getOperand(0).isKill()))
- .add(MBBI->getOperand(1))
- .add(MBBI->getOperand(2));
+ auto MIBHi = BuildMI(MBB, MBBI, DL, TII->get(RISCV::SW))
+ .addReg(Hi, getKillRegState(MBBI->getOperand(0).isKill()))
+ .add(MBBI->getOperand(1))
+ .add(MBBI->getOperand(2));
+ if (MMOHi)
+ MIBHi.setMemRefs(MMOHi);
} else {
assert(isInt<12>(MBBI->getOperand(2).getImm() + 4));
- BuildMI(MBB, MBBI, DL, TII->get(RISCV::SW))
- .addReg(Hi, getKillRegState(MBBI->getOperand(0).isKill()))
- .add(MBBI->getOperand(1))
- .addImm(MBBI->getOperand(2).getImm() + 4);
+ auto MIBHi = BuildMI(MBB, MBBI, DL, TII->get(RISCV::SW))
+ .addReg(Hi, getKillRegState(MBBI->getOperand(0).isKill()))
+ .add(MBBI->getOperand(1))
+ .addImm(MBBI->getOperand(2).getImm() + 4);
+ if (MMOHi)
+ MIBHi.setMemRefs(MMOHi);
}
MBBI->eraseFromParent();
return true;
@@ -349,36 +363,53 @@ bool RISCVExpandPseudo::expandRV32ZdinxLoad(MachineBasicBlock &MBB,
Register Hi =
TRI->getSubReg(MBBI->getOperand(0).getReg(), RISCV::sub_gpr_odd);
+ MachineMemOperand *MMOLo = nullptr;
+ MachineMemOperand *MMOHi = nullptr;
+ if (MBBI->hasOneMemOperand()) {
+ MachineMemOperand *OldMMO = MBBI->memoperands().front();
+ MachineFunction *MF = MBB.getParent();
+ MMOLo = MF->getMachineMemOperand(OldMMO, 0, 4);
+ MMOHi = MF->getMachineMemOperand(OldMMO, 4, 4);
+ }
+
// If the register of operand 1 is equal to the Lo register, then swap the
// order of loading the Lo and Hi statements.
bool IsOp1EqualToLo = Lo == MBBI->getOperand(1).getReg();
// Order: Lo, Hi
if (!IsOp1EqualToLo) {
- BuildMI(MBB, MBBI, DL, TII->get(RISCV::LW), Lo)
- .addReg(MBBI->getOperand(1).getReg())
- .add(MBBI->getOperand(2));
+ auto MIBLo = BuildMI(MBB, MBBI, DL, TII->get(RISCV::LW), Lo)
+ .addReg(MBBI->getOperand(1).getReg())
+ .add(MBBI->getOperand(2));
+ if (MMOLo)
+ MIBLo.setMemRefs(MMOLo);
}
if (MBBI->getOperand(2).isGlobal() || MBBI->getOperand(2).isCPI()) {
auto Offset = MBBI->getOperand(2).getOffset();
assert(MBBI->getOperand(2).getOffset() % 8 == 0);
MBBI->getOperand(2).setOffset(Offset + 4);
- BuildMI(MBB, MBBI, DL, TII->get(RISCV::LW), Hi)
- .addReg(MBBI->getOperand(1).getReg())
- .add(MBBI->getOperand(2));
+ auto MIBHi = BuildMI(MBB, MBBI, DL, TII->get(RISCV::LW), Hi)
+ .addReg(MBBI->getOperand(1).getReg())
+ .add(MBBI->getOperand(2));
MBBI->getOperand(2).setOffset(Offset);
+ if (MMOHi)
+ MIBHi.setMemRefs(MMOHi);
} else {
assert(isInt<12>(MBBI->getOperand(2).getImm() + 4));
- BuildMI(MBB, MBBI, DL, TII->get(RISCV::LW), Hi)
- .addReg(MBBI->getOperand(1).getReg())
- .addImm(MBBI->getOperand(2).getImm() + 4);
+ auto MIBHi = BuildMI(MBB, MBBI, DL, TII->get(RISCV::LW), Hi)
+ .addReg(MBBI->getOperand(1).getReg())
+ .addImm(MBBI->getOperand(2).getImm() + 4);
+ if (MMOHi)
+ MIBHi.setMemRefs(MMOHi);
}
// Order: Hi, Lo
if (IsOp1EqualToLo) {
- BuildMI(MBB, MBBI, DL, TII->get(RISCV::LW), Lo)
- .addReg(MBBI->getOperand(1).getReg())
- .add(MBBI->getOperand(2));
+ auto MIBLo = BuildMI(MBB, MBBI, DL, TII->get(RISCV::LW), Lo)
+ .addReg(MBBI->getOperand(1).getReg())
+ .add(MBBI->getOperand(2));
+ if (MMOLo)
+ MIBLo.setMemRefs(MMOLo);
}
MBBI->eraseFromParent();
diff --git a/llvm/test/CodeGen/RISCV/zdinx-large-spill.ll b/llvm/test/CodeGen/RISCV/zdinx-large-spill.ll
index d9856478b19053..0abf49814db248 100644
--- a/llvm/test/CodeGen/RISCV/zdinx-large-spill.ll
+++ b/llvm/test/CodeGen/RISCV/zdinx-large-spill.ll
@@ -32,2057 +32,2057 @@ define void @foo(ptr nocapture noundef %0) nounwind {
; CHECK-NEXT: lw a3, 4(a0)
; CHECK-NEXT: lui a1, 1
; CHECK-NEXT: add a1, sp, a1
-; CHECK-NEXT: sw a2, -2044(a1)
-; CHECK-NEXT: sw a3, -2040(a1)
+; CHECK-NEXT: sw a2, -2044(a1) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, -2040(a1) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 8(a0)
; CHECK-NEXT: lw a3, 12(a0)
; CHECK-NEXT: addi a1, sp, 2044
-; CHECK-NEXT: sw a2, 0(a1)
-; CHECK-NEXT: sw a3, 4(a1)
+; CHECK-NEXT: sw a2, 0(a1) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 4(a1) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 16(a0)
; CHECK-NEXT: lw a3, 20(a0)
-; CHECK-NEXT: sw a2, 2036(sp)
-; CHECK-NEXT: sw a3, 2040(sp)
+; CHECK-NEXT: sw a2, 2036(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 2040(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 24(a0)
; CHECK-NEXT: lw a3, 28(a0)
-; CHECK-NEXT: sw a2, 2028(sp)
-; CHECK-NEXT: sw a3, 2032(sp)
+; CHECK-NEXT: sw a2, 2028(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 2032(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 32(a0)
; CHECK-NEXT: lw a3, 36(a0)
-; CHECK-NEXT: sw a2, 2020(sp)
-; CHECK-NEXT: sw a3, 2024(sp)
+; CHECK-NEXT: sw a2, 2020(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 2024(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 40(a0)
; CHECK-NEXT: lw a3, 44(a0)
-; CHECK-NEXT: sw a2, 2012(sp)
-; CHECK-NEXT: sw a3, 2016(sp)
+; CHECK-NEXT: sw a2, 2012(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 2016(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 48(a0)
; CHECK-NEXT: lw a3, 52(a0)
-; CHECK-NEXT: sw a2, 2004(sp)
-; CHECK-NEXT: sw a3, 2008(sp)
+; CHECK-NEXT: sw a2, 2004(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 2008(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 56(a0)
; CHECK-NEXT: lw a3, 60(a0)
-; CHECK-NEXT: sw a2, 1996(sp)
-; CHECK-NEXT: sw a3, 2000(sp)
+; CHECK-NEXT: sw a2, 1996(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 2000(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 64(a0)
; CHECK-NEXT: lw a3, 68(a0)
-; CHECK-NEXT: sw a2, 1988(sp)
-; CHECK-NEXT: sw a3, 1992(sp)
+; CHECK-NEXT: sw a2, 1988(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1992(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 72(a0)
; CHECK-NEXT: lw a3, 76(a0)
-; CHECK-NEXT: sw a2, 1980(sp)
-; CHECK-NEXT: sw a3, 1984(sp)
+; CHECK-NEXT: sw a2, 1980(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1984(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 80(a0)
; CHECK-NEXT: lw a3, 84(a0)
-; CHECK-NEXT: sw a2, 1972(sp)
-; CHECK-NEXT: sw a3, 1976(sp)
+; CHECK-NEXT: sw a2, 1972(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1976(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 88(a0)
; CHECK-NEXT: lw a3, 92(a0)
-; CHECK-NEXT: sw a2, 1964(sp)
-; CHECK-NEXT: sw a3, 1968(sp)
+; CHECK-NEXT: sw a2, 1964(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1968(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 96(a0)
; CHECK-NEXT: lw a3, 100(a0)
-; CHECK-NEXT: sw a2, 1956(sp)
-; CHECK-NEXT: sw a3, 1960(sp)
+; CHECK-NEXT: sw a2, 1956(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1960(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 104(a0)
; CHECK-NEXT: lw a3, 108(a0)
-; CHECK-NEXT: sw a2, 1948(sp)
-; CHECK-NEXT: sw a3, 1952(sp)
+; CHECK-NEXT: sw a2, 1948(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1952(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 112(a0)
; CHECK-NEXT: lw a3, 116(a0)
-; CHECK-NEXT: sw a2, 1940(sp)
-; CHECK-NEXT: sw a3, 1944(sp)
+; CHECK-NEXT: sw a2, 1940(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1944(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 120(a0)
; CHECK-NEXT: lw a3, 124(a0)
-; CHECK-NEXT: sw a2, 1932(sp)
-; CHECK-NEXT: sw a3, 1936(sp)
+; CHECK-NEXT: sw a2, 1932(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1936(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 128(a0)
; CHECK-NEXT: lw a3, 132(a0)
-; CHECK-NEXT: sw a2, 1924(sp)
-; CHECK-NEXT: sw a3, 1928(sp)
+; CHECK-NEXT: sw a2, 1924(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1928(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 136(a0)
; CHECK-NEXT: lw a3, 140(a0)
-; CHECK-NEXT: sw a2, 1916(sp)
-; CHECK-NEXT: sw a3, 1920(sp)
+; CHECK-NEXT: sw a2, 1916(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1920(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 144(a0)
; CHECK-NEXT: lw a3, 148(a0)
-; CHECK-NEXT: sw a2, 1908(sp)
-; CHECK-NEXT: sw a3, 1912(sp)
+; CHECK-NEXT: sw a2, 1908(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1912(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 152(a0)
; CHECK-NEXT: lw a3, 156(a0)
-; CHECK-NEXT: sw a2, 1900(sp)
-; CHECK-NEXT: sw a3, 1904(sp)
+; CHECK-NEXT: sw a2, 1900(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1904(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 160(a0)
; CHECK-NEXT: lw a3, 164(a0)
-; CHECK-NEXT: sw a2, 1892(sp)
-; CHECK-NEXT: sw a3, 1896(sp)
+; CHECK-NEXT: sw a2, 1892(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1896(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 168(a0)
; CHECK-NEXT: lw a3, 172(a0)
-; CHECK-NEXT: sw a2, 1884(sp)
-; CHECK-NEXT: sw a3, 1888(sp)
+; CHECK-NEXT: sw a2, 1884(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1888(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 176(a0)
; CHECK-NEXT: lw a3, 180(a0)
-; CHECK-NEXT: sw a2, 1876(sp)
-; CHECK-NEXT: sw a3, 1880(sp)
+; CHECK-NEXT: sw a2, 1876(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1880(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 184(a0)
; CHECK-NEXT: lw a3, 188(a0)
-; CHECK-NEXT: sw a2, 1868(sp)
-; CHECK-NEXT: sw a3, 1872(sp)
+; CHECK-NEXT: sw a2, 1868(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1872(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 192(a0)
; CHECK-NEXT: lw a3, 196(a0)
-; CHECK-NEXT: sw a2, 1860(sp)
-; CHECK-NEXT: sw a3, 1864(sp)
+; CHECK-NEXT: sw a2, 1860(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1864(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 200(a0)
; CHECK-NEXT: lw a3, 204(a0)
-; CHECK-NEXT: sw a2, 1852(sp)
-; CHECK-NEXT: sw a3, 1856(sp)
+; CHECK-NEXT: sw a2, 1852(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1856(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 208(a0)
; CHECK-NEXT: lw a3, 212(a0)
-; CHECK-NEXT: sw a2, 1844(sp)
-; CHECK-NEXT: sw a3, 1848(sp)
+; CHECK-NEXT: sw a2, 1844(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1848(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 216(a0)
; CHECK-NEXT: lw a3, 220(a0)
-; CHECK-NEXT: sw a2, 1836(sp)
-; CHECK-NEXT: sw a3, 1840(sp)
+; CHECK-NEXT: sw a2, 1836(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1840(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 224(a0)
; CHECK-NEXT: lw a3, 228(a0)
-; CHECK-NEXT: sw a2, 1828(sp)
-; CHECK-NEXT: sw a3, 1832(sp)
+; CHECK-NEXT: sw a2, 1828(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1832(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 232(a0)
; CHECK-NEXT: lw a3, 236(a0)
-; CHECK-NEXT: sw a2, 1820(sp)
-; CHECK-NEXT: sw a3, 1824(sp)
+; CHECK-NEXT: sw a2, 1820(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1824(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 240(a0)
; CHECK-NEXT: lw a3, 244(a0)
-; CHECK-NEXT: sw a2, 1812(sp)
-; CHECK-NEXT: sw a3, 1816(sp)
+; CHECK-NEXT: sw a2, 1812(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1816(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 248(a0)
; CHECK-NEXT: lw a3, 252(a0)
-; CHECK-NEXT: sw a2, 1804(sp)
-; CHECK-NEXT: sw a3, 1808(sp)
+; CHECK-NEXT: sw a2, 1804(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1808(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 256(a0)
; CHECK-NEXT: lw a3, 260(a0)
-; CHECK-NEXT: sw a2, 1796(sp)
-; CHECK-NEXT: sw a3, 1800(sp)
+; CHECK-NEXT: sw a2, 1796(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1800(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 264(a0)
; CHECK-NEXT: lw a3, 268(a0)
-; CHECK-NEXT: sw a2, 1788(sp)
-; CHECK-NEXT: sw a3, 1792(sp)
+; CHECK-NEXT: sw a2, 1788(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1792(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 272(a0)
; CHECK-NEXT: lw a3, 276(a0)
-; CHECK-NEXT: sw a2, 1780(sp)
-; CHECK-NEXT: sw a3, 1784(sp)
+; CHECK-NEXT: sw a2, 1780(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1784(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 280(a0)
; CHECK-NEXT: lw a3, 284(a0)
-; CHECK-NEXT: sw a2, 1772(sp)
-; CHECK-NEXT: sw a3, 1776(sp)
+; CHECK-NEXT: sw a2, 1772(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1776(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 288(a0)
; CHECK-NEXT: lw a3, 292(a0)
-; CHECK-NEXT: sw a2, 1764(sp)
-; CHECK-NEXT: sw a3, 1768(sp)
+; CHECK-NEXT: sw a2, 1764(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1768(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 296(a0)
; CHECK-NEXT: lw a3, 300(a0)
-; CHECK-NEXT: sw a2, 1756(sp)
-; CHECK-NEXT: sw a3, 1760(sp)
+; CHECK-NEXT: sw a2, 1756(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1760(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 304(a0)
; CHECK-NEXT: lw a3, 308(a0)
-; CHECK-NEXT: sw a2, 1748(sp)
-; CHECK-NEXT: sw a3, 1752(sp)
+; CHECK-NEXT: sw a2, 1748(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1752(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 312(a0)
; CHECK-NEXT: lw a3, 316(a0)
-; CHECK-NEXT: sw a2, 1740(sp)
-; CHECK-NEXT: sw a3, 1744(sp)
+; CHECK-NEXT: sw a2, 1740(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1744(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 320(a0)
; CHECK-NEXT: lw a3, 324(a0)
-; CHECK-NEXT: sw a2, 1732(sp)
-; CHECK-NEXT: sw a3, 1736(sp)
+; CHECK-NEXT: sw a2, 1732(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1736(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 328(a0)
; CHECK-NEXT: lw a3, 332(a0)
-; CHECK-NEXT: sw a2, 1724(sp)
-; CHECK-NEXT: sw a3, 1728(sp)
+; CHECK-NEXT: sw a2, 1724(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1728(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 336(a0)
; CHECK-NEXT: lw a3, 340(a0)
-; CHECK-NEXT: sw a2, 1716(sp)
-; CHECK-NEXT: sw a3, 1720(sp)
+; CHECK-NEXT: sw a2, 1716(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1720(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 344(a0)
; CHECK-NEXT: lw a3, 348(a0)
-; CHECK-NEXT: sw a2, 1708(sp)
-; CHECK-NEXT: sw a3, 1712(sp)
+; CHECK-NEXT: sw a2, 1708(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1712(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 352(a0)
; CHECK-NEXT: lw a3, 356(a0)
-; CHECK-NEXT: sw a2, 1700(sp)
-; CHECK-NEXT: sw a3, 1704(sp)
+; CHECK-NEXT: sw a2, 1700(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1704(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 360(a0)
; CHECK-NEXT: lw a3, 364(a0)
-; CHECK-NEXT: sw a2, 1692(sp)
-; CHECK-NEXT: sw a3, 1696(sp)
+; CHECK-NEXT: sw a2, 1692(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1696(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 368(a0)
; CHECK-NEXT: lw a3, 372(a0)
-; CHECK-NEXT: sw a2, 1684(sp)
-; CHECK-NEXT: sw a3, 1688(sp)
+; CHECK-NEXT: sw a2, 1684(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1688(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 376(a0)
; CHECK-NEXT: lw a3, 380(a0)
-; CHECK-NEXT: sw a2, 1676(sp)
-; CHECK-NEXT: sw a3, 1680(sp)
+; CHECK-NEXT: sw a2, 1676(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1680(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 384(a0)
; CHECK-NEXT: lw a3, 388(a0)
-; CHECK-NEXT: sw a2, 1668(sp)
-; CHECK-NEXT: sw a3, 1672(sp)
+; CHECK-NEXT: sw a2, 1668(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1672(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 392(a0)
; CHECK-NEXT: lw a3, 396(a0)
-; CHECK-NEXT: sw a2, 1660(sp)
-; CHECK-NEXT: sw a3, 1664(sp)
+; CHECK-NEXT: sw a2, 1660(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1664(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 400(a0)
; CHECK-NEXT: lw a3, 404(a0)
-; CHECK-NEXT: sw a2, 1652(sp)
-; CHECK-NEXT: sw a3, 1656(sp)
+; CHECK-NEXT: sw a2, 1652(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1656(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 408(a0)
; CHECK-NEXT: lw a3, 412(a0)
-; CHECK-NEXT: sw a2, 1644(sp)
-; CHECK-NEXT: sw a3, 1648(sp)
+; CHECK-NEXT: sw a2, 1644(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1648(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 416(a0)
; CHECK-NEXT: lw a3, 420(a0)
-; CHECK-NEXT: sw a2, 1636(sp)
-; CHECK-NEXT: sw a3, 1640(sp)
+; CHECK-NEXT: sw a2, 1636(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1640(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 424(a0)
; CHECK-NEXT: lw a3, 428(a0)
-; CHECK-NEXT: sw a2, 1628(sp)
-; CHECK-NEXT: sw a3, 1632(sp)
+; CHECK-NEXT: sw a2, 1628(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1632(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 432(a0)
; CHECK-NEXT: lw a3, 436(a0)
-; CHECK-NEXT: sw a2, 1620(sp)
-; CHECK-NEXT: sw a3, 1624(sp)
+; CHECK-NEXT: sw a2, 1620(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1624(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 440(a0)
; CHECK-NEXT: lw a3, 444(a0)
-; CHECK-NEXT: sw a2, 1612(sp)
-; CHECK-NEXT: sw a3, 1616(sp)
+; CHECK-NEXT: sw a2, 1612(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1616(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 448(a0)
; CHECK-NEXT: lw a3, 452(a0)
-; CHECK-NEXT: sw a2, 1604(sp)
-; CHECK-NEXT: sw a3, 1608(sp)
+; CHECK-NEXT: sw a2, 1604(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1608(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 456(a0)
; CHECK-NEXT: lw a3, 460(a0)
-; CHECK-NEXT: sw a2, 1596(sp)
-; CHECK-NEXT: sw a3, 1600(sp)
+; CHECK-NEXT: sw a2, 1596(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1600(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 464(a0)
; CHECK-NEXT: lw a3, 468(a0)
-; CHECK-NEXT: sw a2, 1588(sp)
-; CHECK-NEXT: sw a3, 1592(sp)
+; CHECK-NEXT: sw a2, 1588(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1592(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 472(a0)
; CHECK-NEXT: lw a3, 476(a0)
-; CHECK-NEXT: sw a2, 1580(sp)
-; CHECK-NEXT: sw a3, 1584(sp)
+; CHECK-NEXT: sw a2, 1580(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1584(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 480(a0)
; CHECK-NEXT: lw a3, 484(a0)
-; CHECK-NEXT: sw a2, 1572(sp)
-; CHECK-NEXT: sw a3, 1576(sp)
+; CHECK-NEXT: sw a2, 1572(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1576(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 488(a0)
; CHECK-NEXT: lw a3, 492(a0)
-; CHECK-NEXT: sw a2, 1564(sp)
-; CHECK-NEXT: sw a3, 1568(sp)
+; CHECK-NEXT: sw a2, 1564(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1568(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 496(a0)
; CHECK-NEXT: lw a3, 500(a0)
-; CHECK-NEXT: sw a2, 1556(sp)
-; CHECK-NEXT: sw a3, 1560(sp)
+; CHECK-NEXT: sw a2, 1556(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1560(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 504(a0)
; CHECK-NEXT: lw a3, 508(a0)
-; CHECK-NEXT: sw a2, 1548(sp)
-; CHECK-NEXT: sw a3, 1552(sp)
+; CHECK-NEXT: sw a2, 1548(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1552(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 512(a0)
; CHECK-NEXT: lw a3, 516(a0)
-; CHECK-NEXT: sw a2, 1540(sp)
-; CHECK-NEXT: sw a3, 1544(sp)
+; CHECK-NEXT: sw a2, 1540(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1544(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 520(a0)
; CHECK-NEXT: lw a3, 524(a0)
-; CHECK-NEXT: sw a2, 1532(sp)
-; CHECK-NEXT: sw a3, 1536(sp)
+; CHECK-NEXT: sw a2, 1532(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1536(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 528(a0)
; CHECK-NEXT: lw a3, 532(a0)
-; CHECK-NEXT: sw a2, 1524(sp)
-; CHECK-NEXT: sw a3, 1528(sp)
+; CHECK-NEXT: sw a2, 1524(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1528(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 536(a0)
; CHECK-NEXT: lw a3, 540(a0)
-; CHECK-NEXT: sw a2, 1516(sp)
-; CHECK-NEXT: sw a3, 1520(sp)
+; CHECK-NEXT: sw a2, 1516(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1520(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 544(a0)
; CHECK-NEXT: lw a3, 548(a0)
-; CHECK-NEXT: sw a2, 1508(sp)
-; CHECK-NEXT: sw a3, 1512(sp)
+; CHECK-NEXT: sw a2, 1508(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1512(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 552(a0)
; CHECK-NEXT: lw a3, 556(a0)
-; CHECK-NEXT: sw a2, 1500(sp)
-; CHECK-NEXT: sw a3, 1504(sp)
+; CHECK-NEXT: sw a2, 1500(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1504(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 560(a0)
; CHECK-NEXT: lw a3, 564(a0)
-; CHECK-NEXT: sw a2, 1492(sp)
-; CHECK-NEXT: sw a3, 1496(sp)
+; CHECK-NEXT: sw a2, 1492(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1496(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 568(a0)
; CHECK-NEXT: lw a3, 572(a0)
-; CHECK-NEXT: sw a2, 1484(sp)
-; CHECK-NEXT: sw a3, 1488(sp)
+; CHECK-NEXT: sw a2, 1484(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1488(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 576(a0)
; CHECK-NEXT: lw a3, 580(a0)
-; CHECK-NEXT: sw a2, 1476(sp)
-; CHECK-NEXT: sw a3, 1480(sp)
+; CHECK-NEXT: sw a2, 1476(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1480(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 584(a0)
; CHECK-NEXT: lw a3, 588(a0)
-; CHECK-NEXT: sw a2, 1468(sp)
-; CHECK-NEXT: sw a3, 1472(sp)
+; CHECK-NEXT: sw a2, 1468(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1472(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 592(a0)
; CHECK-NEXT: lw a3, 596(a0)
-; CHECK-NEXT: sw a2, 1460(sp)
-; CHECK-NEXT: sw a3, 1464(sp)
+; CHECK-NEXT: sw a2, 1460(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1464(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 600(a0)
; CHECK-NEXT: lw a3, 604(a0)
-; CHECK-NEXT: sw a2, 1452(sp)
-; CHECK-NEXT: sw a3, 1456(sp)
+; CHECK-NEXT: sw a2, 1452(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1456(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 608(a0)
; CHECK-NEXT: lw a3, 612(a0)
-; CHECK-NEXT: sw a2, 1444(sp)
-; CHECK-NEXT: sw a3, 1448(sp)
+; CHECK-NEXT: sw a2, 1444(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1448(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 616(a0)
; CHECK-NEXT: lw a3, 620(a0)
-; CHECK-NEXT: sw a2, 1436(sp)
-; CHECK-NEXT: sw a3, 1440(sp)
+; CHECK-NEXT: sw a2, 1436(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1440(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 624(a0)
; CHECK-NEXT: lw a3, 628(a0)
-; CHECK-NEXT: sw a2, 1428(sp)
-; CHECK-NEXT: sw a3, 1432(sp)
+; CHECK-NEXT: sw a2, 1428(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1432(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 632(a0)
; CHECK-NEXT: lw a3, 636(a0)
-; CHECK-NEXT: sw a2, 1420(sp)
-; CHECK-NEXT: sw a3, 1424(sp)
+; CHECK-NEXT: sw a2, 1420(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1424(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 640(a0)
; CHECK-NEXT: lw a3, 644(a0)
-; CHECK-NEXT: sw a2, 1412(sp)
-; CHECK-NEXT: sw a3, 1416(sp)
+; CHECK-NEXT: sw a2, 1412(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1416(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 648(a0)
; CHECK-NEXT: lw a3, 652(a0)
-; CHECK-NEXT: sw a2, 1404(sp)
-; CHECK-NEXT: sw a3, 1408(sp)
+; CHECK-NEXT: sw a2, 1404(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1408(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 656(a0)
; CHECK-NEXT: lw a3, 660(a0)
-; CHECK-NEXT: sw a2, 1396(sp)
-; CHECK-NEXT: sw a3, 1400(sp)
+; CHECK-NEXT: sw a2, 1396(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1400(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 664(a0)
; CHECK-NEXT: lw a3, 668(a0)
-; CHECK-NEXT: sw a2, 1388(sp)
-; CHECK-NEXT: sw a3, 1392(sp)
+; CHECK-NEXT: sw a2, 1388(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1392(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 672(a0)
; CHECK-NEXT: lw a3, 676(a0)
-; CHECK-NEXT: sw a2, 1380(sp)
-; CHECK-NEXT: sw a3, 1384(sp)
+; CHECK-NEXT: sw a2, 1380(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1384(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 680(a0)
; CHECK-NEXT: lw a3, 684(a0)
-; CHECK-NEXT: sw a2, 1372(sp)
-; CHECK-NEXT: sw a3, 1376(sp)
+; CHECK-NEXT: sw a2, 1372(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1376(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 688(a0)
; CHECK-NEXT: lw a3, 692(a0)
-; CHECK-NEXT: sw a2, 1364(sp)
-; CHECK-NEXT: sw a3, 1368(sp)
+; CHECK-NEXT: sw a2, 1364(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1368(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 696(a0)
; CHECK-NEXT: lw a3, 700(a0)
-; CHECK-NEXT: sw a2, 1356(sp)
-; CHECK-NEXT: sw a3, 1360(sp)
+; CHECK-NEXT: sw a2, 1356(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1360(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 704(a0)
; CHECK-NEXT: lw a3, 708(a0)
-; CHECK-NEXT: sw a2, 1348(sp)
-; CHECK-NEXT: sw a3, 1352(sp)
+; CHECK-NEXT: sw a2, 1348(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1352(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 712(a0)
; CHECK-NEXT: lw a3, 716(a0)
-; CHECK-NEXT: sw a2, 1340(sp)
-; CHECK-NEXT: sw a3, 1344(sp)
+; CHECK-NEXT: sw a2, 1340(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1344(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 720(a0)
; CHECK-NEXT: lw a3, 724(a0)
-; CHECK-NEXT: sw a2, 1332(sp)
-; CHECK-NEXT: sw a3, 1336(sp)
+; CHECK-NEXT: sw a2, 1332(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1336(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 728(a0)
; CHECK-NEXT: lw a3, 732(a0)
-; CHECK-NEXT: sw a2, 1324(sp)
-; CHECK-NEXT: sw a3, 1328(sp)
+; CHECK-NEXT: sw a2, 1324(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1328(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 736(a0)
; CHECK-NEXT: lw a3, 740(a0)
-; CHECK-NEXT: sw a2, 1316(sp)
-; CHECK-NEXT: sw a3, 1320(sp)
+; CHECK-NEXT: sw a2, 1316(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1320(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 744(a0)
; CHECK-NEXT: lw a3, 748(a0)
-; CHECK-NEXT: sw a2, 1308(sp)
-; CHECK-NEXT: sw a3, 1312(sp)
+; CHECK-NEXT: sw a2, 1308(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1312(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 752(a0)
; CHECK-NEXT: lw a3, 756(a0)
-; CHECK-NEXT: sw a2, 1300(sp)
-; CHECK-NEXT: sw a3, 1304(sp)
+; CHECK-NEXT: sw a2, 1300(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1304(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 760(a0)
; CHECK-NEXT: lw a3, 764(a0)
-; CHECK-NEXT: sw a2, 1292(sp)
-; CHECK-NEXT: sw a3, 1296(sp)
+; CHECK-NEXT: sw a2, 1292(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1296(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 768(a0)
; CHECK-NEXT: lw a3, 772(a0)
-; CHECK-NEXT: sw a2, 1284(sp)
-; CHECK-NEXT: sw a3, 1288(sp)
+; CHECK-NEXT: sw a2, 1284(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1288(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 776(a0)
; CHECK-NEXT: lw a3, 780(a0)
-; CHECK-NEXT: sw a2, 1276(sp)
-; CHECK-NEXT: sw a3, 1280(sp)
+; CHECK-NEXT: sw a2, 1276(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1280(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 784(a0)
; CHECK-NEXT: lw a3, 788(a0)
-; CHECK-NEXT: sw a2, 1268(sp)
-; CHECK-NEXT: sw a3, 1272(sp)
+; CHECK-NEXT: sw a2, 1268(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1272(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 792(a0)
; CHECK-NEXT: lw a3, 796(a0)
-; CHECK-NEXT: sw a2, 1260(sp)
-; CHECK-NEXT: sw a3, 1264(sp)
+; CHECK-NEXT: sw a2, 1260(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1264(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 800(a0)
; CHECK-NEXT: lw a3, 804(a0)
-; CHECK-NEXT: sw a2, 1252(sp)
-; CHECK-NEXT: sw a3, 1256(sp)
+; CHECK-NEXT: sw a2, 1252(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1256(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 808(a0)
; CHECK-NEXT: lw a3, 812(a0)
-; CHECK-NEXT: sw a2, 1244(sp)
-; CHECK-NEXT: sw a3, 1248(sp)
+; CHECK-NEXT: sw a2, 1244(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1248(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 816(a0)
; CHECK-NEXT: lw a3, 820(a0)
-; CHECK-NEXT: sw a2, 1236(sp)
-; CHECK-NEXT: sw a3, 1240(sp)
+; CHECK-NEXT: sw a2, 1236(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1240(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 824(a0)
; CHECK-NEXT: lw a3, 828(a0)
-; CHECK-NEXT: sw a2, 1228(sp)
-; CHECK-NEXT: sw a3, 1232(sp)
+; CHECK-NEXT: sw a2, 1228(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1232(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 832(a0)
; CHECK-NEXT: lw a3, 836(a0)
-; CHECK-NEXT: sw a2, 1220(sp)
-; CHECK-NEXT: sw a3, 1224(sp)
+; CHECK-NEXT: sw a2, 1220(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1224(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 840(a0)
; CHECK-NEXT: lw a3, 844(a0)
-; CHECK-NEXT: sw a2, 1212(sp)
-; CHECK-NEXT: sw a3, 1216(sp)
+; CHECK-NEXT: sw a2, 1212(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1216(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 848(a0)
; CHECK-NEXT: lw a3, 852(a0)
-; CHECK-NEXT: sw a2, 1204(sp)
-; CHECK-NEXT: sw a3, 1208(sp)
+; CHECK-NEXT: sw a2, 1204(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1208(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 856(a0)
; CHECK-NEXT: lw a3, 860(a0)
-; CHECK-NEXT: sw a2, 1196(sp)
-; CHECK-NEXT: sw a3, 1200(sp)
+; CHECK-NEXT: sw a2, 1196(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1200(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 864(a0)
; CHECK-NEXT: lw a3, 868(a0)
-; CHECK-NEXT: sw a2, 1188(sp)
-; CHECK-NEXT: sw a3, 1192(sp)
+; CHECK-NEXT: sw a2, 1188(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1192(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 872(a0)
; CHECK-NEXT: lw a3, 876(a0)
-; CHECK-NEXT: sw a2, 1180(sp)
-; CHECK-NEXT: sw a3, 1184(sp)
+; CHECK-NEXT: sw a2, 1180(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1184(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 880(a0)
; CHECK-NEXT: lw a3, 884(a0)
-; CHECK-NEXT: sw a2, 1172(sp)
-; CHECK-NEXT: sw a3, 1176(sp)
+; CHECK-NEXT: sw a2, 1172(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1176(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 888(a0)
; CHECK-NEXT: lw a3, 892(a0)
-; CHECK-NEXT: sw a2, 1164(sp)
-; CHECK-NEXT: sw a3, 1168(sp)
+; CHECK-NEXT: sw a2, 1164(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1168(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 896(a0)
; CHECK-NEXT: lw a3, 900(a0)
-; CHECK-NEXT: sw a2, 1156(sp)
-; CHECK-NEXT: sw a3, 1160(sp)
+; CHECK-NEXT: sw a2, 1156(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1160(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 904(a0)
; CHECK-NEXT: lw a3, 908(a0)
-; CHECK-NEXT: sw a2, 1148(sp)
-; CHECK-NEXT: sw a3, 1152(sp)
+; CHECK-NEXT: sw a2, 1148(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1152(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 912(a0)
; CHECK-NEXT: lw a3, 916(a0)
-; CHECK-NEXT: sw a2, 1140(sp)
-; CHECK-NEXT: sw a3, 1144(sp)
+; CHECK-NEXT: sw a2, 1140(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1144(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 920(a0)
; CHECK-NEXT: lw a3, 924(a0)
-; CHECK-NEXT: sw a2, 1132(sp)
-; CHECK-NEXT: sw a3, 1136(sp)
+; CHECK-NEXT: sw a2, 1132(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1136(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 928(a0)
; CHECK-NEXT: lw a3, 932(a0)
-; CHECK-NEXT: sw a2, 1124(sp)
-; CHECK-NEXT: sw a3, 1128(sp)
+; CHECK-NEXT: sw a2, 1124(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1128(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 936(a0)
; CHECK-NEXT: lw a3, 940(a0)
-; CHECK-NEXT: sw a2, 1116(sp)
-; CHECK-NEXT: sw a3, 1120(sp)
+; CHECK-NEXT: sw a2, 1116(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1120(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 944(a0)
; CHECK-NEXT: lw a3, 948(a0)
-; CHECK-NEXT: sw a2, 1108(sp)
-; CHECK-NEXT: sw a3, 1112(sp)
+; CHECK-NEXT: sw a2, 1108(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1112(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 952(a0)
; CHECK-NEXT: lw a3, 956(a0)
-; CHECK-NEXT: sw a2, 1100(sp)
-; CHECK-NEXT: sw a3, 1104(sp)
+; CHECK-NEXT: sw a2, 1100(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1104(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 960(a0)
; CHECK-NEXT: lw a3, 964(a0)
-; CHECK-NEXT: sw a2, 1092(sp)
-; CHECK-NEXT: sw a3, 1096(sp)
+; CHECK-NEXT: sw a2, 1092(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1096(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 968(a0)
; CHECK-NEXT: lw a3, 972(a0)
-; CHECK-NEXT: sw a2, 1084(sp)
-; CHECK-NEXT: sw a3, 1088(sp)
+; CHECK-NEXT: sw a2, 1084(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1088(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 976(a0)
; CHECK-NEXT: lw a3, 980(a0)
-; CHECK-NEXT: sw a2, 1076(sp)
-; CHECK-NEXT: sw a3, 1080(sp)
+; CHECK-NEXT: sw a2, 1076(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1080(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 984(a0)
; CHECK-NEXT: lw a3, 988(a0)
-; CHECK-NEXT: sw a2, 1068(sp)
-; CHECK-NEXT: sw a3, 1072(sp)
+; CHECK-NEXT: sw a2, 1068(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1072(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 992(a0)
; CHECK-NEXT: lw a3, 996(a0)
-; CHECK-NEXT: sw a2, 1060(sp)
-; CHECK-NEXT: sw a3, 1064(sp)
+; CHECK-NEXT: sw a2, 1060(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1064(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1000(a0)
; CHECK-NEXT: lw a3, 1004(a0)
-; CHECK-NEXT: sw a2, 1052(sp)
-; CHECK-NEXT: sw a3, 1056(sp)
+; CHECK-NEXT: sw a2, 1052(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1056(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1008(a0)
; CHECK-NEXT: lw a3, 1012(a0)
-; CHECK-NEXT: sw a2, 1044(sp)
-; CHECK-NEXT: sw a3, 1048(sp)
+; CHECK-NEXT: sw a2, 1044(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1048(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1016(a0)
; CHECK-NEXT: lw a3, 1020(a0)
-; CHECK-NEXT: sw a2, 1036(sp)
-; CHECK-NEXT: sw a3, 1040(sp)
+; CHECK-NEXT: sw a2, 1036(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1040(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1024(a0)
; CHECK-NEXT: lw a3, 1028(a0)
-; CHECK-NEXT: sw a2, 1028(sp)
-; CHECK-NEXT: sw a3, 1032(sp)
+; CHECK-NEXT: sw a2, 1028(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1032(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1032(a0)
; CHECK-NEXT: lw a3, 1036(a0)
-; CHECK-NEXT: sw a2, 1020(sp)
-; CHECK-NEXT: sw a3, 1024(sp)
+; CHECK-NEXT: sw a2, 1020(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1024(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1040(a0)
; CHECK-NEXT: lw a3, 1044(a0)
-; CHECK-NEXT: sw a2, 1012(sp)
-; CHECK-NEXT: sw a3, 1016(sp)
+; CHECK-NEXT: sw a2, 1012(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1016(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1048(a0)
; CHECK-NEXT: lw a3, 1052(a0)
-; CHECK-NEXT: sw a2, 1004(sp)
-; CHECK-NEXT: sw a3, 1008(sp)
+; CHECK-NEXT: sw a2, 1004(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1008(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1056(a0)
; CHECK-NEXT: lw a3, 1060(a0)
-; CHECK-NEXT: sw a2, 996(sp)
-; CHECK-NEXT: sw a3, 1000(sp)
+; CHECK-NEXT: sw a2, 996(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 1000(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1064(a0)
; CHECK-NEXT: lw a3, 1068(a0)
-; CHECK-NEXT: sw a2, 988(sp)
-; CHECK-NEXT: sw a3, 992(sp)
+; CHECK-NEXT: sw a2, 988(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 992(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1072(a0)
; CHECK-NEXT: lw a3, 1076(a0)
-; CHECK-NEXT: sw a2, 980(sp)
-; CHECK-NEXT: sw a3, 984(sp)
+; CHECK-NEXT: sw a2, 980(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 984(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1080(a0)
; CHECK-NEXT: lw a3, 1084(a0)
-; CHECK-NEXT: sw a2, 972(sp)
-; CHECK-NEXT: sw a3, 976(sp)
+; CHECK-NEXT: sw a2, 972(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 976(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1088(a0)
; CHECK-NEXT: lw a3, 1092(a0)
-; CHECK-NEXT: sw a2, 964(sp)
-; CHECK-NEXT: sw a3, 968(sp)
+; CHECK-NEXT: sw a2, 964(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 968(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1096(a0)
; CHECK-NEXT: lw a3, 1100(a0)
-; CHECK-NEXT: sw a2, 956(sp)
-; CHECK-NEXT: sw a3, 960(sp)
+; CHECK-NEXT: sw a2, 956(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 960(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1104(a0)
; CHECK-NEXT: lw a3, 1108(a0)
-; CHECK-NEXT: sw a2, 948(sp)
-; CHECK-NEXT: sw a3, 952(sp)
+; CHECK-NEXT: sw a2, 948(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 952(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1112(a0)
; CHECK-NEXT: lw a3, 1116(a0)
-; CHECK-NEXT: sw a2, 940(sp)
-; CHECK-NEXT: sw a3, 944(sp)
+; CHECK-NEXT: sw a2, 940(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 944(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1120(a0)
; CHECK-NEXT: lw a3, 1124(a0)
-; CHECK-NEXT: sw a2, 932(sp)
-; CHECK-NEXT: sw a3, 936(sp)
+; CHECK-NEXT: sw a2, 932(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 936(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1128(a0)
; CHECK-NEXT: lw a3, 1132(a0)
-; CHECK-NEXT: sw a2, 924(sp)
-; CHECK-NEXT: sw a3, 928(sp)
+; CHECK-NEXT: sw a2, 924(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 928(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1136(a0)
; CHECK-NEXT: lw a3, 1140(a0)
-; CHECK-NEXT: sw a2, 916(sp)
-; CHECK-NEXT: sw a3, 920(sp)
+; CHECK-NEXT: sw a2, 916(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 920(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1144(a0)
; CHECK-NEXT: lw a3, 1148(a0)
-; CHECK-NEXT: sw a2, 908(sp)
-; CHECK-NEXT: sw a3, 912(sp)
+; CHECK-NEXT: sw a2, 908(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 912(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1152(a0)
; CHECK-NEXT: lw a3, 1156(a0)
-; CHECK-NEXT: sw a2, 900(sp)
-; CHECK-NEXT: sw a3, 904(sp)
+; CHECK-NEXT: sw a2, 900(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 904(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1160(a0)
; CHECK-NEXT: lw a3, 1164(a0)
-; CHECK-NEXT: sw a2, 892(sp)
-; CHECK-NEXT: sw a3, 896(sp)
+; CHECK-NEXT: sw a2, 892(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 896(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1168(a0)
; CHECK-NEXT: lw a3, 1172(a0)
-; CHECK-NEXT: sw a2, 884(sp)
-; CHECK-NEXT: sw a3, 888(sp)
+; CHECK-NEXT: sw a2, 884(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 888(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1176(a0)
; CHECK-NEXT: lw a3, 1180(a0)
-; CHECK-NEXT: sw a2, 876(sp)
-; CHECK-NEXT: sw a3, 880(sp)
+; CHECK-NEXT: sw a2, 876(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 880(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1184(a0)
; CHECK-NEXT: lw a3, 1188(a0)
-; CHECK-NEXT: sw a2, 868(sp)
-; CHECK-NEXT: sw a3, 872(sp)
+; CHECK-NEXT: sw a2, 868(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 872(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1192(a0)
; CHECK-NEXT: lw a3, 1196(a0)
-; CHECK-NEXT: sw a2, 860(sp)
-; CHECK-NEXT: sw a3, 864(sp)
+; CHECK-NEXT: sw a2, 860(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 864(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1200(a0)
; CHECK-NEXT: lw a3, 1204(a0)
-; CHECK-NEXT: sw a2, 852(sp)
-; CHECK-NEXT: sw a3, 856(sp)
+; CHECK-NEXT: sw a2, 852(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 856(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1208(a0)
; CHECK-NEXT: lw a3, 1212(a0)
-; CHECK-NEXT: sw a2, 844(sp)
-; CHECK-NEXT: sw a3, 848(sp)
+; CHECK-NEXT: sw a2, 844(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 848(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1216(a0)
; CHECK-NEXT: lw a3, 1220(a0)
-; CHECK-NEXT: sw a2, 836(sp)
-; CHECK-NEXT: sw a3, 840(sp)
+; CHECK-NEXT: sw a2, 836(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 840(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1224(a0)
; CHECK-NEXT: lw a3, 1228(a0)
-; CHECK-NEXT: sw a2, 828(sp)
-; CHECK-NEXT: sw a3, 832(sp)
+; CHECK-NEXT: sw a2, 828(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 832(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1232(a0)
; CHECK-NEXT: lw a3, 1236(a0)
-; CHECK-NEXT: sw a2, 820(sp)
-; CHECK-NEXT: sw a3, 824(sp)
+; CHECK-NEXT: sw a2, 820(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 824(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1240(a0)
; CHECK-NEXT: lw a3, 1244(a0)
-; CHECK-NEXT: sw a2, 812(sp)
-; CHECK-NEXT: sw a3, 816(sp)
+; CHECK-NEXT: sw a2, 812(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 816(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1248(a0)
; CHECK-NEXT: lw a3, 1252(a0)
-; CHECK-NEXT: sw a2, 804(sp)
-; CHECK-NEXT: sw a3, 808(sp)
+; CHECK-NEXT: sw a2, 804(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 808(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1256(a0)
; CHECK-NEXT: lw a3, 1260(a0)
-; CHECK-NEXT: sw a2, 796(sp)
-; CHECK-NEXT: sw a3, 800(sp)
+; CHECK-NEXT: sw a2, 796(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 800(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1264(a0)
; CHECK-NEXT: lw a3, 1268(a0)
-; CHECK-NEXT: sw a2, 788(sp)
-; CHECK-NEXT: sw a3, 792(sp)
+; CHECK-NEXT: sw a2, 788(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 792(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1272(a0)
; CHECK-NEXT: lw a3, 1276(a0)
-; CHECK-NEXT: sw a2, 780(sp)
-; CHECK-NEXT: sw a3, 784(sp)
+; CHECK-NEXT: sw a2, 780(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 784(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1280(a0)
; CHECK-NEXT: lw a3, 1284(a0)
-; CHECK-NEXT: sw a2, 772(sp)
-; CHECK-NEXT: sw a3, 776(sp)
+; CHECK-NEXT: sw a2, 772(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 776(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1288(a0)
; CHECK-NEXT: lw a3, 1292(a0)
-; CHECK-NEXT: sw a2, 764(sp)
-; CHECK-NEXT: sw a3, 768(sp)
+; CHECK-NEXT: sw a2, 764(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 768(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1296(a0)
; CHECK-NEXT: lw a3, 1300(a0)
-; CHECK-NEXT: sw a2, 756(sp)
-; CHECK-NEXT: sw a3, 760(sp)
+; CHECK-NEXT: sw a2, 756(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 760(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1304(a0)
; CHECK-NEXT: lw a3, 1308(a0)
-; CHECK-NEXT: sw a2, 748(sp)
-; CHECK-NEXT: sw a3, 752(sp)
+; CHECK-NEXT: sw a2, 748(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 752(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1312(a0)
; CHECK-NEXT: lw a3, 1316(a0)
-; CHECK-NEXT: sw a2, 740(sp)
-; CHECK-NEXT: sw a3, 744(sp)
+; CHECK-NEXT: sw a2, 740(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 744(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1320(a0)
; CHECK-NEXT: lw a3, 1324(a0)
-; CHECK-NEXT: sw a2, 732(sp)
-; CHECK-NEXT: sw a3, 736(sp)
+; CHECK-NEXT: sw a2, 732(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 736(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1328(a0)
; CHECK-NEXT: lw a3, 1332(a0)
-; CHECK-NEXT: sw a2, 724(sp)
-; CHECK-NEXT: sw a3, 728(sp)
+; CHECK-NEXT: sw a2, 724(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 728(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1336(a0)
; CHECK-NEXT: lw a3, 1340(a0)
-; CHECK-NEXT: sw a2, 716(sp)
-; CHECK-NEXT: sw a3, 720(sp)
+; CHECK-NEXT: sw a2, 716(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 720(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1344(a0)
; CHECK-NEXT: lw a3, 1348(a0)
-; CHECK-NEXT: sw a2, 708(sp)
-; CHECK-NEXT: sw a3, 712(sp)
+; CHECK-NEXT: sw a2, 708(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 712(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1352(a0)
; CHECK-NEXT: lw a3, 1356(a0)
-; CHECK-NEXT: sw a2, 700(sp)
-; CHECK-NEXT: sw a3, 704(sp)
+; CHECK-NEXT: sw a2, 700(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 704(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1360(a0)
; CHECK-NEXT: lw a3, 1364(a0)
-; CHECK-NEXT: sw a2, 692(sp)
-; CHECK-NEXT: sw a3, 696(sp)
+; CHECK-NEXT: sw a2, 692(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 696(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1368(a0)
; CHECK-NEXT: lw a3, 1372(a0)
-; CHECK-NEXT: sw a2, 684(sp)
-; CHECK-NEXT: sw a3, 688(sp)
+; CHECK-NEXT: sw a2, 684(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 688(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1376(a0)
; CHECK-NEXT: lw a3, 1380(a0)
-; CHECK-NEXT: sw a2, 676(sp)
-; CHECK-NEXT: sw a3, 680(sp)
+; CHECK-NEXT: sw a2, 676(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 680(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1384(a0)
; CHECK-NEXT: lw a3, 1388(a0)
-; CHECK-NEXT: sw a2, 668(sp)
-; CHECK-NEXT: sw a3, 672(sp)
+; CHECK-NEXT: sw a2, 668(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 672(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1392(a0)
; CHECK-NEXT: lw a3, 1396(a0)
-; CHECK-NEXT: sw a2, 660(sp)
-; CHECK-NEXT: sw a3, 664(sp)
+; CHECK-NEXT: sw a2, 660(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 664(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1400(a0)
; CHECK-NEXT: lw a3, 1404(a0)
-; CHECK-NEXT: sw a2, 652(sp)
-; CHECK-NEXT: sw a3, 656(sp)
+; CHECK-NEXT: sw a2, 652(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 656(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1408(a0)
; CHECK-NEXT: lw a3, 1412(a0)
-; CHECK-NEXT: sw a2, 644(sp)
-; CHECK-NEXT: sw a3, 648(sp)
+; CHECK-NEXT: sw a2, 644(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 648(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1416(a0)
; CHECK-NEXT: lw a3, 1420(a0)
-; CHECK-NEXT: sw a2, 636(sp)
-; CHECK-NEXT: sw a3, 640(sp)
+; CHECK-NEXT: sw a2, 636(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 640(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1424(a0)
; CHECK-NEXT: lw a3, 1428(a0)
-; CHECK-NEXT: sw a2, 628(sp)
-; CHECK-NEXT: sw a3, 632(sp)
+; CHECK-NEXT: sw a2, 628(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 632(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1432(a0)
; CHECK-NEXT: lw a3, 1436(a0)
-; CHECK-NEXT: sw a2, 620(sp)
-; CHECK-NEXT: sw a3, 624(sp)
+; CHECK-NEXT: sw a2, 620(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 624(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1440(a0)
; CHECK-NEXT: lw a3, 1444(a0)
-; CHECK-NEXT: sw a2, 612(sp)
-; CHECK-NEXT: sw a3, 616(sp)
+; CHECK-NEXT: sw a2, 612(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 616(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1448(a0)
; CHECK-NEXT: lw a3, 1452(a0)
-; CHECK-NEXT: sw a2, 604(sp)
-; CHECK-NEXT: sw a3, 608(sp)
+; CHECK-NEXT: sw a2, 604(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 608(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1456(a0)
; CHECK-NEXT: lw a3, 1460(a0)
-; CHECK-NEXT: sw a2, 596(sp)
-; CHECK-NEXT: sw a3, 600(sp)
+; CHECK-NEXT: sw a2, 596(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 600(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1464(a0)
; CHECK-NEXT: lw a3, 1468(a0)
-; CHECK-NEXT: sw a2, 588(sp)
-; CHECK-NEXT: sw a3, 592(sp)
+; CHECK-NEXT: sw a2, 588(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 592(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1472(a0)
; CHECK-NEXT: lw a3, 1476(a0)
-; CHECK-NEXT: sw a2, 580(sp)
-; CHECK-NEXT: sw a3, 584(sp)
+; CHECK-NEXT: sw a2, 580(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 584(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1480(a0)
; CHECK-NEXT: lw a3, 1484(a0)
-; CHECK-NEXT: sw a2, 572(sp)
-; CHECK-NEXT: sw a3, 576(sp)
+; CHECK-NEXT: sw a2, 572(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 576(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1488(a0)
; CHECK-NEXT: lw a3, 1492(a0)
-; CHECK-NEXT: sw a2, 564(sp)
-; CHECK-NEXT: sw a3, 568(sp)
+; CHECK-NEXT: sw a2, 564(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 568(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1496(a0)
; CHECK-NEXT: lw a3, 1500(a0)
-; CHECK-NEXT: sw a2, 556(sp)
-; CHECK-NEXT: sw a3, 560(sp)
+; CHECK-NEXT: sw a2, 556(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 560(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1504(a0)
; CHECK-NEXT: lw a3, 1508(a0)
-; CHECK-NEXT: sw a2, 548(sp)
-; CHECK-NEXT: sw a3, 552(sp)
+; CHECK-NEXT: sw a2, 548(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 552(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1512(a0)
; CHECK-NEXT: lw a3, 1516(a0)
-; CHECK-NEXT: sw a2, 540(sp)
-; CHECK-NEXT: sw a3, 544(sp)
+; CHECK-NEXT: sw a2, 540(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 544(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1520(a0)
; CHECK-NEXT: lw a3, 1524(a0)
-; CHECK-NEXT: sw a2, 532(sp)
-; CHECK-NEXT: sw a3, 536(sp)
+; CHECK-NEXT: sw a2, 532(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 536(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1528(a0)
; CHECK-NEXT: lw a3, 1532(a0)
-; CHECK-NEXT: sw a2, 524(sp)
-; CHECK-NEXT: sw a3, 528(sp)
+; CHECK-NEXT: sw a2, 524(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 528(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1536(a0)
; CHECK-NEXT: lw a3, 1540(a0)
-; CHECK-NEXT: sw a2, 516(sp)
-; CHECK-NEXT: sw a3, 520(sp)
+; CHECK-NEXT: sw a2, 516(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 520(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1544(a0)
; CHECK-NEXT: lw a3, 1548(a0)
-; CHECK-NEXT: sw a2, 508(sp)
-; CHECK-NEXT: sw a3, 512(sp)
+; CHECK-NEXT: sw a2, 508(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 512(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1552(a0)
; CHECK-NEXT: lw a3, 1556(a0)
-; CHECK-NEXT: sw a2, 500(sp)
-; CHECK-NEXT: sw a3, 504(sp)
+; CHECK-NEXT: sw a2, 500(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 504(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1560(a0)
; CHECK-NEXT: lw a3, 1564(a0)
-; CHECK-NEXT: sw a2, 492(sp)
-; CHECK-NEXT: sw a3, 496(sp)
+; CHECK-NEXT: sw a2, 492(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 496(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1568(a0)
; CHECK-NEXT: lw a3, 1572(a0)
-; CHECK-NEXT: sw a2, 484(sp)
-; CHECK-NEXT: sw a3, 488(sp)
+; CHECK-NEXT: sw a2, 484(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 488(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1576(a0)
; CHECK-NEXT: lw a3, 1580(a0)
-; CHECK-NEXT: sw a2, 476(sp)
-; CHECK-NEXT: sw a3, 480(sp)
+; CHECK-NEXT: sw a2, 476(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 480(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1584(a0)
; CHECK-NEXT: lw a3, 1588(a0)
-; CHECK-NEXT: sw a2, 468(sp)
-; CHECK-NEXT: sw a3, 472(sp)
+; CHECK-NEXT: sw a2, 468(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 472(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1592(a0)
; CHECK-NEXT: lw a3, 1596(a0)
-; CHECK-NEXT: sw a2, 460(sp)
-; CHECK-NEXT: sw a3, 464(sp)
+; CHECK-NEXT: sw a2, 460(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 464(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1600(a0)
; CHECK-NEXT: lw a3, 1604(a0)
-; CHECK-NEXT: sw a2, 452(sp)
-; CHECK-NEXT: sw a3, 456(sp)
+; CHECK-NEXT: sw a2, 452(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 456(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1608(a0)
; CHECK-NEXT: lw a3, 1612(a0)
-; CHECK-NEXT: sw a2, 444(sp)
-; CHECK-NEXT: sw a3, 448(sp)
+; CHECK-NEXT: sw a2, 444(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 448(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1616(a0)
; CHECK-NEXT: lw a3, 1620(a0)
-; CHECK-NEXT: sw a2, 436(sp)
-; CHECK-NEXT: sw a3, 440(sp)
+; CHECK-NEXT: sw a2, 436(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 440(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1624(a0)
; CHECK-NEXT: lw a3, 1628(a0)
-; CHECK-NEXT: sw a2, 428(sp)
-; CHECK-NEXT: sw a3, 432(sp)
+; CHECK-NEXT: sw a2, 428(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 432(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1632(a0)
; CHECK-NEXT: lw a3, 1636(a0)
-; CHECK-NEXT: sw a2, 420(sp)
-; CHECK-NEXT: sw a3, 424(sp)
+; CHECK-NEXT: sw a2, 420(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 424(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1640(a0)
; CHECK-NEXT: lw a3, 1644(a0)
-; CHECK-NEXT: sw a2, 412(sp)
-; CHECK-NEXT: sw a3, 416(sp)
+; CHECK-NEXT: sw a2, 412(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 416(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1648(a0)
; CHECK-NEXT: lw a3, 1652(a0)
-; CHECK-NEXT: sw a2, 404(sp)
-; CHECK-NEXT: sw a3, 408(sp)
+; CHECK-NEXT: sw a2, 404(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 408(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1656(a0)
; CHECK-NEXT: lw a3, 1660(a0)
-; CHECK-NEXT: sw a2, 396(sp)
-; CHECK-NEXT: sw a3, 400(sp)
+; CHECK-NEXT: sw a2, 396(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 400(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1664(a0)
; CHECK-NEXT: lw a3, 1668(a0)
-; CHECK-NEXT: sw a2, 388(sp)
-; CHECK-NEXT: sw a3, 392(sp)
+; CHECK-NEXT: sw a2, 388(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 392(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1672(a0)
; CHECK-NEXT: lw a3, 1676(a0)
-; CHECK-NEXT: sw a2, 380(sp)
-; CHECK-NEXT: sw a3, 384(sp)
+; CHECK-NEXT: sw a2, 380(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 384(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1680(a0)
; CHECK-NEXT: lw a3, 1684(a0)
-; CHECK-NEXT: sw a2, 372(sp)
-; CHECK-NEXT: sw a3, 376(sp)
+; CHECK-NEXT: sw a2, 372(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 376(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1688(a0)
; CHECK-NEXT: lw a3, 1692(a0)
-; CHECK-NEXT: sw a2, 364(sp)
-; CHECK-NEXT: sw a3, 368(sp)
+; CHECK-NEXT: sw a2, 364(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 368(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1696(a0)
; CHECK-NEXT: lw a3, 1700(a0)
-; CHECK-NEXT: sw a2, 356(sp)
-; CHECK-NEXT: sw a3, 360(sp)
+; CHECK-NEXT: sw a2, 356(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 360(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1704(a0)
; CHECK-NEXT: lw a3, 1708(a0)
-; CHECK-NEXT: sw a2, 348(sp)
-; CHECK-NEXT: sw a3, 352(sp)
+; CHECK-NEXT: sw a2, 348(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 352(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1712(a0)
; CHECK-NEXT: lw a3, 1716(a0)
-; CHECK-NEXT: sw a2, 340(sp)
-; CHECK-NEXT: sw a3, 344(sp)
+; CHECK-NEXT: sw a2, 340(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 344(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1720(a0)
; CHECK-NEXT: lw a3, 1724(a0)
-; CHECK-NEXT: sw a2, 332(sp)
-; CHECK-NEXT: sw a3, 336(sp)
+; CHECK-NEXT: sw a2, 332(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 336(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1728(a0)
; CHECK-NEXT: lw a3, 1732(a0)
-; CHECK-NEXT: sw a2, 324(sp)
-; CHECK-NEXT: sw a3, 328(sp)
+; CHECK-NEXT: sw a2, 324(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 328(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1736(a0)
; CHECK-NEXT: lw a3, 1740(a0)
-; CHECK-NEXT: sw a2, 316(sp)
-; CHECK-NEXT: sw a3, 320(sp)
+; CHECK-NEXT: sw a2, 316(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 320(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1744(a0)
; CHECK-NEXT: lw a3, 1748(a0)
-; CHECK-NEXT: sw a2, 308(sp)
-; CHECK-NEXT: sw a3, 312(sp)
+; CHECK-NEXT: sw a2, 308(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 312(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1752(a0)
; CHECK-NEXT: lw a3, 1756(a0)
-; CHECK-NEXT: sw a2, 300(sp)
-; CHECK-NEXT: sw a3, 304(sp)
+; CHECK-NEXT: sw a2, 300(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 304(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1760(a0)
; CHECK-NEXT: lw a3, 1764(a0)
-; CHECK-NEXT: sw a2, 292(sp)
-; CHECK-NEXT: sw a3, 296(sp)
+; CHECK-NEXT: sw a2, 292(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 296(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1768(a0)
; CHECK-NEXT: lw a3, 1772(a0)
-; CHECK-NEXT: sw a2, 284(sp)
-; CHECK-NEXT: sw a3, 288(sp)
+; CHECK-NEXT: sw a2, 284(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 288(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1776(a0)
; CHECK-NEXT: lw a3, 1780(a0)
-; CHECK-NEXT: sw a2, 276(sp)
-; CHECK-NEXT: sw a3, 280(sp)
+; CHECK-NEXT: sw a2, 276(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 280(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1784(a0)
; CHECK-NEXT: lw a3, 1788(a0)
-; CHECK-NEXT: sw a2, 268(sp)
-; CHECK-NEXT: sw a3, 272(sp)
+; CHECK-NEXT: sw a2, 268(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 272(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1792(a0)
; CHECK-NEXT: lw a3, 1796(a0)
-; CHECK-NEXT: sw a2, 260(sp)
-; CHECK-NEXT: sw a3, 264(sp)
+; CHECK-NEXT: sw a2, 260(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 264(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1800(a0)
; CHECK-NEXT: lw a3, 1804(a0)
-; CHECK-NEXT: sw a2, 252(sp)
-; CHECK-NEXT: sw a3, 256(sp)
+; CHECK-NEXT: sw a2, 252(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 256(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1808(a0)
; CHECK-NEXT: lw a3, 1812(a0)
-; CHECK-NEXT: sw a2, 244(sp)
-; CHECK-NEXT: sw a3, 248(sp)
+; CHECK-NEXT: sw a2, 244(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 248(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1816(a0)
; CHECK-NEXT: lw a3, 1820(a0)
-; CHECK-NEXT: sw a2, 236(sp)
-; CHECK-NEXT: sw a3, 240(sp)
+; CHECK-NEXT: sw a2, 236(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 240(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1824(a0)
; CHECK-NEXT: lw a3, 1828(a0)
-; CHECK-NEXT: sw a2, 228(sp)
-; CHECK-NEXT: sw a3, 232(sp)
+; CHECK-NEXT: sw a2, 228(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 232(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1832(a0)
; CHECK-NEXT: lw a3, 1836(a0)
-; CHECK-NEXT: sw a2, 220(sp)
-; CHECK-NEXT: sw a3, 224(sp)
+; CHECK-NEXT: sw a2, 220(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 224(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1840(a0)
; CHECK-NEXT: lw a3, 1844(a0)
-; CHECK-NEXT: sw a2, 212(sp)
-; CHECK-NEXT: sw a3, 216(sp)
+; CHECK-NEXT: sw a2, 212(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 216(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1848(a0)
; CHECK-NEXT: lw a3, 1852(a0)
-; CHECK-NEXT: sw a2, 204(sp)
-; CHECK-NEXT: sw a3, 208(sp)
+; CHECK-NEXT: sw a2, 204(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 208(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1856(a0)
; CHECK-NEXT: lw a3, 1860(a0)
-; CHECK-NEXT: sw a2, 196(sp)
-; CHECK-NEXT: sw a3, 200(sp)
+; CHECK-NEXT: sw a2, 196(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 200(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1864(a0)
; CHECK-NEXT: lw a3, 1868(a0)
-; CHECK-NEXT: sw a2, 188(sp)
-; CHECK-NEXT: sw a3, 192(sp)
+; CHECK-NEXT: sw a2, 188(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 192(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1872(a0)
; CHECK-NEXT: lw a3, 1876(a0)
-; CHECK-NEXT: sw a2, 180(sp)
-; CHECK-NEXT: sw a3, 184(sp)
+; CHECK-NEXT: sw a2, 180(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 184(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1880(a0)
; CHECK-NEXT: lw a3, 1884(a0)
-; CHECK-NEXT: sw a2, 172(sp)
-; CHECK-NEXT: sw a3, 176(sp)
+; CHECK-NEXT: sw a2, 172(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 176(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1888(a0)
; CHECK-NEXT: lw a3, 1892(a0)
-; CHECK-NEXT: sw a2, 164(sp)
-; CHECK-NEXT: sw a3, 168(sp)
+; CHECK-NEXT: sw a2, 164(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 168(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1896(a0)
; CHECK-NEXT: lw a3, 1900(a0)
-; CHECK-NEXT: sw a2, 156(sp)
-; CHECK-NEXT: sw a3, 160(sp)
+; CHECK-NEXT: sw a2, 156(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 160(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1904(a0)
; CHECK-NEXT: lw a3, 1908(a0)
-; CHECK-NEXT: sw a2, 148(sp)
-; CHECK-NEXT: sw a3, 152(sp)
+; CHECK-NEXT: sw a2, 148(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 152(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1912(a0)
; CHECK-NEXT: lw a3, 1916(a0)
-; CHECK-NEXT: sw a2, 140(sp)
-; CHECK-NEXT: sw a3, 144(sp)
+; CHECK-NEXT: sw a2, 140(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 144(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1920(a0)
; CHECK-NEXT: lw a3, 1924(a0)
-; CHECK-NEXT: sw a2, 132(sp)
-; CHECK-NEXT: sw a3, 136(sp)
+; CHECK-NEXT: sw a2, 132(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 136(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1928(a0)
; CHECK-NEXT: lw a3, 1932(a0)
-; CHECK-NEXT: sw a2, 124(sp)
-; CHECK-NEXT: sw a3, 128(sp)
+; CHECK-NEXT: sw a2, 124(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 128(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1936(a0)
; CHECK-NEXT: lw a3, 1940(a0)
-; CHECK-NEXT: sw a2, 116(sp)
-; CHECK-NEXT: sw a3, 120(sp)
+; CHECK-NEXT: sw a2, 116(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 120(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1944(a0)
; CHECK-NEXT: lw a3, 1948(a0)
-; CHECK-NEXT: sw a2, 108(sp)
-; CHECK-NEXT: sw a3, 112(sp)
+; CHECK-NEXT: sw a2, 108(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 112(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1952(a0)
; CHECK-NEXT: lw a3, 1956(a0)
-; CHECK-NEXT: sw a2, 100(sp)
-; CHECK-NEXT: sw a3, 104(sp)
+; CHECK-NEXT: sw a2, 100(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 104(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1960(a0)
; CHECK-NEXT: lw a3, 1964(a0)
-; CHECK-NEXT: sw a2, 92(sp)
-; CHECK-NEXT: sw a3, 96(sp)
+; CHECK-NEXT: sw a2, 92(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 96(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1968(a0)
; CHECK-NEXT: lw a3, 1972(a0)
-; CHECK-NEXT: sw a2, 84(sp)
-; CHECK-NEXT: sw a3, 88(sp)
+; CHECK-NEXT: sw a2, 84(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 88(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1976(a0)
; CHECK-NEXT: lw a3, 1980(a0)
-; CHECK-NEXT: sw a2, 76(sp)
-; CHECK-NEXT: sw a3, 80(sp)
+; CHECK-NEXT: sw a2, 76(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 80(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1984(a0)
; CHECK-NEXT: lw a3, 1988(a0)
-; CHECK-NEXT: sw a2, 68(sp)
-; CHECK-NEXT: sw a3, 72(sp)
+; CHECK-NEXT: sw a2, 68(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 72(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 1992(a0)
; CHECK-NEXT: lw a3, 1996(a0)
-; CHECK-NEXT: sw a2, 60(sp)
-; CHECK-NEXT: sw a3, 64(sp)
+; CHECK-NEXT: sw a2, 60(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 64(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 2000(a0)
; CHECK-NEXT: lw a3, 2004(a0)
-; CHECK-NEXT: sw a2, 52(sp)
-; CHECK-NEXT: sw a3, 56(sp)
+; CHECK-NEXT: sw a2, 52(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 56(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 2008(a0)
; CHECK-NEXT: lw a3, 2012(a0)
-; CHECK-NEXT: sw a2, 44(sp)
-; CHECK-NEXT: sw a3, 48(sp)
+; CHECK-NEXT: sw a2, 44(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 48(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 2016(a0)
; CHECK-NEXT: lw a3, 2020(a0)
-; CHECK-NEXT: sw a2, 36(sp)
-; CHECK-NEXT: sw a3, 40(sp)
+; CHECK-NEXT: sw a2, 36(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 40(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 2024(a0)
; CHECK-NEXT: lw a3, 2028(a0)
-; CHECK-NEXT: sw a2, 28(sp)
-; CHECK-NEXT: sw a3, 32(sp)
+; CHECK-NEXT: sw a2, 28(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 32(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 2032(a0)
; CHECK-NEXT: lw a3, 2036(a0)
-; CHECK-NEXT: sw a2, 20(sp)
-; CHECK-NEXT: sw a3, 24(sp)
+; CHECK-NEXT: sw a2, 20(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 24(sp) # 4-byte Folded Spill
; CHECK-NEXT: lw a2, 2040(a0)
; CHECK-NEXT: lw a3, 2044(a0)
-; CHECK-NEXT: sw a2, 12(sp)
-; CHECK-NEXT: sw a3, 16(sp)
+; CHECK-NEXT: sw a2, 12(sp) # 4-byte Folded Spill
+; CHECK-NEXT: sw a3, 16(sp) # 4-byte Folded Spill
; CHECK-NEXT: #APP
; CHECK-NEXT: #NO_APP
; CHECK-NEXT: lw a0, 8(sp) # 4-byte Folded Reload
; CHECK-NEXT: lui a1, 1
; CHECK-NEXT: add a1, sp, a1
-; CHECK-NEXT: lw a2, -2044(a1)
-; CHECK-NEXT: lw a3, -2040(a1)
+; CHECK-NEXT: lw a2, -2044(a1) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, -2040(a1) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 0(a0)
; CHECK-NEXT: sw a3, 4(a0)
; CHECK-NEXT: addi a1, sp, 2044
-; CHECK-NEXT: lw a2, 0(a1)
-; CHECK-NEXT: lw a3, 4(a1)
+; CHECK-NEXT: lw a2, 0(a1) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 4(a1) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 8(a0)
; CHECK-NEXT: sw a3, 12(a0)
-; CHECK-NEXT: lw a2, 2036(sp)
-; CHECK-NEXT: lw a3, 2040(sp)
+; CHECK-NEXT: lw a2, 2036(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 2040(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 16(a0)
; CHECK-NEXT: sw a3, 20(a0)
-; CHECK-NEXT: lw a2, 2028(sp)
-; CHECK-NEXT: lw a3, 2032(sp)
+; CHECK-NEXT: lw a2, 2028(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 2032(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 24(a0)
; CHECK-NEXT: sw a3, 28(a0)
-; CHECK-NEXT: lw a2, 2020(sp)
-; CHECK-NEXT: lw a3, 2024(sp)
+; CHECK-NEXT: lw a2, 2020(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 2024(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 32(a0)
; CHECK-NEXT: sw a3, 36(a0)
-; CHECK-NEXT: lw a2, 2012(sp)
-; CHECK-NEXT: lw a3, 2016(sp)
+; CHECK-NEXT: lw a2, 2012(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 2016(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 40(a0)
; CHECK-NEXT: sw a3, 44(a0)
-; CHECK-NEXT: lw a2, 2004(sp)
-; CHECK-NEXT: lw a3, 2008(sp)
+; CHECK-NEXT: lw a2, 2004(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 2008(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 48(a0)
; CHECK-NEXT: sw a3, 52(a0)
-; CHECK-NEXT: lw a2, 1996(sp)
-; CHECK-NEXT: lw a3, 2000(sp)
+; CHECK-NEXT: lw a2, 1996(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 2000(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 56(a0)
; CHECK-NEXT: sw a3, 60(a0)
-; CHECK-NEXT: lw a2, 1988(sp)
-; CHECK-NEXT: lw a3, 1992(sp)
+; CHECK-NEXT: lw a2, 1988(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1992(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 64(a0)
; CHECK-NEXT: sw a3, 68(a0)
-; CHECK-NEXT: lw a2, 1980(sp)
-; CHECK-NEXT: lw a3, 1984(sp)
+; CHECK-NEXT: lw a2, 1980(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1984(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 72(a0)
; CHECK-NEXT: sw a3, 76(a0)
-; CHECK-NEXT: lw a2, 1972(sp)
-; CHECK-NEXT: lw a3, 1976(sp)
+; CHECK-NEXT: lw a2, 1972(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1976(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 80(a0)
; CHECK-NEXT: sw a3, 84(a0)
-; CHECK-NEXT: lw a2, 1964(sp)
-; CHECK-NEXT: lw a3, 1968(sp)
+; CHECK-NEXT: lw a2, 1964(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1968(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 88(a0)
; CHECK-NEXT: sw a3, 92(a0)
-; CHECK-NEXT: lw a2, 1956(sp)
-; CHECK-NEXT: lw a3, 1960(sp)
+; CHECK-NEXT: lw a2, 1956(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1960(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 96(a0)
; CHECK-NEXT: sw a3, 100(a0)
-; CHECK-NEXT: lw a2, 1948(sp)
-; CHECK-NEXT: lw a3, 1952(sp)
+; CHECK-NEXT: lw a2, 1948(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1952(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 104(a0)
; CHECK-NEXT: sw a3, 108(a0)
-; CHECK-NEXT: lw a2, 1940(sp)
-; CHECK-NEXT: lw a3, 1944(sp)
+; CHECK-NEXT: lw a2, 1940(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1944(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 112(a0)
; CHECK-NEXT: sw a3, 116(a0)
-; CHECK-NEXT: lw a2, 1932(sp)
-; CHECK-NEXT: lw a3, 1936(sp)
+; CHECK-NEXT: lw a2, 1932(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1936(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 120(a0)
; CHECK-NEXT: sw a3, 124(a0)
-; CHECK-NEXT: lw a2, 1924(sp)
-; CHECK-NEXT: lw a3, 1928(sp)
+; CHECK-NEXT: lw a2, 1924(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1928(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 128(a0)
; CHECK-NEXT: sw a3, 132(a0)
-; CHECK-NEXT: lw a2, 1916(sp)
-; CHECK-NEXT: lw a3, 1920(sp)
+; CHECK-NEXT: lw a2, 1916(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1920(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 136(a0)
; CHECK-NEXT: sw a3, 140(a0)
-; CHECK-NEXT: lw a2, 1908(sp)
-; CHECK-NEXT: lw a3, 1912(sp)
+; CHECK-NEXT: lw a2, 1908(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1912(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 144(a0)
; CHECK-NEXT: sw a3, 148(a0)
-; CHECK-NEXT: lw a2, 1900(sp)
-; CHECK-NEXT: lw a3, 1904(sp)
+; CHECK-NEXT: lw a2, 1900(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1904(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 152(a0)
; CHECK-NEXT: sw a3, 156(a0)
-; CHECK-NEXT: lw a2, 1892(sp)
-; CHECK-NEXT: lw a3, 1896(sp)
+; CHECK-NEXT: lw a2, 1892(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1896(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 160(a0)
; CHECK-NEXT: sw a3, 164(a0)
-; CHECK-NEXT: lw a2, 1884(sp)
-; CHECK-NEXT: lw a3, 1888(sp)
+; CHECK-NEXT: lw a2, 1884(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1888(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 168(a0)
; CHECK-NEXT: sw a3, 172(a0)
-; CHECK-NEXT: lw a2, 1876(sp)
-; CHECK-NEXT: lw a3, 1880(sp)
+; CHECK-NEXT: lw a2, 1876(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1880(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 176(a0)
; CHECK-NEXT: sw a3, 180(a0)
-; CHECK-NEXT: lw a2, 1868(sp)
-; CHECK-NEXT: lw a3, 1872(sp)
+; CHECK-NEXT: lw a2, 1868(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1872(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 184(a0)
; CHECK-NEXT: sw a3, 188(a0)
-; CHECK-NEXT: lw a2, 1860(sp)
-; CHECK-NEXT: lw a3, 1864(sp)
+; CHECK-NEXT: lw a2, 1860(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1864(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 192(a0)
; CHECK-NEXT: sw a3, 196(a0)
-; CHECK-NEXT: lw a2, 1852(sp)
-; CHECK-NEXT: lw a3, 1856(sp)
+; CHECK-NEXT: lw a2, 1852(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1856(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 200(a0)
; CHECK-NEXT: sw a3, 204(a0)
-; CHECK-NEXT: lw a2, 1844(sp)
-; CHECK-NEXT: lw a3, 1848(sp)
+; CHECK-NEXT: lw a2, 1844(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1848(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 208(a0)
; CHECK-NEXT: sw a3, 212(a0)
-; CHECK-NEXT: lw a2, 1836(sp)
-; CHECK-NEXT: lw a3, 1840(sp)
+; CHECK-NEXT: lw a2, 1836(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1840(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 216(a0)
; CHECK-NEXT: sw a3, 220(a0)
-; CHECK-NEXT: lw a2, 1828(sp)
-; CHECK-NEXT: lw a3, 1832(sp)
+; CHECK-NEXT: lw a2, 1828(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1832(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 224(a0)
; CHECK-NEXT: sw a3, 228(a0)
-; CHECK-NEXT: lw a2, 1820(sp)
-; CHECK-NEXT: lw a3, 1824(sp)
+; CHECK-NEXT: lw a2, 1820(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1824(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 232(a0)
; CHECK-NEXT: sw a3, 236(a0)
-; CHECK-NEXT: lw a2, 1812(sp)
-; CHECK-NEXT: lw a3, 1816(sp)
+; CHECK-NEXT: lw a2, 1812(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1816(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 240(a0)
; CHECK-NEXT: sw a3, 244(a0)
-; CHECK-NEXT: lw a2, 1804(sp)
-; CHECK-NEXT: lw a3, 1808(sp)
+; CHECK-NEXT: lw a2, 1804(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1808(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 248(a0)
; CHECK-NEXT: sw a3, 252(a0)
-; CHECK-NEXT: lw a2, 1796(sp)
-; CHECK-NEXT: lw a3, 1800(sp)
+; CHECK-NEXT: lw a2, 1796(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1800(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 256(a0)
; CHECK-NEXT: sw a3, 260(a0)
-; CHECK-NEXT: lw a2, 1788(sp)
-; CHECK-NEXT: lw a3, 1792(sp)
+; CHECK-NEXT: lw a2, 1788(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1792(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 264(a0)
; CHECK-NEXT: sw a3, 268(a0)
-; CHECK-NEXT: lw a2, 1780(sp)
-; CHECK-NEXT: lw a3, 1784(sp)
+; CHECK-NEXT: lw a2, 1780(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1784(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 272(a0)
; CHECK-NEXT: sw a3, 276(a0)
-; CHECK-NEXT: lw a2, 1772(sp)
-; CHECK-NEXT: lw a3, 1776(sp)
+; CHECK-NEXT: lw a2, 1772(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1776(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 280(a0)
; CHECK-NEXT: sw a3, 284(a0)
-; CHECK-NEXT: lw a2, 1764(sp)
-; CHECK-NEXT: lw a3, 1768(sp)
+; CHECK-NEXT: lw a2, 1764(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1768(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 288(a0)
; CHECK-NEXT: sw a3, 292(a0)
-; CHECK-NEXT: lw a2, 1756(sp)
-; CHECK-NEXT: lw a3, 1760(sp)
+; CHECK-NEXT: lw a2, 1756(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1760(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 296(a0)
; CHECK-NEXT: sw a3, 300(a0)
-; CHECK-NEXT: lw a2, 1748(sp)
-; CHECK-NEXT: lw a3, 1752(sp)
+; CHECK-NEXT: lw a2, 1748(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1752(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 304(a0)
; CHECK-NEXT: sw a3, 308(a0)
-; CHECK-NEXT: lw a2, 1740(sp)
-; CHECK-NEXT: lw a3, 1744(sp)
+; CHECK-NEXT: lw a2, 1740(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1744(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 312(a0)
; CHECK-NEXT: sw a3, 316(a0)
-; CHECK-NEXT: lw a2, 1732(sp)
-; CHECK-NEXT: lw a3, 1736(sp)
+; CHECK-NEXT: lw a2, 1732(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1736(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 320(a0)
; CHECK-NEXT: sw a3, 324(a0)
-; CHECK-NEXT: lw a2, 1724(sp)
-; CHECK-NEXT: lw a3, 1728(sp)
+; CHECK-NEXT: lw a2, 1724(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1728(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 328(a0)
; CHECK-NEXT: sw a3, 332(a0)
-; CHECK-NEXT: lw a2, 1716(sp)
-; CHECK-NEXT: lw a3, 1720(sp)
+; CHECK-NEXT: lw a2, 1716(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1720(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 336(a0)
; CHECK-NEXT: sw a3, 340(a0)
-; CHECK-NEXT: lw a2, 1708(sp)
-; CHECK-NEXT: lw a3, 1712(sp)
+; CHECK-NEXT: lw a2, 1708(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1712(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 344(a0)
; CHECK-NEXT: sw a3, 348(a0)
-; CHECK-NEXT: lw a2, 1700(sp)
-; CHECK-NEXT: lw a3, 1704(sp)
+; CHECK-NEXT: lw a2, 1700(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1704(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 352(a0)
; CHECK-NEXT: sw a3, 356(a0)
-; CHECK-NEXT: lw a2, 1692(sp)
-; CHECK-NEXT: lw a3, 1696(sp)
+; CHECK-NEXT: lw a2, 1692(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1696(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 360(a0)
; CHECK-NEXT: sw a3, 364(a0)
-; CHECK-NEXT: lw a2, 1684(sp)
-; CHECK-NEXT: lw a3, 1688(sp)
+; CHECK-NEXT: lw a2, 1684(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1688(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 368(a0)
; CHECK-NEXT: sw a3, 372(a0)
-; CHECK-NEXT: lw a2, 1676(sp)
-; CHECK-NEXT: lw a3, 1680(sp)
+; CHECK-NEXT: lw a2, 1676(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1680(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 376(a0)
; CHECK-NEXT: sw a3, 380(a0)
-; CHECK-NEXT: lw a2, 1668(sp)
-; CHECK-NEXT: lw a3, 1672(sp)
+; CHECK-NEXT: lw a2, 1668(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1672(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 384(a0)
; CHECK-NEXT: sw a3, 388(a0)
-; CHECK-NEXT: lw a2, 1660(sp)
-; CHECK-NEXT: lw a3, 1664(sp)
+; CHECK-NEXT: lw a2, 1660(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1664(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 392(a0)
; CHECK-NEXT: sw a3, 396(a0)
-; CHECK-NEXT: lw a2, 1652(sp)
-; CHECK-NEXT: lw a3, 1656(sp)
+; CHECK-NEXT: lw a2, 1652(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1656(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 400(a0)
; CHECK-NEXT: sw a3, 404(a0)
-; CHECK-NEXT: lw a2, 1644(sp)
-; CHECK-NEXT: lw a3, 1648(sp)
+; CHECK-NEXT: lw a2, 1644(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1648(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 408(a0)
; CHECK-NEXT: sw a3, 412(a0)
-; CHECK-NEXT: lw a2, 1636(sp)
-; CHECK-NEXT: lw a3, 1640(sp)
+; CHECK-NEXT: lw a2, 1636(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1640(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 416(a0)
; CHECK-NEXT: sw a3, 420(a0)
-; CHECK-NEXT: lw a2, 1628(sp)
-; CHECK-NEXT: lw a3, 1632(sp)
+; CHECK-NEXT: lw a2, 1628(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1632(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 424(a0)
; CHECK-NEXT: sw a3, 428(a0)
-; CHECK-NEXT: lw a2, 1620(sp)
-; CHECK-NEXT: lw a3, 1624(sp)
+; CHECK-NEXT: lw a2, 1620(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1624(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 432(a0)
; CHECK-NEXT: sw a3, 436(a0)
-; CHECK-NEXT: lw a2, 1612(sp)
-; CHECK-NEXT: lw a3, 1616(sp)
+; CHECK-NEXT: lw a2, 1612(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1616(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 440(a0)
; CHECK-NEXT: sw a3, 444(a0)
-; CHECK-NEXT: lw a2, 1604(sp)
-; CHECK-NEXT: lw a3, 1608(sp)
+; CHECK-NEXT: lw a2, 1604(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1608(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 448(a0)
; CHECK-NEXT: sw a3, 452(a0)
-; CHECK-NEXT: lw a2, 1596(sp)
-; CHECK-NEXT: lw a3, 1600(sp)
+; CHECK-NEXT: lw a2, 1596(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1600(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 456(a0)
; CHECK-NEXT: sw a3, 460(a0)
-; CHECK-NEXT: lw a2, 1588(sp)
-; CHECK-NEXT: lw a3, 1592(sp)
+; CHECK-NEXT: lw a2, 1588(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1592(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 464(a0)
; CHECK-NEXT: sw a3, 468(a0)
-; CHECK-NEXT: lw a2, 1580(sp)
-; CHECK-NEXT: lw a3, 1584(sp)
+; CHECK-NEXT: lw a2, 1580(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1584(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 472(a0)
; CHECK-NEXT: sw a3, 476(a0)
-; CHECK-NEXT: lw a2, 1572(sp)
-; CHECK-NEXT: lw a3, 1576(sp)
+; CHECK-NEXT: lw a2, 1572(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1576(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 480(a0)
; CHECK-NEXT: sw a3, 484(a0)
-; CHECK-NEXT: lw a2, 1564(sp)
-; CHECK-NEXT: lw a3, 1568(sp)
+; CHECK-NEXT: lw a2, 1564(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1568(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 488(a0)
; CHECK-NEXT: sw a3, 492(a0)
-; CHECK-NEXT: lw a2, 1556(sp)
-; CHECK-NEXT: lw a3, 1560(sp)
+; CHECK-NEXT: lw a2, 1556(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1560(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 496(a0)
; CHECK-NEXT: sw a3, 500(a0)
-; CHECK-NEXT: lw a2, 1548(sp)
-; CHECK-NEXT: lw a3, 1552(sp)
+; CHECK-NEXT: lw a2, 1548(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1552(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 504(a0)
; CHECK-NEXT: sw a3, 508(a0)
-; CHECK-NEXT: lw a2, 1540(sp)
-; CHECK-NEXT: lw a3, 1544(sp)
+; CHECK-NEXT: lw a2, 1540(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1544(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 512(a0)
; CHECK-NEXT: sw a3, 516(a0)
-; CHECK-NEXT: lw a2, 1532(sp)
-; CHECK-NEXT: lw a3, 1536(sp)
+; CHECK-NEXT: lw a2, 1532(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1536(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 520(a0)
; CHECK-NEXT: sw a3, 524(a0)
-; CHECK-NEXT: lw a2, 1524(sp)
-; CHECK-NEXT: lw a3, 1528(sp)
+; CHECK-NEXT: lw a2, 1524(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1528(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 528(a0)
; CHECK-NEXT: sw a3, 532(a0)
-; CHECK-NEXT: lw a2, 1516(sp)
-; CHECK-NEXT: lw a3, 1520(sp)
+; CHECK-NEXT: lw a2, 1516(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1520(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 536(a0)
; CHECK-NEXT: sw a3, 540(a0)
-; CHECK-NEXT: lw a2, 1508(sp)
-; CHECK-NEXT: lw a3, 1512(sp)
+; CHECK-NEXT: lw a2, 1508(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1512(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 544(a0)
; CHECK-NEXT: sw a3, 548(a0)
-; CHECK-NEXT: lw a2, 1500(sp)
-; CHECK-NEXT: lw a3, 1504(sp)
+; CHECK-NEXT: lw a2, 1500(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1504(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 552(a0)
; CHECK-NEXT: sw a3, 556(a0)
-; CHECK-NEXT: lw a2, 1492(sp)
-; CHECK-NEXT: lw a3, 1496(sp)
+; CHECK-NEXT: lw a2, 1492(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1496(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 560(a0)
; CHECK-NEXT: sw a3, 564(a0)
-; CHECK-NEXT: lw a2, 1484(sp)
-; CHECK-NEXT: lw a3, 1488(sp)
+; CHECK-NEXT: lw a2, 1484(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1488(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 568(a0)
; CHECK-NEXT: sw a3, 572(a0)
-; CHECK-NEXT: lw a2, 1476(sp)
-; CHECK-NEXT: lw a3, 1480(sp)
+; CHECK-NEXT: lw a2, 1476(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1480(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 576(a0)
; CHECK-NEXT: sw a3, 580(a0)
-; CHECK-NEXT: lw a2, 1468(sp)
-; CHECK-NEXT: lw a3, 1472(sp)
+; CHECK-NEXT: lw a2, 1468(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1472(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 584(a0)
; CHECK-NEXT: sw a3, 588(a0)
-; CHECK-NEXT: lw a2, 1460(sp)
-; CHECK-NEXT: lw a3, 1464(sp)
+; CHECK-NEXT: lw a2, 1460(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1464(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 592(a0)
; CHECK-NEXT: sw a3, 596(a0)
-; CHECK-NEXT: lw a2, 1452(sp)
-; CHECK-NEXT: lw a3, 1456(sp)
+; CHECK-NEXT: lw a2, 1452(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1456(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 600(a0)
; CHECK-NEXT: sw a3, 604(a0)
-; CHECK-NEXT: lw a2, 1444(sp)
-; CHECK-NEXT: lw a3, 1448(sp)
+; CHECK-NEXT: lw a2, 1444(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1448(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 608(a0)
; CHECK-NEXT: sw a3, 612(a0)
-; CHECK-NEXT: lw a2, 1436(sp)
-; CHECK-NEXT: lw a3, 1440(sp)
+; CHECK-NEXT: lw a2, 1436(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1440(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 616(a0)
; CHECK-NEXT: sw a3, 620(a0)
-; CHECK-NEXT: lw a2, 1428(sp)
-; CHECK-NEXT: lw a3, 1432(sp)
+; CHECK-NEXT: lw a2, 1428(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1432(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 624(a0)
; CHECK-NEXT: sw a3, 628(a0)
-; CHECK-NEXT: lw a2, 1420(sp)
-; CHECK-NEXT: lw a3, 1424(sp)
+; CHECK-NEXT: lw a2, 1420(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1424(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 632(a0)
; CHECK-NEXT: sw a3, 636(a0)
-; CHECK-NEXT: lw a2, 1412(sp)
-; CHECK-NEXT: lw a3, 1416(sp)
+; CHECK-NEXT: lw a2, 1412(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1416(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 640(a0)
; CHECK-NEXT: sw a3, 644(a0)
-; CHECK-NEXT: lw a2, 1404(sp)
-; CHECK-NEXT: lw a3, 1408(sp)
+; CHECK-NEXT: lw a2, 1404(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1408(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 648(a0)
; CHECK-NEXT: sw a3, 652(a0)
-; CHECK-NEXT: lw a2, 1396(sp)
-; CHECK-NEXT: lw a3, 1400(sp)
+; CHECK-NEXT: lw a2, 1396(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1400(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 656(a0)
; CHECK-NEXT: sw a3, 660(a0)
-; CHECK-NEXT: lw a2, 1388(sp)
-; CHECK-NEXT: lw a3, 1392(sp)
+; CHECK-NEXT: lw a2, 1388(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1392(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 664(a0)
; CHECK-NEXT: sw a3, 668(a0)
-; CHECK-NEXT: lw a2, 1380(sp)
-; CHECK-NEXT: lw a3, 1384(sp)
+; CHECK-NEXT: lw a2, 1380(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1384(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 672(a0)
; CHECK-NEXT: sw a3, 676(a0)
-; CHECK-NEXT: lw a2, 1372(sp)
-; CHECK-NEXT: lw a3, 1376(sp)
+; CHECK-NEXT: lw a2, 1372(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1376(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 680(a0)
; CHECK-NEXT: sw a3, 684(a0)
-; CHECK-NEXT: lw a2, 1364(sp)
-; CHECK-NEXT: lw a3, 1368(sp)
+; CHECK-NEXT: lw a2, 1364(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1368(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 688(a0)
; CHECK-NEXT: sw a3, 692(a0)
-; CHECK-NEXT: lw a2, 1356(sp)
-; CHECK-NEXT: lw a3, 1360(sp)
+; CHECK-NEXT: lw a2, 1356(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1360(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 696(a0)
; CHECK-NEXT: sw a3, 700(a0)
-; CHECK-NEXT: lw a2, 1348(sp)
-; CHECK-NEXT: lw a3, 1352(sp)
+; CHECK-NEXT: lw a2, 1348(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1352(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 704(a0)
; CHECK-NEXT: sw a3, 708(a0)
-; CHECK-NEXT: lw a2, 1340(sp)
-; CHECK-NEXT: lw a3, 1344(sp)
+; CHECK-NEXT: lw a2, 1340(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1344(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 712(a0)
; CHECK-NEXT: sw a3, 716(a0)
-; CHECK-NEXT: lw a2, 1332(sp)
-; CHECK-NEXT: lw a3, 1336(sp)
+; CHECK-NEXT: lw a2, 1332(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1336(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 720(a0)
; CHECK-NEXT: sw a3, 724(a0)
-; CHECK-NEXT: lw a2, 1324(sp)
-; CHECK-NEXT: lw a3, 1328(sp)
+; CHECK-NEXT: lw a2, 1324(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1328(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 728(a0)
; CHECK-NEXT: sw a3, 732(a0)
-; CHECK-NEXT: lw a2, 1316(sp)
-; CHECK-NEXT: lw a3, 1320(sp)
+; CHECK-NEXT: lw a2, 1316(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1320(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 736(a0)
; CHECK-NEXT: sw a3, 740(a0)
-; CHECK-NEXT: lw a2, 1308(sp)
-; CHECK-NEXT: lw a3, 1312(sp)
+; CHECK-NEXT: lw a2, 1308(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1312(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 744(a0)
; CHECK-NEXT: sw a3, 748(a0)
-; CHECK-NEXT: lw a2, 1300(sp)
-; CHECK-NEXT: lw a3, 1304(sp)
+; CHECK-NEXT: lw a2, 1300(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1304(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 752(a0)
; CHECK-NEXT: sw a3, 756(a0)
-; CHECK-NEXT: lw a2, 1292(sp)
-; CHECK-NEXT: lw a3, 1296(sp)
+; CHECK-NEXT: lw a2, 1292(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1296(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 760(a0)
; CHECK-NEXT: sw a3, 764(a0)
-; CHECK-NEXT: lw a2, 1284(sp)
-; CHECK-NEXT: lw a3, 1288(sp)
+; CHECK-NEXT: lw a2, 1284(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1288(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 768(a0)
; CHECK-NEXT: sw a3, 772(a0)
-; CHECK-NEXT: lw a2, 1276(sp)
-; CHECK-NEXT: lw a3, 1280(sp)
+; CHECK-NEXT: lw a2, 1276(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1280(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 776(a0)
; CHECK-NEXT: sw a3, 780(a0)
-; CHECK-NEXT: lw a2, 1268(sp)
-; CHECK-NEXT: lw a3, 1272(sp)
+; CHECK-NEXT: lw a2, 1268(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1272(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 784(a0)
; CHECK-NEXT: sw a3, 788(a0)
-; CHECK-NEXT: lw a2, 1260(sp)
-; CHECK-NEXT: lw a3, 1264(sp)
+; CHECK-NEXT: lw a2, 1260(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1264(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 792(a0)
; CHECK-NEXT: sw a3, 796(a0)
-; CHECK-NEXT: lw a2, 1252(sp)
-; CHECK-NEXT: lw a3, 1256(sp)
+; CHECK-NEXT: lw a2, 1252(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1256(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 800(a0)
; CHECK-NEXT: sw a3, 804(a0)
-; CHECK-NEXT: lw a2, 1244(sp)
-; CHECK-NEXT: lw a3, 1248(sp)
+; CHECK-NEXT: lw a2, 1244(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1248(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 808(a0)
; CHECK-NEXT: sw a3, 812(a0)
-; CHECK-NEXT: lw a2, 1236(sp)
-; CHECK-NEXT: lw a3, 1240(sp)
+; CHECK-NEXT: lw a2, 1236(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1240(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 816(a0)
; CHECK-NEXT: sw a3, 820(a0)
-; CHECK-NEXT: lw a2, 1228(sp)
-; CHECK-NEXT: lw a3, 1232(sp)
+; CHECK-NEXT: lw a2, 1228(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1232(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 824(a0)
; CHECK-NEXT: sw a3, 828(a0)
-; CHECK-NEXT: lw a2, 1220(sp)
-; CHECK-NEXT: lw a3, 1224(sp)
+; CHECK-NEXT: lw a2, 1220(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1224(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 832(a0)
; CHECK-NEXT: sw a3, 836(a0)
-; CHECK-NEXT: lw a2, 1212(sp)
-; CHECK-NEXT: lw a3, 1216(sp)
+; CHECK-NEXT: lw a2, 1212(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1216(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 840(a0)
; CHECK-NEXT: sw a3, 844(a0)
-; CHECK-NEXT: lw a2, 1204(sp)
-; CHECK-NEXT: lw a3, 1208(sp)
+; CHECK-NEXT: lw a2, 1204(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1208(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 848(a0)
; CHECK-NEXT: sw a3, 852(a0)
-; CHECK-NEXT: lw a2, 1196(sp)
-; CHECK-NEXT: lw a3, 1200(sp)
+; CHECK-NEXT: lw a2, 1196(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1200(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 856(a0)
; CHECK-NEXT: sw a3, 860(a0)
-; CHECK-NEXT: lw a2, 1188(sp)
-; CHECK-NEXT: lw a3, 1192(sp)
+; CHECK-NEXT: lw a2, 1188(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1192(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 864(a0)
; CHECK-NEXT: sw a3, 868(a0)
-; CHECK-NEXT: lw a2, 1180(sp)
-; CHECK-NEXT: lw a3, 1184(sp)
+; CHECK-NEXT: lw a2, 1180(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1184(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 872(a0)
; CHECK-NEXT: sw a3, 876(a0)
-; CHECK-NEXT: lw a2, 1172(sp)
-; CHECK-NEXT: lw a3, 1176(sp)
+; CHECK-NEXT: lw a2, 1172(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1176(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 880(a0)
; CHECK-NEXT: sw a3, 884(a0)
-; CHECK-NEXT: lw a2, 1164(sp)
-; CHECK-NEXT: lw a3, 1168(sp)
+; CHECK-NEXT: lw a2, 1164(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1168(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 888(a0)
; CHECK-NEXT: sw a3, 892(a0)
-; CHECK-NEXT: lw a2, 1156(sp)
-; CHECK-NEXT: lw a3, 1160(sp)
+; CHECK-NEXT: lw a2, 1156(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1160(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 896(a0)
; CHECK-NEXT: sw a3, 900(a0)
-; CHECK-NEXT: lw a2, 1148(sp)
-; CHECK-NEXT: lw a3, 1152(sp)
+; CHECK-NEXT: lw a2, 1148(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1152(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 904(a0)
; CHECK-NEXT: sw a3, 908(a0)
-; CHECK-NEXT: lw a2, 1140(sp)
-; CHECK-NEXT: lw a3, 1144(sp)
+; CHECK-NEXT: lw a2, 1140(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1144(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 912(a0)
; CHECK-NEXT: sw a3, 916(a0)
-; CHECK-NEXT: lw a2, 1132(sp)
-; CHECK-NEXT: lw a3, 1136(sp)
+; CHECK-NEXT: lw a2, 1132(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1136(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 920(a0)
; CHECK-NEXT: sw a3, 924(a0)
-; CHECK-NEXT: lw a2, 1124(sp)
-; CHECK-NEXT: lw a3, 1128(sp)
+; CHECK-NEXT: lw a2, 1124(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1128(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 928(a0)
; CHECK-NEXT: sw a3, 932(a0)
-; CHECK-NEXT: lw a2, 1116(sp)
-; CHECK-NEXT: lw a3, 1120(sp)
+; CHECK-NEXT: lw a2, 1116(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1120(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 936(a0)
; CHECK-NEXT: sw a3, 940(a0)
-; CHECK-NEXT: lw a2, 1108(sp)
-; CHECK-NEXT: lw a3, 1112(sp)
+; CHECK-NEXT: lw a2, 1108(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1112(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 944(a0)
; CHECK-NEXT: sw a3, 948(a0)
-; CHECK-NEXT: lw a2, 1100(sp)
-; CHECK-NEXT: lw a3, 1104(sp)
+; CHECK-NEXT: lw a2, 1100(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1104(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 952(a0)
; CHECK-NEXT: sw a3, 956(a0)
-; CHECK-NEXT: lw a2, 1092(sp)
-; CHECK-NEXT: lw a3, 1096(sp)
+; CHECK-NEXT: lw a2, 1092(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1096(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 960(a0)
; CHECK-NEXT: sw a3, 964(a0)
-; CHECK-NEXT: lw a2, 1084(sp)
-; CHECK-NEXT: lw a3, 1088(sp)
+; CHECK-NEXT: lw a2, 1084(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1088(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 968(a0)
; CHECK-NEXT: sw a3, 972(a0)
-; CHECK-NEXT: lw a2, 1076(sp)
-; CHECK-NEXT: lw a3, 1080(sp)
+; CHECK-NEXT: lw a2, 1076(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1080(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 976(a0)
; CHECK-NEXT: sw a3, 980(a0)
-; CHECK-NEXT: lw a2, 1068(sp)
-; CHECK-NEXT: lw a3, 1072(sp)
+; CHECK-NEXT: lw a2, 1068(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1072(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 984(a0)
; CHECK-NEXT: sw a3, 988(a0)
-; CHECK-NEXT: lw a2, 1060(sp)
-; CHECK-NEXT: lw a3, 1064(sp)
+; CHECK-NEXT: lw a2, 1060(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1064(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 992(a0)
; CHECK-NEXT: sw a3, 996(a0)
-; CHECK-NEXT: lw a2, 1052(sp)
-; CHECK-NEXT: lw a3, 1056(sp)
+; CHECK-NEXT: lw a2, 1052(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1056(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1000(a0)
; CHECK-NEXT: sw a3, 1004(a0)
-; CHECK-NEXT: lw a2, 1044(sp)
-; CHECK-NEXT: lw a3, 1048(sp)
+; CHECK-NEXT: lw a2, 1044(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1048(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1008(a0)
; CHECK-NEXT: sw a3, 1012(a0)
-; CHECK-NEXT: lw a2, 1036(sp)
-; CHECK-NEXT: lw a3, 1040(sp)
+; CHECK-NEXT: lw a2, 1036(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1040(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1016(a0)
; CHECK-NEXT: sw a3, 1020(a0)
-; CHECK-NEXT: lw a2, 1028(sp)
-; CHECK-NEXT: lw a3, 1032(sp)
+; CHECK-NEXT: lw a2, 1028(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1032(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1024(a0)
; CHECK-NEXT: sw a3, 1028(a0)
-; CHECK-NEXT: lw a2, 1020(sp)
-; CHECK-NEXT: lw a3, 1024(sp)
+; CHECK-NEXT: lw a2, 1020(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1024(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1032(a0)
; CHECK-NEXT: sw a3, 1036(a0)
-; CHECK-NEXT: lw a2, 1012(sp)
-; CHECK-NEXT: lw a3, 1016(sp)
+; CHECK-NEXT: lw a2, 1012(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1016(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1040(a0)
; CHECK-NEXT: sw a3, 1044(a0)
-; CHECK-NEXT: lw a2, 1004(sp)
-; CHECK-NEXT: lw a3, 1008(sp)
+; CHECK-NEXT: lw a2, 1004(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1008(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1048(a0)
; CHECK-NEXT: sw a3, 1052(a0)
-; CHECK-NEXT: lw a2, 996(sp)
-; CHECK-NEXT: lw a3, 1000(sp)
+; CHECK-NEXT: lw a2, 996(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 1000(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1056(a0)
; CHECK-NEXT: sw a3, 1060(a0)
-; CHECK-NEXT: lw a2, 988(sp)
-; CHECK-NEXT: lw a3, 992(sp)
+; CHECK-NEXT: lw a2, 988(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 992(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1064(a0)
; CHECK-NEXT: sw a3, 1068(a0)
-; CHECK-NEXT: lw a2, 980(sp)
-; CHECK-NEXT: lw a3, 984(sp)
+; CHECK-NEXT: lw a2, 980(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 984(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1072(a0)
; CHECK-NEXT: sw a3, 1076(a0)
-; CHECK-NEXT: lw a2, 972(sp)
-; CHECK-NEXT: lw a3, 976(sp)
+; CHECK-NEXT: lw a2, 972(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 976(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1080(a0)
; CHECK-NEXT: sw a3, 1084(a0)
-; CHECK-NEXT: lw a2, 964(sp)
-; CHECK-NEXT: lw a3, 968(sp)
+; CHECK-NEXT: lw a2, 964(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 968(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1088(a0)
; CHECK-NEXT: sw a3, 1092(a0)
-; CHECK-NEXT: lw a2, 956(sp)
-; CHECK-NEXT: lw a3, 960(sp)
+; CHECK-NEXT: lw a2, 956(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 960(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1096(a0)
; CHECK-NEXT: sw a3, 1100(a0)
-; CHECK-NEXT: lw a2, 948(sp)
-; CHECK-NEXT: lw a3, 952(sp)
+; CHECK-NEXT: lw a2, 948(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 952(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1104(a0)
; CHECK-NEXT: sw a3, 1108(a0)
-; CHECK-NEXT: lw a2, 940(sp)
-; CHECK-NEXT: lw a3, 944(sp)
+; CHECK-NEXT: lw a2, 940(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 944(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1112(a0)
; CHECK-NEXT: sw a3, 1116(a0)
-; CHECK-NEXT: lw a2, 932(sp)
-; CHECK-NEXT: lw a3, 936(sp)
+; CHECK-NEXT: lw a2, 932(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 936(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1120(a0)
; CHECK-NEXT: sw a3, 1124(a0)
-; CHECK-NEXT: lw a2, 924(sp)
-; CHECK-NEXT: lw a3, 928(sp)
+; CHECK-NEXT: lw a2, 924(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 928(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1128(a0)
; CHECK-NEXT: sw a3, 1132(a0)
-; CHECK-NEXT: lw a2, 916(sp)
-; CHECK-NEXT: lw a3, 920(sp)
+; CHECK-NEXT: lw a2, 916(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 920(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1136(a0)
; CHECK-NEXT: sw a3, 1140(a0)
-; CHECK-NEXT: lw a2, 908(sp)
-; CHECK-NEXT: lw a3, 912(sp)
+; CHECK-NEXT: lw a2, 908(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 912(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1144(a0)
; CHECK-NEXT: sw a3, 1148(a0)
-; CHECK-NEXT: lw a2, 900(sp)
-; CHECK-NEXT: lw a3, 904(sp)
+; CHECK-NEXT: lw a2, 900(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 904(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1152(a0)
; CHECK-NEXT: sw a3, 1156(a0)
-; CHECK-NEXT: lw a2, 892(sp)
-; CHECK-NEXT: lw a3, 896(sp)
+; CHECK-NEXT: lw a2, 892(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 896(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1160(a0)
; CHECK-NEXT: sw a3, 1164(a0)
-; CHECK-NEXT: lw a2, 884(sp)
-; CHECK-NEXT: lw a3, 888(sp)
+; CHECK-NEXT: lw a2, 884(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 888(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1168(a0)
; CHECK-NEXT: sw a3, 1172(a0)
-; CHECK-NEXT: lw a2, 876(sp)
-; CHECK-NEXT: lw a3, 880(sp)
+; CHECK-NEXT: lw a2, 876(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 880(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1176(a0)
; CHECK-NEXT: sw a3, 1180(a0)
-; CHECK-NEXT: lw a2, 868(sp)
-; CHECK-NEXT: lw a3, 872(sp)
+; CHECK-NEXT: lw a2, 868(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 872(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1184(a0)
; CHECK-NEXT: sw a3, 1188(a0)
-; CHECK-NEXT: lw a2, 860(sp)
-; CHECK-NEXT: lw a3, 864(sp)
+; CHECK-NEXT: lw a2, 860(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 864(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1192(a0)
; CHECK-NEXT: sw a3, 1196(a0)
-; CHECK-NEXT: lw a2, 852(sp)
-; CHECK-NEXT: lw a3, 856(sp)
+; CHECK-NEXT: lw a2, 852(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 856(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1200(a0)
; CHECK-NEXT: sw a3, 1204(a0)
-; CHECK-NEXT: lw a2, 844(sp)
-; CHECK-NEXT: lw a3, 848(sp)
+; CHECK-NEXT: lw a2, 844(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 848(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1208(a0)
; CHECK-NEXT: sw a3, 1212(a0)
-; CHECK-NEXT: lw a2, 836(sp)
-; CHECK-NEXT: lw a3, 840(sp)
+; CHECK-NEXT: lw a2, 836(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 840(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1216(a0)
; CHECK-NEXT: sw a3, 1220(a0)
-; CHECK-NEXT: lw a2, 828(sp)
-; CHECK-NEXT: lw a3, 832(sp)
+; CHECK-NEXT: lw a2, 828(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 832(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1224(a0)
; CHECK-NEXT: sw a3, 1228(a0)
-; CHECK-NEXT: lw a2, 820(sp)
-; CHECK-NEXT: lw a3, 824(sp)
+; CHECK-NEXT: lw a2, 820(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 824(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1232(a0)
; CHECK-NEXT: sw a3, 1236(a0)
-; CHECK-NEXT: lw a2, 812(sp)
-; CHECK-NEXT: lw a3, 816(sp)
+; CHECK-NEXT: lw a2, 812(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 816(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1240(a0)
; CHECK-NEXT: sw a3, 1244(a0)
-; CHECK-NEXT: lw a2, 804(sp)
-; CHECK-NEXT: lw a3, 808(sp)
+; CHECK-NEXT: lw a2, 804(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 808(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1248(a0)
; CHECK-NEXT: sw a3, 1252(a0)
-; CHECK-NEXT: lw a2, 796(sp)
-; CHECK-NEXT: lw a3, 800(sp)
+; CHECK-NEXT: lw a2, 796(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 800(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1256(a0)
; CHECK-NEXT: sw a3, 1260(a0)
-; CHECK-NEXT: lw a2, 788(sp)
-; CHECK-NEXT: lw a3, 792(sp)
+; CHECK-NEXT: lw a2, 788(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 792(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1264(a0)
; CHECK-NEXT: sw a3, 1268(a0)
-; CHECK-NEXT: lw a2, 780(sp)
-; CHECK-NEXT: lw a3, 784(sp)
+; CHECK-NEXT: lw a2, 780(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 784(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1272(a0)
; CHECK-NEXT: sw a3, 1276(a0)
-; CHECK-NEXT: lw a2, 772(sp)
-; CHECK-NEXT: lw a3, 776(sp)
+; CHECK-NEXT: lw a2, 772(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 776(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1280(a0)
; CHECK-NEXT: sw a3, 1284(a0)
-; CHECK-NEXT: lw a2, 764(sp)
-; CHECK-NEXT: lw a3, 768(sp)
+; CHECK-NEXT: lw a2, 764(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 768(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1288(a0)
; CHECK-NEXT: sw a3, 1292(a0)
-; CHECK-NEXT: lw a2, 756(sp)
-; CHECK-NEXT: lw a3, 760(sp)
+; CHECK-NEXT: lw a2, 756(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 760(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1296(a0)
; CHECK-NEXT: sw a3, 1300(a0)
-; CHECK-NEXT: lw a2, 748(sp)
-; CHECK-NEXT: lw a3, 752(sp)
+; CHECK-NEXT: lw a2, 748(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 752(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1304(a0)
; CHECK-NEXT: sw a3, 1308(a0)
-; CHECK-NEXT: lw a2, 740(sp)
-; CHECK-NEXT: lw a3, 744(sp)
+; CHECK-NEXT: lw a2, 740(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 744(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1312(a0)
; CHECK-NEXT: sw a3, 1316(a0)
-; CHECK-NEXT: lw a2, 732(sp)
-; CHECK-NEXT: lw a3, 736(sp)
+; CHECK-NEXT: lw a2, 732(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 736(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1320(a0)
; CHECK-NEXT: sw a3, 1324(a0)
-; CHECK-NEXT: lw a2, 724(sp)
-; CHECK-NEXT: lw a3, 728(sp)
+; CHECK-NEXT: lw a2, 724(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 728(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1328(a0)
; CHECK-NEXT: sw a3, 1332(a0)
-; CHECK-NEXT: lw a2, 716(sp)
-; CHECK-NEXT: lw a3, 720(sp)
+; CHECK-NEXT: lw a2, 716(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 720(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1336(a0)
; CHECK-NEXT: sw a3, 1340(a0)
-; CHECK-NEXT: lw a2, 708(sp)
-; CHECK-NEXT: lw a3, 712(sp)
+; CHECK-NEXT: lw a2, 708(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 712(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1344(a0)
; CHECK-NEXT: sw a3, 1348(a0)
-; CHECK-NEXT: lw a2, 700(sp)
-; CHECK-NEXT: lw a3, 704(sp)
+; CHECK-NEXT: lw a2, 700(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 704(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1352(a0)
; CHECK-NEXT: sw a3, 1356(a0)
-; CHECK-NEXT: lw a2, 692(sp)
-; CHECK-NEXT: lw a3, 696(sp)
+; CHECK-NEXT: lw a2, 692(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 696(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1360(a0)
; CHECK-NEXT: sw a3, 1364(a0)
-; CHECK-NEXT: lw a2, 684(sp)
-; CHECK-NEXT: lw a3, 688(sp)
+; CHECK-NEXT: lw a2, 684(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 688(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1368(a0)
; CHECK-NEXT: sw a3, 1372(a0)
-; CHECK-NEXT: lw a2, 676(sp)
-; CHECK-NEXT: lw a3, 680(sp)
+; CHECK-NEXT: lw a2, 676(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 680(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1376(a0)
; CHECK-NEXT: sw a3, 1380(a0)
-; CHECK-NEXT: lw a2, 668(sp)
-; CHECK-NEXT: lw a3, 672(sp)
+; CHECK-NEXT: lw a2, 668(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 672(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1384(a0)
; CHECK-NEXT: sw a3, 1388(a0)
-; CHECK-NEXT: lw a2, 660(sp)
-; CHECK-NEXT: lw a3, 664(sp)
+; CHECK-NEXT: lw a2, 660(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 664(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1392(a0)
; CHECK-NEXT: sw a3, 1396(a0)
-; CHECK-NEXT: lw a2, 652(sp)
-; CHECK-NEXT: lw a3, 656(sp)
+; CHECK-NEXT: lw a2, 652(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 656(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1400(a0)
; CHECK-NEXT: sw a3, 1404(a0)
-; CHECK-NEXT: lw a2, 644(sp)
-; CHECK-NEXT: lw a3, 648(sp)
+; CHECK-NEXT: lw a2, 644(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 648(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1408(a0)
; CHECK-NEXT: sw a3, 1412(a0)
-; CHECK-NEXT: lw a2, 636(sp)
-; CHECK-NEXT: lw a3, 640(sp)
+; CHECK-NEXT: lw a2, 636(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 640(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1416(a0)
; CHECK-NEXT: sw a3, 1420(a0)
-; CHECK-NEXT: lw a2, 628(sp)
-; CHECK-NEXT: lw a3, 632(sp)
+; CHECK-NEXT: lw a2, 628(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 632(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1424(a0)
; CHECK-NEXT: sw a3, 1428(a0)
-; CHECK-NEXT: lw a2, 620(sp)
-; CHECK-NEXT: lw a3, 624(sp)
+; CHECK-NEXT: lw a2, 620(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 624(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1432(a0)
; CHECK-NEXT: sw a3, 1436(a0)
-; CHECK-NEXT: lw a2, 612(sp)
-; CHECK-NEXT: lw a3, 616(sp)
+; CHECK-NEXT: lw a2, 612(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 616(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1440(a0)
; CHECK-NEXT: sw a3, 1444(a0)
-; CHECK-NEXT: lw a2, 604(sp)
-; CHECK-NEXT: lw a3, 608(sp)
+; CHECK-NEXT: lw a2, 604(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 608(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1448(a0)
; CHECK-NEXT: sw a3, 1452(a0)
-; CHECK-NEXT: lw a2, 596(sp)
-; CHECK-NEXT: lw a3, 600(sp)
+; CHECK-NEXT: lw a2, 596(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 600(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1456(a0)
; CHECK-NEXT: sw a3, 1460(a0)
-; CHECK-NEXT: lw a2, 588(sp)
-; CHECK-NEXT: lw a3, 592(sp)
+; CHECK-NEXT: lw a2, 588(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 592(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1464(a0)
; CHECK-NEXT: sw a3, 1468(a0)
-; CHECK-NEXT: lw a2, 580(sp)
-; CHECK-NEXT: lw a3, 584(sp)
+; CHECK-NEXT: lw a2, 580(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 584(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1472(a0)
; CHECK-NEXT: sw a3, 1476(a0)
-; CHECK-NEXT: lw a2, 572(sp)
-; CHECK-NEXT: lw a3, 576(sp)
+; CHECK-NEXT: lw a2, 572(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 576(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1480(a0)
; CHECK-NEXT: sw a3, 1484(a0)
-; CHECK-NEXT: lw a2, 564(sp)
-; CHECK-NEXT: lw a3, 568(sp)
+; CHECK-NEXT: lw a2, 564(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 568(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1488(a0)
; CHECK-NEXT: sw a3, 1492(a0)
-; CHECK-NEXT: lw a2, 556(sp)
-; CHECK-NEXT: lw a3, 560(sp)
+; CHECK-NEXT: lw a2, 556(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 560(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1496(a0)
; CHECK-NEXT: sw a3, 1500(a0)
-; CHECK-NEXT: lw a2, 548(sp)
-; CHECK-NEXT: lw a3, 552(sp)
+; CHECK-NEXT: lw a2, 548(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 552(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1504(a0)
; CHECK-NEXT: sw a3, 1508(a0)
-; CHECK-NEXT: lw a2, 540(sp)
-; CHECK-NEXT: lw a3, 544(sp)
+; CHECK-NEXT: lw a2, 540(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 544(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1512(a0)
; CHECK-NEXT: sw a3, 1516(a0)
-; CHECK-NEXT: lw a2, 532(sp)
-; CHECK-NEXT: lw a3, 536(sp)
+; CHECK-NEXT: lw a2, 532(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 536(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1520(a0)
; CHECK-NEXT: sw a3, 1524(a0)
-; CHECK-NEXT: lw a2, 524(sp)
-; CHECK-NEXT: lw a3, 528(sp)
+; CHECK-NEXT: lw a2, 524(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 528(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1528(a0)
; CHECK-NEXT: sw a3, 1532(a0)
-; CHECK-NEXT: lw a2, 516(sp)
-; CHECK-NEXT: lw a3, 520(sp)
+; CHECK-NEXT: lw a2, 516(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 520(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1536(a0)
; CHECK-NEXT: sw a3, 1540(a0)
-; CHECK-NEXT: lw a2, 508(sp)
-; CHECK-NEXT: lw a3, 512(sp)
+; CHECK-NEXT: lw a2, 508(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 512(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1544(a0)
; CHECK-NEXT: sw a3, 1548(a0)
-; CHECK-NEXT: lw a2, 500(sp)
-; CHECK-NEXT: lw a3, 504(sp)
+; CHECK-NEXT: lw a2, 500(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 504(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1552(a0)
; CHECK-NEXT: sw a3, 1556(a0)
-; CHECK-NEXT: lw a2, 492(sp)
-; CHECK-NEXT: lw a3, 496(sp)
+; CHECK-NEXT: lw a2, 492(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 496(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1560(a0)
; CHECK-NEXT: sw a3, 1564(a0)
-; CHECK-NEXT: lw a2, 484(sp)
-; CHECK-NEXT: lw a3, 488(sp)
+; CHECK-NEXT: lw a2, 484(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 488(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1568(a0)
; CHECK-NEXT: sw a3, 1572(a0)
-; CHECK-NEXT: lw a2, 476(sp)
-; CHECK-NEXT: lw a3, 480(sp)
+; CHECK-NEXT: lw a2, 476(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 480(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1576(a0)
; CHECK-NEXT: sw a3, 1580(a0)
-; CHECK-NEXT: lw a2, 468(sp)
-; CHECK-NEXT: lw a3, 472(sp)
+; CHECK-NEXT: lw a2, 468(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 472(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1584(a0)
; CHECK-NEXT: sw a3, 1588(a0)
-; CHECK-NEXT: lw a2, 460(sp)
-; CHECK-NEXT: lw a3, 464(sp)
+; CHECK-NEXT: lw a2, 460(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 464(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1592(a0)
; CHECK-NEXT: sw a3, 1596(a0)
-; CHECK-NEXT: lw a2, 452(sp)
-; CHECK-NEXT: lw a3, 456(sp)
+; CHECK-NEXT: lw a2, 452(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 456(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1600(a0)
; CHECK-NEXT: sw a3, 1604(a0)
-; CHECK-NEXT: lw a2, 444(sp)
-; CHECK-NEXT: lw a3, 448(sp)
+; CHECK-NEXT: lw a2, 444(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 448(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1608(a0)
; CHECK-NEXT: sw a3, 1612(a0)
-; CHECK-NEXT: lw a2, 436(sp)
-; CHECK-NEXT: lw a3, 440(sp)
+; CHECK-NEXT: lw a2, 436(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 440(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1616(a0)
; CHECK-NEXT: sw a3, 1620(a0)
-; CHECK-NEXT: lw a2, 428(sp)
-; CHECK-NEXT: lw a3, 432(sp)
+; CHECK-NEXT: lw a2, 428(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 432(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1624(a0)
; CHECK-NEXT: sw a3, 1628(a0)
-; CHECK-NEXT: lw a2, 420(sp)
-; CHECK-NEXT: lw a3, 424(sp)
+; CHECK-NEXT: lw a2, 420(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 424(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1632(a0)
; CHECK-NEXT: sw a3, 1636(a0)
-; CHECK-NEXT: lw a2, 412(sp)
-; CHECK-NEXT: lw a3, 416(sp)
+; CHECK-NEXT: lw a2, 412(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 416(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1640(a0)
; CHECK-NEXT: sw a3, 1644(a0)
-; CHECK-NEXT: lw a2, 404(sp)
-; CHECK-NEXT: lw a3, 408(sp)
+; CHECK-NEXT: lw a2, 404(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 408(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1648(a0)
; CHECK-NEXT: sw a3, 1652(a0)
-; CHECK-NEXT: lw a2, 396(sp)
-; CHECK-NEXT: lw a3, 400(sp)
+; CHECK-NEXT: lw a2, 396(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 400(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1656(a0)
; CHECK-NEXT: sw a3, 1660(a0)
-; CHECK-NEXT: lw a2, 388(sp)
-; CHECK-NEXT: lw a3, 392(sp)
+; CHECK-NEXT: lw a2, 388(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 392(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1664(a0)
; CHECK-NEXT: sw a3, 1668(a0)
-; CHECK-NEXT: lw a2, 380(sp)
-; CHECK-NEXT: lw a3, 384(sp)
+; CHECK-NEXT: lw a2, 380(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 384(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1672(a0)
; CHECK-NEXT: sw a3, 1676(a0)
-; CHECK-NEXT: lw a2, 372(sp)
-; CHECK-NEXT: lw a3, 376(sp)
+; CHECK-NEXT: lw a2, 372(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 376(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1680(a0)
; CHECK-NEXT: sw a3, 1684(a0)
-; CHECK-NEXT: lw a2, 364(sp)
-; CHECK-NEXT: lw a3, 368(sp)
+; CHECK-NEXT: lw a2, 364(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 368(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1688(a0)
; CHECK-NEXT: sw a3, 1692(a0)
-; CHECK-NEXT: lw a2, 356(sp)
-; CHECK-NEXT: lw a3, 360(sp)
+; CHECK-NEXT: lw a2, 356(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 360(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1696(a0)
; CHECK-NEXT: sw a3, 1700(a0)
-; CHECK-NEXT: lw a2, 348(sp)
-; CHECK-NEXT: lw a3, 352(sp)
+; CHECK-NEXT: lw a2, 348(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 352(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1704(a0)
; CHECK-NEXT: sw a3, 1708(a0)
-; CHECK-NEXT: lw a2, 340(sp)
-; CHECK-NEXT: lw a3, 344(sp)
+; CHECK-NEXT: lw a2, 340(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 344(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1712(a0)
; CHECK-NEXT: sw a3, 1716(a0)
-; CHECK-NEXT: lw a2, 332(sp)
-; CHECK-NEXT: lw a3, 336(sp)
+; CHECK-NEXT: lw a2, 332(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 336(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1720(a0)
; CHECK-NEXT: sw a3, 1724(a0)
-; CHECK-NEXT: lw a2, 324(sp)
-; CHECK-NEXT: lw a3, 328(sp)
+; CHECK-NEXT: lw a2, 324(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 328(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1728(a0)
; CHECK-NEXT: sw a3, 1732(a0)
-; CHECK-NEXT: lw a2, 316(sp)
-; CHECK-NEXT: lw a3, 320(sp)
+; CHECK-NEXT: lw a2, 316(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 320(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1736(a0)
; CHECK-NEXT: sw a3, 1740(a0)
-; CHECK-NEXT: lw a2, 308(sp)
-; CHECK-NEXT: lw a3, 312(sp)
+; CHECK-NEXT: lw a2, 308(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 312(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1744(a0)
; CHECK-NEXT: sw a3, 1748(a0)
-; CHECK-NEXT: lw a2, 300(sp)
-; CHECK-NEXT: lw a3, 304(sp)
+; CHECK-NEXT: lw a2, 300(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 304(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1752(a0)
; CHECK-NEXT: sw a3, 1756(a0)
-; CHECK-NEXT: lw a2, 292(sp)
-; CHECK-NEXT: lw a3, 296(sp)
+; CHECK-NEXT: lw a2, 292(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 296(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1760(a0)
; CHECK-NEXT: sw a3, 1764(a0)
-; CHECK-NEXT: lw a2, 284(sp)
-; CHECK-NEXT: lw a3, 288(sp)
+; CHECK-NEXT: lw a2, 284(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 288(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1768(a0)
; CHECK-NEXT: sw a3, 1772(a0)
-; CHECK-NEXT: lw a2, 276(sp)
-; CHECK-NEXT: lw a3, 280(sp)
+; CHECK-NEXT: lw a2, 276(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 280(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1776(a0)
; CHECK-NEXT: sw a3, 1780(a0)
-; CHECK-NEXT: lw a2, 268(sp)
-; CHECK-NEXT: lw a3, 272(sp)
+; CHECK-NEXT: lw a2, 268(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 272(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1784(a0)
; CHECK-NEXT: sw a3, 1788(a0)
-; CHECK-NEXT: lw a2, 260(sp)
-; CHECK-NEXT: lw a3, 264(sp)
+; CHECK-NEXT: lw a2, 260(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 264(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1792(a0)
; CHECK-NEXT: sw a3, 1796(a0)
-; CHECK-NEXT: lw a2, 252(sp)
-; CHECK-NEXT: lw a3, 256(sp)
+; CHECK-NEXT: lw a2, 252(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 256(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1800(a0)
; CHECK-NEXT: sw a3, 1804(a0)
-; CHECK-NEXT: lw a2, 244(sp)
-; CHECK-NEXT: lw a3, 248(sp)
+; CHECK-NEXT: lw a2, 244(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 248(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1808(a0)
; CHECK-NEXT: sw a3, 1812(a0)
-; CHECK-NEXT: lw a2, 236(sp)
-; CHECK-NEXT: lw a3, 240(sp)
+; CHECK-NEXT: lw a2, 236(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 240(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1816(a0)
; CHECK-NEXT: sw a3, 1820(a0)
-; CHECK-NEXT: lw a2, 228(sp)
-; CHECK-NEXT: lw a3, 232(sp)
+; CHECK-NEXT: lw a2, 228(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 232(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1824(a0)
; CHECK-NEXT: sw a3, 1828(a0)
-; CHECK-NEXT: lw a2, 220(sp)
-; CHECK-NEXT: lw a3, 224(sp)
+; CHECK-NEXT: lw a2, 220(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 224(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1832(a0)
; CHECK-NEXT: sw a3, 1836(a0)
-; CHECK-NEXT: lw a2, 212(sp)
-; CHECK-NEXT: lw a3, 216(sp)
+; CHECK-NEXT: lw a2, 212(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 216(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1840(a0)
; CHECK-NEXT: sw a3, 1844(a0)
-; CHECK-NEXT: lw a2, 204(sp)
-; CHECK-NEXT: lw a3, 208(sp)
+; CHECK-NEXT: lw a2, 204(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 208(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1848(a0)
; CHECK-NEXT: sw a3, 1852(a0)
-; CHECK-NEXT: lw a2, 196(sp)
-; CHECK-NEXT: lw a3, 200(sp)
+; CHECK-NEXT: lw a2, 196(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 200(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1856(a0)
; CHECK-NEXT: sw a3, 1860(a0)
-; CHECK-NEXT: lw a2, 188(sp)
-; CHECK-NEXT: lw a3, 192(sp)
+; CHECK-NEXT: lw a2, 188(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 192(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1864(a0)
; CHECK-NEXT: sw a3, 1868(a0)
-; CHECK-NEXT: lw a2, 180(sp)
-; CHECK-NEXT: lw a3, 184(sp)
+; CHECK-NEXT: lw a2, 180(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 184(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1872(a0)
; CHECK-NEXT: sw a3, 1876(a0)
-; CHECK-NEXT: lw a2, 172(sp)
-; CHECK-NEXT: lw a3, 176(sp)
+; CHECK-NEXT: lw a2, 172(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 176(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1880(a0)
; CHECK-NEXT: sw a3, 1884(a0)
-; CHECK-NEXT: lw a2, 164(sp)
-; CHECK-NEXT: lw a3, 168(sp)
+; CHECK-NEXT: lw a2, 164(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 168(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1888(a0)
; CHECK-NEXT: sw a3, 1892(a0)
-; CHECK-NEXT: lw a2, 156(sp)
-; CHECK-NEXT: lw a3, 160(sp)
+; CHECK-NEXT: lw a2, 156(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 160(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1896(a0)
; CHECK-NEXT: sw a3, 1900(a0)
-; CHECK-NEXT: lw a2, 148(sp)
-; CHECK-NEXT: lw a3, 152(sp)
+; CHECK-NEXT: lw a2, 148(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 152(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1904(a0)
; CHECK-NEXT: sw a3, 1908(a0)
-; CHECK-NEXT: lw a2, 140(sp)
-; CHECK-NEXT: lw a3, 144(sp)
+; CHECK-NEXT: lw a2, 140(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 144(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1912(a0)
; CHECK-NEXT: sw a3, 1916(a0)
-; CHECK-NEXT: lw a2, 132(sp)
-; CHECK-NEXT: lw a3, 136(sp)
+; CHECK-NEXT: lw a2, 132(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 136(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1920(a0)
; CHECK-NEXT: sw a3, 1924(a0)
-; CHECK-NEXT: lw a2, 124(sp)
-; CHECK-NEXT: lw a3, 128(sp)
+; CHECK-NEXT: lw a2, 124(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 128(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1928(a0)
; CHECK-NEXT: sw a3, 1932(a0)
-; CHECK-NEXT: lw a2, 116(sp)
-; CHECK-NEXT: lw a3, 120(sp)
+; CHECK-NEXT: lw a2, 116(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 120(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1936(a0)
; CHECK-NEXT: sw a3, 1940(a0)
-; CHECK-NEXT: lw a2, 108(sp)
-; CHECK-NEXT: lw a3, 112(sp)
+; CHECK-NEXT: lw a2, 108(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 112(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1944(a0)
; CHECK-NEXT: sw a3, 1948(a0)
-; CHECK-NEXT: lw a2, 100(sp)
-; CHECK-NEXT: lw a3, 104(sp)
+; CHECK-NEXT: lw a2, 100(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 104(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1952(a0)
; CHECK-NEXT: sw a3, 1956(a0)
-; CHECK-NEXT: lw a2, 92(sp)
-; CHECK-NEXT: lw a3, 96(sp)
+; CHECK-NEXT: lw a2, 92(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 96(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1960(a0)
; CHECK-NEXT: sw a3, 1964(a0)
-; CHECK-NEXT: lw a2, 84(sp)
-; CHECK-NEXT: lw a3, 88(sp)
+; CHECK-NEXT: lw a2, 84(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 88(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1968(a0)
; CHECK-NEXT: sw a3, 1972(a0)
-; CHECK-NEXT: lw a2, 76(sp)
-; CHECK-NEXT: lw a3, 80(sp)
+; CHECK-NEXT: lw a2, 76(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 80(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1976(a0)
; CHECK-NEXT: sw a3, 1980(a0)
-; CHECK-NEXT: lw a2, 68(sp)
-; CHECK-NEXT: lw a3, 72(sp)
+; CHECK-NEXT: lw a2, 68(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 72(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1984(a0)
; CHECK-NEXT: sw a3, 1988(a0)
-; CHECK-NEXT: lw a2, 60(sp)
-; CHECK-NEXT: lw a3, 64(sp)
+; CHECK-NEXT: lw a2, 60(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 64(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 1992(a0)
; CHECK-NEXT: sw a3, 1996(a0)
-; CHECK-NEXT: lw a2, 52(sp)
-; CHECK-NEXT: lw a3, 56(sp)
+; CHECK-NEXT: lw a2, 52(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 56(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 2000(a0)
; CHECK-NEXT: sw a3, 2004(a0)
-; CHECK-NEXT: lw a2, 44(sp)
-; CHECK-NEXT: lw a3, 48(sp)
+; CHECK-NEXT: lw a2, 44(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 48(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 2008(a0)
; CHECK-NEXT: sw a3, 2012(a0)
-; CHECK-NEXT: lw a2, 36(sp)
-; CHECK-NEXT: lw a3, 40(sp)
+; CHECK-NEXT: lw a2, 36(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 40(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 2016(a0)
; CHECK-NEXT: sw a3, 2020(a0)
-; CHECK-NEXT: lw a2, 28(sp)
-; CHECK-NEXT: lw a3, 32(sp)
+; CHECK-NEXT: lw a2, 28(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 32(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 2024(a0)
; CHECK-NEXT: sw a3, 2028(a0)
-; CHECK-NEXT: lw a2, 20(sp)
-; CHECK-NEXT: lw a3, 24(sp)
+; CHECK-NEXT: lw a2, 20(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 24(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 2032(a0)
; CHECK-NEXT: sw a3, 2036(a0)
-; CHECK-NEXT: lw a2, 12(sp)
-; CHECK-NEXT: lw a3, 16(sp)
+; CHECK-NEXT: lw a2, 12(sp) # 4-byte Folded Reload
+; CHECK-NEXT: lw a3, 16(sp) # 4-byte Folded Reload
; CHECK-NEXT: sw a2, 2040(a0)
; CHECK-NEXT: sw a3, 2044(a0)
; CHECK-NEXT: addi sp, sp, 80
>From 4c981dc5799b782ef58a98706cdc456de0edfe41 Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Wed, 20 Mar 2024 13:27:46 -0700
Subject: [PATCH 4/4] fixup! Assume the mem operand is always there.
It's a bug if its not so let's just assume it to simplify the code.
---
.../Target/RISCV/RISCVExpandPseudoInsts.cpp | 45 +++++++------------
1 file changed, 17 insertions(+), 28 deletions(-)
diff --git a/llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp b/llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
index 080a37c9a05ed9..b62e7a5192c941 100644
--- a/llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
+++ b/llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
@@ -317,14 +317,12 @@ bool RISCVExpandPseudo::expandRV32ZdinxStore(MachineBasicBlock &MBB,
.addReg(MBBI->getOperand(1).getReg())
.add(MBBI->getOperand(2));
- MachineMemOperand *MMOHi = nullptr;
- if (MBBI->hasOneMemOperand()) {
- MachineMemOperand *OldMMO = MBBI->memoperands().front();
- MachineFunction *MF = MBB.getParent();
- MachineMemOperand *MMOLo = MF->getMachineMemOperand(OldMMO, 0, 4);
- MMOHi = MF->getMachineMemOperand(OldMMO, 4, 4);
- MIBLo.setMemRefs(MMOLo);
- }
+ assert(MBBI->hasOneMemOperand() && "Expected mem operand");
+ MachineMemOperand *OldMMO = MBBI->memoperands().front();
+ MachineFunction *MF = MBB.getParent();
+ MachineMemOperand *MMOLo = MF->getMachineMemOperand(OldMMO, 0, 4);
+ MachineMemOperand *MMOHi = MF->getMachineMemOperand(OldMMO, 4, 4);
+ MIBLo.setMemRefs(MMOLo);
if (MBBI->getOperand(2).isGlobal() || MBBI->getOperand(2).isCPI()) {
// FIXME: Zdinx RV32 can not work on unaligned memory.
@@ -336,16 +334,14 @@ bool RISCVExpandPseudo::expandRV32ZdinxStore(MachineBasicBlock &MBB,
.addReg(Hi, getKillRegState(MBBI->getOperand(0).isKill()))
.add(MBBI->getOperand(1))
.add(MBBI->getOperand(2));
- if (MMOHi)
- MIBHi.setMemRefs(MMOHi);
+ MIBHi.setMemRefs(MMOHi);
} else {
assert(isInt<12>(MBBI->getOperand(2).getImm() + 4));
auto MIBHi = BuildMI(MBB, MBBI, DL, TII->get(RISCV::SW))
.addReg(Hi, getKillRegState(MBBI->getOperand(0).isKill()))
.add(MBBI->getOperand(1))
.addImm(MBBI->getOperand(2).getImm() + 4);
- if (MMOHi)
- MIBHi.setMemRefs(MMOHi);
+ MIBHi.setMemRefs(MMOHi);
}
MBBI->eraseFromParent();
return true;
@@ -363,14 +359,11 @@ bool RISCVExpandPseudo::expandRV32ZdinxLoad(MachineBasicBlock &MBB,
Register Hi =
TRI->getSubReg(MBBI->getOperand(0).getReg(), RISCV::sub_gpr_odd);
- MachineMemOperand *MMOLo = nullptr;
- MachineMemOperand *MMOHi = nullptr;
- if (MBBI->hasOneMemOperand()) {
- MachineMemOperand *OldMMO = MBBI->memoperands().front();
- MachineFunction *MF = MBB.getParent();
- MMOLo = MF->getMachineMemOperand(OldMMO, 0, 4);
- MMOHi = MF->getMachineMemOperand(OldMMO, 4, 4);
- }
+ assert(MBBI->hasOneMemOperand() && "Expected mem operand");
+ MachineMemOperand *OldMMO = MBBI->memoperands().front();
+ MachineFunction *MF = MBB.getParent();
+ MachineMemOperand *MMOLo = MF->getMachineMemOperand(OldMMO, 0, 4);
+ MachineMemOperand *MMOHi = MF->getMachineMemOperand(OldMMO, 4, 4);
// If the register of operand 1 is equal to the Lo register, then swap the
// order of loading the Lo and Hi statements.
@@ -380,8 +373,7 @@ bool RISCVExpandPseudo::expandRV32ZdinxLoad(MachineBasicBlock &MBB,
auto MIBLo = BuildMI(MBB, MBBI, DL, TII->get(RISCV::LW), Lo)
.addReg(MBBI->getOperand(1).getReg())
.add(MBBI->getOperand(2));
- if (MMOLo)
- MIBLo.setMemRefs(MMOLo);
+ MIBLo.setMemRefs(MMOLo);
}
if (MBBI->getOperand(2).isGlobal() || MBBI->getOperand(2).isCPI()) {
@@ -392,15 +384,13 @@ bool RISCVExpandPseudo::expandRV32ZdinxLoad(MachineBasicBlock &MBB,
.addReg(MBBI->getOperand(1).getReg())
.add(MBBI->getOperand(2));
MBBI->getOperand(2).setOffset(Offset);
- if (MMOHi)
- MIBHi.setMemRefs(MMOHi);
+ MIBHi.setMemRefs(MMOHi);
} else {
assert(isInt<12>(MBBI->getOperand(2).getImm() + 4));
auto MIBHi = BuildMI(MBB, MBBI, DL, TII->get(RISCV::LW), Hi)
.addReg(MBBI->getOperand(1).getReg())
.addImm(MBBI->getOperand(2).getImm() + 4);
- if (MMOHi)
- MIBHi.setMemRefs(MMOHi);
+ MIBHi.setMemRefs(MMOHi);
}
// Order: Hi, Lo
@@ -408,8 +398,7 @@ bool RISCVExpandPseudo::expandRV32ZdinxLoad(MachineBasicBlock &MBB,
auto MIBLo = BuildMI(MBB, MBBI, DL, TII->get(RISCV::LW), Lo)
.addReg(MBBI->getOperand(1).getReg())
.add(MBBI->getOperand(2));
- if (MMOLo)
- MIBLo.setMemRefs(MMOLo);
+ MIBLo.setMemRefs(MMOLo);
}
MBBI->eraseFromParent();
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