[llvm] [RISCV] Convert an assertion to an if condition in getRegAllocationHints (PR #85998)

[Craig Topper via llvm-commits]

https://github.com/topperc created https://github.com/llvm/llvm-project/pull/85998

With GPR pairs from Zdinx, we can't guarantee there are no subregisters on integer instruction operands. I've been able to get these assertions to fire after some other recent PRs.

I've added a FIXME to support this properly. I just wanted to prevent the assertion failure for now.

No test case because my other patch that allowed me to fail the assert hasn't been approved yet, and I don't know for that that patch is required to hit this assert. It's just want exposed it for me. So I think this patch is a good precaution regardless.

>From eade6da052311f1264734a6e04aea63fcd667b89 Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Wed, 20 Mar 2024 12:48:55 -0700
Subject: [PATCH] [RISCV] Convert an assertion to an if condition in
 getRegAllocationHints

With GPR pairs from Zdinx, we can't guarantee there are no subregisters on
integer instruction operands. I've been able to get these assertions
to fire after some other recent PRs.

I've added a FIXME to support this properly. I just wanted to prevent
the assertion failure for now.
---
 llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp b/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
index 10bf1e88d74146..952d17468da590 100644
--- a/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
@@ -741,8 +741,11 @@ bool RISCVRegisterInfo::getRegAllocationHints(
                         bool NeedGPRC) -> void {
     Register Reg = MO.getReg();
     Register PhysReg = Reg.isPhysical() ? Reg : Register(VRM->getPhys(Reg));
-    if (PhysReg && (!NeedGPRC || RISCV::GPRCRegClass.contains(PhysReg))) {
-      assert(!MO.getSubReg() && !VRRegMO.getSubReg() && "Unexpected subreg!");
+    // TODO: Support GPRPair subregisters? Need to be careful with even/odd
+    // registers. If the virtual register is an odd register of a pair and the
+    // physical register is even (or vice versa), we should not add the hint.
+    if (PhysReg && (!NeedGPRC || RISCV::GPRCRegClass.contains(PhysReg)) &&
+        !MO.getSubReg() && !VRRegMO.getSubReg()) {
       if (!MRI->isReserved(PhysReg) && !is_contained(Hints, PhysReg))
         TwoAddrHints.insert(PhysReg);
     }