[llvm] [AMDGPU] Copy SOP properties from pseudo to real. NFCI. (PR #85997)
Stanislav Mekhanoshin via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 20 12:48:39 PDT 2024
https://github.com/rampitec created https://github.com/llvm/llvm-project/pull/85997
This is to help llvm-obdump to analyze instructions in a future patch.
>From 834a88db86b1577ae3444ce651cb2ae93cdaf5d8 Mon Sep 17 00:00:00 2001
From: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: Wed, 20 Mar 2024 12:46:36 -0700
Subject: [PATCH] [AMDGPU] Copy SOP properties from pseudo to real. NFCI.
This is to help llvm-obdump to analyze instructions in a future patch.
---
llvm/lib/Target/AMDGPU/SOPInstructions.td | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/llvm/lib/Target/AMDGPU/SOPInstructions.td b/llvm/lib/Target/AMDGPU/SOPInstructions.td
index 1159c4e0fc2ed5..d34ee34e5bbffc 100644
--- a/llvm/lib/Target/AMDGPU/SOPInstructions.td
+++ b/llvm/lib/Target/AMDGPU/SOPInstructions.td
@@ -60,6 +60,11 @@ class SOP1_Real<bits<8> op, SOP1_Pseudo ps, string real_name = ps.Mnemonic> :
let SchedRW = ps.SchedRW;
let mayLoad = ps.mayLoad;
let mayStore = ps.mayStore;
+ let isTerminator = ps.isTerminator;
+ let isReturn = ps.isReturn;
+ let isCall = ps.isCall;
+ let isBranch = ps.isBranch;
+ let isBarrier = ps.isBarrier;
// encoding
bits<7> sdst;
@@ -977,6 +982,9 @@ class SOPK_Real<SOPK_Pseudo ps, string name = ps.Mnemonic> :
let mayStore = ps.mayStore;
let isBranch = ps.isBranch;
let isCall = ps.isCall;
+ let isTerminator = ps.isTerminator;
+ let isReturn = ps.isReturn;
+ let isBarrier = ps.isBarrier;
// encoding
bits<7> sdst;
@@ -1426,6 +1434,11 @@ class SOPP_Real<SOPP_Pseudo ps, string name = ps.Mnemonic> :
let SchedRW = ps.SchedRW;
let mayLoad = ps.mayLoad;
let mayStore = ps.mayStore;
+ let isTerminator = ps.isTerminator;
+ let isReturn = ps.isReturn;
+ let isCall = ps.isCall;
+ let isBranch = ps.isBranch;
+ let isBarrier = ps.isBarrier;
bits <16> simm16;
}
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