[llvm] [RISCV][GISEL] Legalize G_VSCALE (PR #85967)
Thorsten Schütt via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 20 10:24:38 PDT 2024
tschuett wrote:
The MaschineVerifier only forbids 0 IIRC. It is a common pattern sub(x, C) -> add(x, -C).
https://github.com/llvm/llvm-project/pull/85967
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