[llvm] [AMDGPU][NFC] Test clean up (PR #85922)

[Pravin Jagtap via llvm-commits]

https://github.com/pravinjagtap created https://github.com/llvm/llvm-project/pull/85922

None

>From 578761b576a9fc51719b07dbec9d96146b98719c Mon Sep 17 00:00:00 2001
From: Pravin Jagtap <Pravin.Jagtap at amd.com>
Date: Wed, 20 Mar 2024 07:56:35 -0400
Subject: [PATCH] [AMDGPU][NFC] Test clean up

---
 llvm/test/CodeGen/AMDGPU/bf16-conversions.ll | 15 ++++++++++++++-
 1 file changed, 14 insertions(+), 1 deletion(-)

diff --git a/llvm/test/CodeGen/AMDGPU/bf16-conversions.ll b/llvm/test/CodeGen/AMDGPU/bf16-conversions.ll
index 1eb2771618dce0..7108f3d65768cd 100644
--- a/llvm/test/CodeGen/AMDGPU/bf16-conversions.ll
+++ b/llvm/test/CodeGen/AMDGPU/bf16-conversions.ll
@@ -2,6 +2,7 @@
 ; RUN: llc -march=amdgcn -mcpu=gfx940 < %s | FileCheck --check-prefixes=GCN %s
 
 ; TODO: Add global-isel when it can support bf16
+
 define amdgpu_ps float @v_test_cvt_bf16_f32_v(bfloat %v) {
 ; GCN-LABEL: v_test_cvt_bf16_f32_v:
 ; GCN:       ; %bb.0:
@@ -10,6 +11,7 @@ define amdgpu_ps float @v_test_cvt_bf16_f32_v(bfloat %v) {
   %cvt = fpext bfloat %v to float
   ret float %cvt
 }
+
 define amdgpu_ps float @v_test_cvt_bf16_f32_s(bfloat inreg %v) {
 ; GCN-LABEL: v_test_cvt_bf16_f32_s:
 ; GCN:       ; %bb.0:
@@ -19,6 +21,7 @@ define amdgpu_ps float @v_test_cvt_bf16_f32_s(bfloat inreg %v) {
   %cvt = fpext bfloat %v to float
   ret float %cvt
 }
+
 define amdgpu_ps float @v_test_cvt_v2f32_v2bf16_v(<2 x float> %src) {
 ; GCN-LABEL: v_test_cvt_v2f32_v2bf16_v:
 ; GCN:       ; %bb.0:
@@ -42,6 +45,7 @@ define amdgpu_ps float @v_test_cvt_v2f32_v2bf16_v(<2 x float> %src) {
   %cast = bitcast <2 x bfloat> %res to float
   ret float %cast
 }
+
 define amdgpu_ps float @v_test_cvt_v2f32_v2bf16_s(<2 x float> inreg %src) {
 ; GCN-LABEL: v_test_cvt_v2f32_v2bf16_s:
 ; GCN:       ; %bb.0:
@@ -66,6 +70,7 @@ define amdgpu_ps float @v_test_cvt_v2f32_v2bf16_s(<2 x float> inreg %src) {
   %cast = bitcast <2 x bfloat> %res to float
   ret float %cast
 }
+
 define amdgpu_ps float @v_test_cvt_f32_bf16_v(float %src) {
 ; GCN-LABEL: v_test_cvt_f32_bf16_v:
 ; GCN:       ; %bb.0:
@@ -82,6 +87,7 @@ define amdgpu_ps float @v_test_cvt_f32_bf16_v(float %src) {
   %ext = fpext bfloat %trunc to float
   ret float %ext
 }
+
 define amdgpu_ps float @v_test_cvt_v2f64_v2bf16_v(<2 x double> %src) {
 ; GCN-LABEL: v_test_cvt_v2f64_v2bf16_v:
 ; GCN:       ; %bb.0:
@@ -128,6 +134,7 @@ define amdgpu_ps float @v_test_cvt_v2f64_v2bf16_v(<2 x double> %src) {
   %cast = bitcast <2 x bfloat> %res to float
   ret float %cast
 }
+
 define amdgpu_ps float @fptrunc_f32_f32_to_v2bf16(float %a, float %b) {
 ; GCN-LABEL: fptrunc_f32_f32_to_v2bf16:
 ; GCN:       ; %bb.0: ; %entry
@@ -155,6 +162,7 @@ entry:
   %ret = bitcast <2 x bfloat> %v2.2 to float
   ret float %ret
 }
+
 define amdgpu_ps float @fptrunc_f32_f32_to_v2bf16_mods(float %a, float %b) {
 ; GCN-LABEL: fptrunc_f32_f32_to_v2bf16_mods:
 ; GCN:       ; %bb.0: ; %entry
@@ -186,6 +194,7 @@ entry:
   %ret = bitcast <2 x bfloat> %v2.2 to float
   ret float %ret
 }
+
 define amdgpu_ps void @fptrunc_f32_to_bf16(float %a, ptr %out) {
 ; GCN-LABEL: fptrunc_f32_to_bf16:
 ; GCN:       ; %bb.0: ; %entry
@@ -205,6 +214,7 @@ entry:
   store bfloat %a.cvt, ptr %out
   ret void
 }
+
 define amdgpu_ps void @fptrunc_f32_to_bf16_abs(float %a, ptr %out) {
 ; GCN-LABEL: fptrunc_f32_to_bf16_abs:
 ; GCN:       ; %bb.0: ; %entry
@@ -226,6 +236,7 @@ entry:
   store bfloat %a.cvt, ptr %out
   ret void
 }
+
 define amdgpu_ps void @fptrunc_f32_to_bf16_neg(float %a, ptr %out) {
 ; GCN-LABEL: fptrunc_f32_to_bf16_neg:
 ; GCN:       ; %bb.0: ; %entry
@@ -247,6 +258,7 @@ entry:
   store bfloat %a.cvt, ptr %out
   ret void
 }
+
 define amdgpu_ps void @fptrunc_f64_to_bf16(double %a, ptr %out) {
 ; GCN-LABEL: fptrunc_f64_to_bf16:
 ; GCN:       ; %bb.0: ; %entry
@@ -276,6 +288,7 @@ entry:
   store bfloat %a.cvt, ptr %out
   ret void
 }
+
 define amdgpu_ps void @fptrunc_f64_to_bf16_neg(double %a, ptr %out) {
 ; GCN-LABEL: fptrunc_f64_to_bf16_neg:
 ; GCN:       ; %bb.0: ; %entry
@@ -307,6 +320,7 @@ entry:
   store bfloat %a.cvt, ptr %out
   ret void
 }
+
 define amdgpu_ps void @fptrunc_f64_to_bf16_abs(double %a, ptr %out) {
 ; GCN-LABEL: fptrunc_f64_to_bf16_abs:
 ; GCN:       ; %bb.0: ; %entry
@@ -341,4 +355,3 @@ entry:
 
 declare float @llvm.fabs.f32(float)
 declare double @llvm.fabs.f64(double)
-