[llvm] [LLVM][AArch64]Use load/store with consecutive registers in SME2 or S… (PR #77665)

[Sander de Smalen via llvm-commits]

================
@@ -3065,19 +3071,38 @@ bool AArch64FrameLowering::spillCalleeSavedRegisters(
       std::swap(Reg1, Reg2);
       std::swap(FrameIdxReg1, FrameIdxReg2);
     }
+
+    unsigned PairRegs;
+    unsigned PnReg;
+    if (RPI.isPaired() && RPI.isScalable()) {
+      PairRegs = AArch64::Z0_Z1 + (RPI.Reg1 - AArch64::Z0);
+      if (!PtrueCreated) {
+        PtrueCreated = true;
+        PnReg = AArch64::PN8;
+        BuildMI(MBB, MI, DL, TII.get(AArch64::PTRUE_C_B), PnReg)
+            .setMIFlags(MachineInstr::FrameSetup);
+      }
+    }
+
     MachineInstrBuilder MIB = BuildMI(MBB, MI, DL, TII.get(StrOpc));
     if (!MRI.isReserved(Reg1))
       MBB.addLiveIn(Reg1);
     if (RPI.isPaired()) {
       if (!MRI.isReserved(Reg2))
         MBB.addLiveIn(Reg2);
-      MIB.addReg(Reg2, getPrologueDeath(MF, Reg2));
+      if (RPI.isScalable())
+        MIB.addReg(PairRegs);
+      else
+        MIB.addReg(Reg2, getPrologueDeath(MF, Reg2));
       MIB.addMemOperand(MF.getMachineMemOperand(
           MachinePointerInfo::getFixedStack(MF, FrameIdxReg2),
           MachineMemOperand::MOStore, Size, Alignment));
     }
-    MIB.addReg(Reg1, getPrologueDeath(MF, Reg1))
-        .addReg(AArch64::SP)
+    if (RPI.isPaired() && RPI.isScalable())
+      MIB.addReg(PnReg);
----------------
sdesmalen-arm wrote:

I find the logic of if/else conditions quite complicated now. Could you move all code related to scalable-pairs (that use this mechanism) to a separate block? i.e.

```
MachineInstrBuilder MIB = ...
if (RPI.isPaired() && RPI.isScalable()) {
  // create PTRUE here (if it doesn't yet exist)

  MIB.addReg(PairRegs, ...)
     .addReg(AArch64::PN8)
    .addReg(AArch64::SP)
    .addReg(Offset)
    .addMemOperand(...)
    .addMemOperand(...)
    .setMIFlag(...);
} else {
  // existing code
}

if (!MRI.isReserved(Reg1))
  MBB.addLiveIn(Reg1);
if (RPI.isPaired() && !MRI.isReserved(Reg2))
  MBB.addLiveIn(Reg2);
```

Maybe something similar would be useful for the fills as well.

https://github.com/llvm/llvm-project/pull/77665