[llvm] d032638 - [PowerPC] Fix operand regclass of XSTSTDCSP

[Qiu Chaofan via llvm-commits]

Author: Qiu Chaofan
Date: 2024-03-20T17:45:19+08:00
New Revision: d03263814aa1a686e5aaca99ab9d87408b2c6cb5

URL: https://github.com/llvm/llvm-project/commit/d03263814aa1a686e5aaca99ab9d87408b2c6cb5
DIFF: https://github.com/llvm/llvm-project/commit/d03263814aa1a686e5aaca99ab9d87408b2c6cb5.diff

LOG: [PowerPC] Fix operand regclass of XSTSTDCSP

Added: 
    

Modified: 
    llvm/lib/Target/PowerPC/PPCInstrVSX.td

Removed: 
    


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diff  --git a/llvm/lib/Target/PowerPC/PPCInstrVSX.td b/llvm/lib/Target/PowerPC/PPCInstrVSX.td
index 0e5f6b773bb544..dd07892794d599 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrVSX.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrVSX.td
@@ -1596,7 +1596,7 @@ let Predicates = [HasVSX, HasP9Vector] in {
   // FIXME: Setting the hasSideEffects flag here to match current behaviour.
   let hasSideEffects = 1 in {
     def XSTSTDCSP : XX2_BF3_DCMX7_RS6<60, 298,
-                                (outs crrc:$BF), (ins u7imm:$DCMX, vsfrc:$XB),
+                                (outs crrc:$BF), (ins u7imm:$DCMX, vssrc:$XB),
                                 "xststdcsp $BF, $XB, $DCMX", IIC_VecFP, []>;
     def XSTSTDCDP : XX2_BF3_DCMX7_RS6<60, 362,
                                 (outs crrc:$BF), (ins u7imm:$DCMX, vsfrc:$XB),