[llvm] [AMDGPU] Add a trap lowering workaround for gfx11 (PR #85854)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 20 00:37:55 PDT 2024
================
@@ -197,6 +250,21 @@ define amdgpu_kernel void @debugtrap(ptr addrspace(1) nocapture readonly %arg0)
; HSA-NOTRAP-GFX900-NEXT: global_store_dword v0, v2, s[0:1]
; HSA-NOTRAP-GFX900-NEXT: s_waitcnt vmcnt(0)
; HSA-NOTRAP-GFX900-NEXT: s_endpgm
+;
+; HSA-TRAP-GFX1100-LABEL: debugtrap:
+; HSA-TRAP-GFX1100: ; %bb.0:
+; HSA-TRAP-GFX1100-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
+; HSA-TRAP-GFX1100-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 1
+; HSA-TRAP-GFX1100-NEXT: v_mov_b32_e32 v2, 2
+; HSA-TRAP-GFX1100-NEXT: s_waitcnt lgkmcnt(0)
+; HSA-TRAP-GFX1100-NEXT: global_store_b32 v0, v1, s[0:1] dlc
+; HSA-TRAP-GFX1100-NEXT: s_waitcnt_vscnt null, 0x0
+; HSA-TRAP-GFX1100-NEXT: s_trap 3
+; HSA-TRAP-GFX1100-NEXT: global_store_b32 v0, v2, s[0:1] dlc
+; HSA-TRAP-GFX1100-NEXT: s_waitcnt_vscnt null, 0x0
+; HSA-TRAP-GFX1100-NEXT: s_nop 0
+; HSA-TRAP-GFX1100-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
+; HSA-TRAP-GFX1100-NEXT: s_endpgm
store volatile i32 1, ptr addrspace(1) %arg0
----------------
arsenm wrote:
Should have a -O0 test. Is this emulation safe in the presence of any spills?
https://github.com/llvm/llvm-project/pull/85854
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