[llvm] [RISCV][GISEL] Legalize and regbankselect vector typed G_IMPLICIT_DEF (PR #84553)

[Michael Maitland via llvm-commits]

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@@ -351,6 +351,11 @@ RISCVRegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
     // $f10_d = COPY %1(s32)
     if (anyUseOnlyUseFP(Dst, MRI, TRI))
       Mapping = getFPValueMapping(MRI.getType(Dst).getSizeInBits());
+
+    LLT DstTy = MRI.getType(Dst);
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michaelmaitland wrote:

Updated.

https://github.com/llvm/llvm-project/pull/84553