[llvm] [RISCV][GISEL] Legalization, register bank selection, and instruction selection for scalable G_SELECT (PR #85540)
Michael Maitland via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 19 12:06:46 PDT 2024
michaelmaitland wrote:
> > and an ISD::VSELECT when the condition is scalar.
>
> That seems wrong. An ISD::VSELECT has vector condition not scalar condition.
Revised
https://github.com/llvm/llvm-project/pull/85540
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