[llvm] [RISCV] Refactor code to reduce nesting and remove repeated calls to getOpcode(). NFC (PR #85847)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 19 12:04:20 PDT 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-risc-v
Author: Craig Topper (topperc)
<details>
<summary>Changes</summary>
---
Full diff: https://github.com/llvm/llvm-project/pull/85847.diff
1 Files Affected:
- (modified) llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp (+12-13)
``````````diff
diff --git a/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp b/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
index a68674b221d38e..10bf1e88d74146 100644
--- a/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
@@ -431,29 +431,28 @@ bool RISCVRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
}
if (!IsRVVSpill) {
- if (MI.getOpcode() == RISCV::ADDI && !isInt<12>(Offset.getFixed())) {
+ int64_t Val = Offset.getFixed();
+ int64_t Lo12 = SignExtend64<12>(Val);
+ unsigned Opc = MI.getOpcode();
+ if (Opc == RISCV::ADDI && !isInt<12>(Val)) {
// We chose to emit the canonical immediate sequence rather than folding
// the offset into the using add under the theory that doing so doesn't
// save dynamic instruction count and some target may fuse the canonical
// 32 bit immediate sequence. We still need to clear the portion of the
// offset encoded in the immediate.
MI.getOperand(FIOperandNum + 1).ChangeToImmediate(0);
+ } else if ((Opc == RISCV::PREFETCH_I || Opc == RISCV::PREFETCH_R ||
+ Opc == RISCV::PREFETCH_W) &&
+ (Lo12 & 0b11111) != 0) {
+ // Prefetch instructions require the offset to be 32 byte aligned.
+ MI.getOperand(FIOperandNum + 1).ChangeToImmediate(0);
} else {
// We can encode an add with 12 bit signed immediate in the immediate
// operand of our user instruction. As a result, the remaining
// offset can by construction, at worst, a LUI and a ADD.
- int64_t Val = Offset.getFixed();
- int64_t Lo12 = SignExtend64<12>(Val);
- if ((MI.getOpcode() == RISCV::PREFETCH_I ||
- MI.getOpcode() == RISCV::PREFETCH_R ||
- MI.getOpcode() == RISCV::PREFETCH_W) &&
- (Lo12 & 0b11111) != 0)
- MI.getOperand(FIOperandNum + 1).ChangeToImmediate(0);
- else {
- MI.getOperand(FIOperandNum + 1).ChangeToImmediate(Lo12);
- Offset = StackOffset::get((uint64_t)Val - (uint64_t)Lo12,
- Offset.getScalable());
- }
+ MI.getOperand(FIOperandNum + 1).ChangeToImmediate(Lo12);
+ Offset = StackOffset::get((uint64_t)Val - (uint64_t)Lo12,
+ Offset.getScalable());
}
}
``````````
</details>
https://github.com/llvm/llvm-project/pull/85847
More information about the llvm-commits
mailing list