[llvm] [SelectionDAG]: Deduce known bits from SMIN and SMAX (PR #85722)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 19 08:14:20 PDT 2024
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@@ -5360,10 +5368,20 @@ bool SelectionDAG::isKnownNeverZero(SDValue Op, unsigned Depth) const {
return isKnownNeverZero(Op.getOperand(1), Depth + 1) ||
isKnownNeverZero(Op.getOperand(0), Depth + 1);
- // TODO for smin/smax: If either operand is known negative/positive
+ // For smin/smax: If either operand is known negative/positive
// respectively we don't need the other to be known at all.
case ISD::SMAX:
+ if (computeKnownBits(Op.getOperand(1), Depth + 1).isStrictlyPositive() ||
+ computeKnownBits(Op.getOperand(0), Depth + 1).isStrictlyPositive())
+ return true;
+ return isKnownNeverZero(Op.getOperand(1), Depth + 1) &&
+ isKnownNeverZero(Op.getOperand(0), Depth + 1);
case ISD::SMIN:
+ if (computeKnownBits(Op.getOperand(1), Depth + 1).isNegative() ||
+ computeKnownBits(Op.getOperand(0), Depth + 1).isNegative())
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goldsteinn wrote:
Both here and above, think you should cache the result of `computeKnownBits` so you can check if the `KnownBits` is trivially non-zero and potentially avoid 1/2 recursive calls through `isKnownNeverZero`.
https://github.com/llvm/llvm-project/pull/85722
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