[llvm] 9f433bf - [X86] Add PAVG(0,x) test coverage for PR #85581

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Tue Mar 19 05:40:02 PDT 2024


Author: Simon Pilgrim
Date: 2024-03-19T12:39:47Z
New Revision: 9f433bf8cada5855669b43ff70263a1b61128ca4

URL: https://github.com/llvm/llvm-project/commit/9f433bf8cada5855669b43ff70263a1b61128ca4
DIFF: https://github.com/llvm/llvm-project/commit/9f433bf8cada5855669b43ff70263a1b61128ca4.diff

LOG: [X86] Add PAVG(0,x) test coverage for PR #85581

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/combine-pavg.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/combine-pavg.ll b/llvm/test/CodeGen/X86/combine-pavg.ll
index 0743592f3ca11b..9bb7fec7eeacbe 100644
--- a/llvm/test/CodeGen/X86/combine-pavg.ll
+++ b/llvm/test/CodeGen/X86/combine-pavg.ll
@@ -18,6 +18,22 @@ define <16 x i8> @combine_pavgb_self(<16 x i8> %a0) {
   ret <16 x i8> %1
 }
 
+define <16 x i8> @combine_pavgb_zero(<16 x i8> %a0) {
+; SSE-LABEL: combine_pavgb_zero:
+; SSE:       # %bb.0:
+; SSE-NEXT:    pxor %xmm1, %xmm1
+; SSE-NEXT:    pavgb %xmm1, %xmm0
+; SSE-NEXT:    retq
+;
+; AVX-LABEL: combine_pavgb_zero:
+; AVX:       # %bb.0:
+; AVX-NEXT:    vpxor %xmm1, %xmm1, %xmm1
+; AVX-NEXT:    vpavgb %xmm1, %xmm0, %xmm0
+; AVX-NEXT:    retq
+  %1 = call <16 x i8> @llvm.x86.sse2.pavg.b(<16 x i8> zeroinitializer, <16 x i8> %a0)
+  ret <16 x i8> %1
+}
+
 define <16 x i8> @combine_pavgw_knownbits(<8 x i16> %a0, <8 x i16> %a1, <8 x i16> %a2, <8 x i16> %a3) {
 ; SSE-LABEL: combine_pavgw_knownbits:
 ; SSE:       # %bb.0:


        


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