[llvm] [RISCV][NFC] Remove VRRegMO of tryAddHint (PR #85755)

[Wang Pengcheng via llvm-commits]

https://github.com/wangpc-pp created https://github.com/llvm/llvm-project/pull/85755

It is only used in assertion.


>From 9539532661a7460bc5eb8440f4373c85a85fc3e9 Mon Sep 17 00:00:00 2001
From: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: Tue, 19 Mar 2024 16:54:46 +0800
Subject: [PATCH] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20initia?=
 =?UTF-8?q?l=20version?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Created using spr 1.3.4
---
 llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp | 13 ++++++-------
 1 file changed, 6 insertions(+), 7 deletions(-)

diff --git a/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp b/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
index a68674b221d38e..fa970b07016f1e 100644
--- a/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
@@ -738,12 +738,11 @@ bool RISCVRegisterInfo::getRegAllocationHints(
   // Add any two address hints after any copy hints.
   SmallSet<Register, 4> TwoAddrHints;
 
-  auto tryAddHint = [&](const MachineOperand &VRRegMO, const MachineOperand &MO,
-                        bool NeedGPRC) -> void {
+  auto tryAddHint = [&](const MachineOperand &MO, bool NeedGPRC) -> void {
     Register Reg = MO.getReg();
     Register PhysReg = Reg.isPhysical() ? Reg : Register(VRM->getPhys(Reg));
     if (PhysReg && (!NeedGPRC || RISCV::GPRCRegClass.contains(PhysReg))) {
-      assert(!MO.getSubReg() && !VRRegMO.getSubReg() && "Unexpected subreg!");
+      assert(!MO.getSubReg() && "Unexpected subreg!");
       if (!MRI->isReserved(PhysReg) && !is_contained(Hints, PhysReg))
         TwoAddrHints.insert(PhysReg);
     }
@@ -826,16 +825,16 @@ bool RISCVRegisterInfo::getRegAllocationHints(
         if (!NeedGPRC || MI.getNumExplicitOperands() < 3 ||
             MI.getOpcode() == RISCV::ADD_UW ||
             isCompressibleOpnd(MI.getOperand(2)))
-          tryAddHint(MO, MI.getOperand(1), NeedGPRC);
+          tryAddHint(MI.getOperand(1), NeedGPRC);
         if (MI.isCommutable() && MI.getOperand(2).isReg() &&
             (!NeedGPRC || isCompressibleOpnd(MI.getOperand(1))))
-          tryAddHint(MO, MI.getOperand(2), NeedGPRC);
+          tryAddHint(MI.getOperand(2), NeedGPRC);
       } else if (OpIdx == 1 && (!NeedGPRC || MI.getNumExplicitOperands() < 3 ||
                                 isCompressibleOpnd(MI.getOperand(2)))) {
-        tryAddHint(MO, MI.getOperand(0), NeedGPRC);
+        tryAddHint(MI.getOperand(0), NeedGPRC);
       } else if (MI.isCommutable() && OpIdx == 2 &&
                  (!NeedGPRC || isCompressibleOpnd(MI.getOperand(1)))) {
-        tryAddHint(MO, MI.getOperand(0), NeedGPRC);
+        tryAddHint(MI.getOperand(0), NeedGPRC);
       }
     }
   }