[llvm] [TableGen][NFC] Move MacroFusion classes to TargetMacroFusion.td (PR #85748)
Wang Pengcheng via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 19 00:48:30 PDT 2024
https://github.com/wangpc-pp created https://github.com/llvm/llvm-project/pull/85748
To make structure clear.
>From 1c8ce2fb1244c6d46414c67458d38a6651db0899 Mon Sep 17 00:00:00 2001
From: Wang Pengcheng <wangpengcheng.pp at bytedance.com>
Date: Tue, 19 Mar 2024 15:48:17 +0800
Subject: [PATCH] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20initia?=
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Created using spr 1.3.4
---
llvm/include/llvm/Target/Target.td | 5 +
llvm/include/llvm/Target/TargetMacroFusion.td | 136 ++++++++++++++++++
llvm/include/llvm/Target/TargetSchedule.td | 127 ----------------
3 files changed, 141 insertions(+), 127 deletions(-)
create mode 100644 llvm/include/llvm/Target/TargetMacroFusion.td
diff --git a/llvm/include/llvm/Target/Target.td b/llvm/include/llvm/Target/Target.td
index 4f0c10049ee70f..1e40cc49040d6f 100644
--- a/llvm/include/llvm/Target/Target.td
+++ b/llvm/include/llvm/Target/Target.td
@@ -1877,3 +1877,8 @@ include "llvm/Target/GlobalISel/SelectionDAGCompat.td"
// Pull in the common support for Pfm Counters generation.
//
include "llvm/Target/TargetPfmCounters.td"
+
+//===----------------------------------------------------------------------===//
+// Pull in the common support for macro fusion.
+//
+include "llvm/Target/TargetMacroFusion.td"
diff --git a/llvm/include/llvm/Target/TargetMacroFusion.td b/llvm/include/llvm/Target/TargetMacroFusion.td
new file mode 100644
index 00000000000000..766ba0afbf99c1
--- /dev/null
+++ b/llvm/include/llvm/Target/TargetMacroFusion.td
@@ -0,0 +1,136 @@
+//===-- TargetMacroFusion.td - Target Macro Fusion ---------*- tablegen -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines the TableGen-based macro fusion classes.
+
+// The target instruction that FusionPredicate will be evaluated on.
+class FusionTarget;
+def first_fusion_target : FusionTarget;
+def second_fusion_target : FusionTarget;
+def both_fusion_target : FusionTarget;
+
+// Base class of FusionPredicate, etc. The avaliable variables are:
+// * const TargetInstrInfo &TII
+// * const TargetSubtargetInfo &STI
+// * const MachineRegisterInfo &MRI
+// * const MachineInstr *FirstMI
+// * const MachineInstr &SecondMI
+class FusionPredicate<FusionTarget target> {
+ FusionTarget Target = target;
+}
+class FirstFusionPredicate: FusionPredicate<first_fusion_target>;
+class SecondFusionPredicate: FusionPredicate<second_fusion_target>;
+class BothFusionPredicate: FusionPredicate<both_fusion_target>;
+
+// FusionPredicate with raw code predicate.
+class FusionPredicateWithCode<code pred> : FusionPredicate<both_fusion_target> {
+ code Predicate = pred;
+}
+
+// FusionPredicate with MCInstPredicate.
+class FusionPredicateWithMCInstPredicate<FusionTarget target, MCInstPredicate pred>
+ : FusionPredicate<target> {
+ MCInstPredicate Predicate = pred;
+}
+class FirstFusionPredicateWithMCInstPredicate<MCInstPredicate pred>
+ : FusionPredicateWithMCInstPredicate<first_fusion_target, pred>;
+class SecondFusionPredicateWithMCInstPredicate<MCInstPredicate pred>
+ : FusionPredicateWithMCInstPredicate<second_fusion_target, pred>;
+// The pred will be applied on both firstMI and secondMI.
+class BothFusionPredicateWithMCInstPredicate<MCInstPredicate pred>
+ : FusionPredicateWithMCInstPredicate<both_fusion_target, pred>;
+
+// Tie firstOpIdx and secondOpIdx. The operand of `FirstMI` at position
+// `firstOpIdx` should be the same as the operand of `SecondMI` at position
+// `secondOpIdx`.
+// If the fusion has `IsCommutable` being true and the operand at `secondOpIdx`
+// has commutable operand, then the commutable operand will be checked too.
+class TieReg<int firstOpIdx, int secondOpIdx> : BothFusionPredicate {
+ int FirstOpIdx = firstOpIdx;
+ int SecondOpIdx = secondOpIdx;
+}
+
+// The operand of `SecondMI` at position `firstOpIdx` should be the same as the
+// operand at position `secondOpIdx`.
+// If the fusion has `IsCommutable` being true and the operand at `secondOpIdx`
+// has commutable operand, then the commutable operand will be checked too.
+class SameReg<int firstOpIdx, int secondOpIdx> : SecondFusionPredicate {
+ int FirstOpIdx = firstOpIdx;
+ int SecondOpIdx = secondOpIdx;
+}
+
+// A predicate for wildcard. The generated code will be like:
+// ```
+// if (!FirstMI)
+// return ReturnValue;
+// ```
+class WildcardPred<bit ret> : FirstFusionPredicate {
+ bit ReturnValue = ret;
+}
+def WildcardFalse : WildcardPred<0>;
+def WildcardTrue : WildcardPred<1>;
+
+// Indicates that the destination register of `FirstMI` should have one use if
+// it is a virtual register.
+class OneUsePred : FirstFusionPredicate;
+def OneUse : OneUsePred;
+
+// Handled by MacroFusionPredicatorEmitter backend.
+// The generated predicator will be like:
+// ```
+// bool isNAME(const TargetInstrInfo &TII,
+// const TargetSubtargetInfo &STI,
+// const MachineInstr *FirstMI,
+// const MachineInstr &SecondMI) {
+// auto &MRI = SecondMI.getMF()->getRegInfo();
+// /* Predicates */
+// return true;
+// }
+// ```
+//
+// `IsCommutable` means whether we should handle commutable operands.
+class Fusion<string name, string fieldName, string desc, list<FusionPredicate> predicates>
+ : SubtargetFeature<name, fieldName, "true", desc> {
+ list<FusionPredicate> Predicates = predicates;
+ bit IsCommutable = 0;
+}
+
+// The generated predicator will be like:
+// ```
+// bool isNAME(const TargetInstrInfo &TII,
+// const TargetSubtargetInfo &STI,
+// const MachineInstr *FirstMI,
+// const MachineInstr &SecondMI) {
+// auto &MRI = SecondMI.getMF()->getRegInfo();
+// /* Prolog */
+// /* Predicate for `SecondMI` */
+// /* Wildcard */
+// /* Predicate for `FirstMI` */
+// /* Check same registers */
+// /* Check One Use */
+// /* Tie registers */
+// /* Epilog */
+// return true;
+// }
+// ```
+class SimpleFusion<string name, string fieldName, string desc,
+ MCInstPredicate firstPred, MCInstPredicate secondPred,
+ list<FusionPredicate> prolog = [],
+ list<FusionPredicate> epilog = []>
+ : Fusion<name, fieldName, desc,
+ !listconcat(
+ prolog,
+ [
+ SecondFusionPredicateWithMCInstPredicate<secondPred>,
+ WildcardTrue,
+ FirstFusionPredicateWithMCInstPredicate<firstPred>,
+ SameReg<0, 1>,
+ OneUse,
+ TieReg<0, 1>,
+ ],
+ epilog)>;
diff --git a/llvm/include/llvm/Target/TargetSchedule.td b/llvm/include/llvm/Target/TargetSchedule.td
index d8158eb01ad45e..2562ed0901303f 100644
--- a/llvm/include/llvm/Target/TargetSchedule.td
+++ b/llvm/include/llvm/Target/TargetSchedule.td
@@ -581,130 +581,3 @@ class MemoryQueue<ProcResourceKind PR> {
class LoadQueue<ProcResourceKind LDQueue> : MemoryQueue<LDQueue>;
class StoreQueue<ProcResourceKind STQueue> : MemoryQueue<STQueue>;
-
-// The target instruction that FusionPredicate will be evaluated on.
-class FusionTarget;
-def first_fusion_target : FusionTarget;
-def second_fusion_target : FusionTarget;
-def both_fusion_target : FusionTarget;
-
-// Base class of FusionPredicate, etc. The avaliable variables are:
-// * const TargetInstrInfo &TII
-// * const TargetSubtargetInfo &STI
-// * const MachineRegisterInfo &MRI
-// * const MachineInstr *FirstMI
-// * const MachineInstr &SecondMI
-class FusionPredicate<FusionTarget target> {
- FusionTarget Target = target;
-}
-class FirstFusionPredicate: FusionPredicate<first_fusion_target>;
-class SecondFusionPredicate: FusionPredicate<second_fusion_target>;
-class BothFusionPredicate: FusionPredicate<both_fusion_target>;
-
-// FusionPredicate with raw code predicate.
-class FusionPredicateWithCode<code pred> : FusionPredicate<both_fusion_target> {
- code Predicate = pred;
-}
-
-// FusionPredicate with MCInstPredicate.
-class FusionPredicateWithMCInstPredicate<FusionTarget target, MCInstPredicate pred>
- : FusionPredicate<target> {
- MCInstPredicate Predicate = pred;
-}
-class FirstFusionPredicateWithMCInstPredicate<MCInstPredicate pred>
- : FusionPredicateWithMCInstPredicate<first_fusion_target, pred>;
-class SecondFusionPredicateWithMCInstPredicate<MCInstPredicate pred>
- : FusionPredicateWithMCInstPredicate<second_fusion_target, pred>;
-// The pred will be applied on both firstMI and secondMI.
-class BothFusionPredicateWithMCInstPredicate<MCInstPredicate pred>
- : FusionPredicateWithMCInstPredicate<both_fusion_target, pred>;
-
-// Tie firstOpIdx and secondOpIdx. The operand of `FirstMI` at position
-// `firstOpIdx` should be the same as the operand of `SecondMI` at position
-// `secondOpIdx`.
-// If the fusion has `IsCommutable` being true and the operand at `secondOpIdx`
-// has commutable operand, then the commutable operand will be checked too.
-class TieReg<int firstOpIdx, int secondOpIdx> : BothFusionPredicate {
- int FirstOpIdx = firstOpIdx;
- int SecondOpIdx = secondOpIdx;
-}
-
-// The operand of `SecondMI` at position `firstOpIdx` should be the same as the
-// operand at position `secondOpIdx`.
-// If the fusion has `IsCommutable` being true and the operand at `secondOpIdx`
-// has commutable operand, then the commutable operand will be checked too.
-class SameReg<int firstOpIdx, int secondOpIdx> : SecondFusionPredicate {
- int FirstOpIdx = firstOpIdx;
- int SecondOpIdx = secondOpIdx;
-}
-
-// A predicate for wildcard. The generated code will be like:
-// ```
-// if (!FirstMI)
-// return ReturnValue;
-// ```
-class WildcardPred<bit ret> : FirstFusionPredicate {
- bit ReturnValue = ret;
-}
-def WildcardFalse : WildcardPred<0>;
-def WildcardTrue : WildcardPred<1>;
-
-// Indicates that the destination register of `FirstMI` should have one use if
-// it is a virtual register.
-class OneUsePred : FirstFusionPredicate;
-def OneUse : OneUsePred;
-
-// Handled by MacroFusionPredicatorEmitter backend.
-// The generated predicator will be like:
-// ```
-// bool isNAME(const TargetInstrInfo &TII,
-// const TargetSubtargetInfo &STI,
-// const MachineInstr *FirstMI,
-// const MachineInstr &SecondMI) {
-// auto &MRI = SecondMI.getMF()->getRegInfo();
-// /* Predicates */
-// return true;
-// }
-// ```
-//
-// `IsCommutable` means whether we should handle commutable operands.
-class Fusion<string name, string fieldName, string desc, list<FusionPredicate> predicates>
- : SubtargetFeature<name, fieldName, "true", desc> {
- list<FusionPredicate> Predicates = predicates;
- bit IsCommutable = 0;
-}
-
-// The generated predicator will be like:
-// ```
-// bool isNAME(const TargetInstrInfo &TII,
-// const TargetSubtargetInfo &STI,
-// const MachineInstr *FirstMI,
-// const MachineInstr &SecondMI) {
-// auto &MRI = SecondMI.getMF()->getRegInfo();
-// /* Prolog */
-// /* Predicate for `SecondMI` */
-// /* Wildcard */
-// /* Predicate for `FirstMI` */
-// /* Check same registers */
-// /* Check One Use */
-// /* Tie registers */
-// /* Epilog */
-// return true;
-// }
-// ```
-class SimpleFusion<string name, string fieldName, string desc,
- MCInstPredicate firstPred, MCInstPredicate secondPred,
- list<FusionPredicate> prolog = [],
- list<FusionPredicate> epilog = []>
- : Fusion<name, fieldName, desc,
- !listconcat(
- prolog,
- [
- SecondFusionPredicateWithMCInstPredicate<secondPred>,
- WildcardTrue,
- FirstFusionPredicateWithMCInstPredicate<firstPred>,
- SameReg<0, 1>,
- OneUse,
- TieReg<0, 1>,
- ],
- epilog)>;
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