[llvm] [RISCV] RISCV vector calling convention (2/2) (PR #79096)

[Craig Topper via llvm-commits]

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@@ -1010,19 +1012,77 @@ class RISCVTargetLowering : public TargetLowering {
   unsigned getMinimumJumpTableEntries() const override;
 };
 
+/// As per the spec, the rules for passing vector arguments are as follows:
+///
+/// 1. For the first vector mask argument, use v0 to pass it.
+/// 2. For vector data arguments or rest vector mask arguments, starting from
+/// the v8 register, if a vector register group between v8-v23 that has not been
+/// allocated can be found and the first register number is a multiple of LMUL,
+/// then allocate this vector register group to the argument and mark these
+/// registers as allocated. Otherwise, pass it by reference and are replaced in
+/// the argument list with the address.
+/// 3. For tuple vector data arguments, starting from the v8 register, if
+/// NFIELDS consecutive vector register groups between v8-v23 that have not been
+/// allocated can be found and the first register number is a multiple of LMUL,
+/// then allocate these vector register groups to the argument and mark these
+/// registers as allocated. Otherwise, pass it by reference and are replaced in
+/// the argument list with the address.
+class RVVArgDispatcher {
+public:
+  static constexpr unsigned NumArgVRs = 16;
+
+  struct RVVArgInfo {
+    unsigned NF;
+    MVT VT;
+    bool FirstVMask = false;
+  };
+
+  RVVArgDispatcher(const MachineFunction *MF, const RISCVTargetLowering *TLI,
+                   SmallVectorImpl<Type *> &TypeList)
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topperc wrote:

`const SmallVectorImpl<Type *> &TypeList`

Though I think you might be able to use ArrayRef in place of `const SmallVectorImpl<Type *> &TypeList` in this constructor and `constructArgInfos`. That might allow you to have a single `RVVArgDispatcher` constructor without needing one that takes `Type *Ty`. ArrayRef can be constructed implicitly when passing a single value.

https://github.com/llvm/llvm-project/pull/79096