[llvm] cb84f13 - [AMDGPU] Remove unneeded addr mode predicates on FLAT Real instructions (#85641)
via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 18 07:29:57 PDT 2024
Author: Jay Foad
Date: 2024-03-18T14:29:53Z
New Revision: cb84f130b724f64f88f780c1731a4c6e9cba99cd
URL: https://github.com/llvm/llvm-project/commit/cb84f130b724f64f88f780c1731a4c6e9cba99cd
DIFF: https://github.com/llvm/llvm-project/commit/cb84f130b724f64f88f780c1731a4c6e9cba99cd.diff
LOG: [AMDGPU] Remove unneeded addr mode predicates on FLAT Real instructions (#85641)
These predicates should be copied from the corresponding Pseudo
instruction. Previously that did not work because of a problem with
setting the right predicates on the Pseudos, but #85442 fixed that.
Added:
Modified:
llvm/lib/Target/AMDGPU/FLATInstructions.td
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/FLATInstructions.td b/llvm/lib/Target/AMDGPU/FLATInstructions.td
index d35efaa85512a4..3c0a97e3d050c6 100644
--- a/llvm/lib/Target/AMDGPU/FLATInstructions.td
+++ b/llvm/lib/Target/AMDGPU/FLATInstructions.td
@@ -2135,9 +2135,7 @@ multiclass FLAT_Real_SADDR_RTN_gfx10<bits<7> op> {
multiclass FLAT_Real_ST_gfx10<bits<7> op> {
def _ST_gfx10 :
- FLAT_Real_gfx10<op, !cast<FLAT_Pseudo>(NAME#"_ST")> {
- let OtherPredicates = [HasFlatScratchSTMode];
- }
+ FLAT_Real_gfx10<op, !cast<FLAT_Pseudo>(NAME#"_ST")>;
}
multiclass FLAT_Real_AllAddr_gfx10<bits<7> op> :
@@ -2372,15 +2370,11 @@ multiclass FLAT_Real_SADDR_RTN_gfx11<bits<7> op, string ps, string opName> {
}
multiclass FLAT_Real_ST_gfx11<bits<7> op, string ps, string opName> {
- def _ST_gfx11 : FLAT_Real_gfx11<op, !cast<FLAT_Pseudo>(ps#"_ST"), opName> {
- let OtherPredicates = [HasFlatScratchSTMode];
- }
+ def _ST_gfx11 : FLAT_Real_gfx11<op, !cast<FLAT_Pseudo>(ps#"_ST"), opName>;
}
multiclass FLAT_Real_SVS_gfx11<bits<7> op, string ps, string opName> {
- def _SVS_gfx11 : FLAT_Real_gfx11<op, !cast<FLAT_Pseudo>(ps#"_SVS"), opName> {
- let OtherPredicates = [HasFlatScratchSVSMode];
- }
+ def _SVS_gfx11 : FLAT_Real_gfx11<op, !cast<FLAT_Pseudo>(ps#"_SVS"), opName>;
}
multiclass FLAT_Real_AllAddr_gfx11<bits<7> op, string ps, string opName, int renamed = false> :
@@ -2582,15 +2576,11 @@ multiclass VFLAT_Real_SADDR_RTN_gfx12<bits<8> op, string ps, string opName> {
}
multiclass VFLAT_Real_ST_gfx12<bits<8> op, string ps, string opName> {
- def _ST_gfx12 : VFLAT_Real_gfx12<op, !cast<FLAT_Pseudo>(ps#"_ST"), opName> {
- let OtherPredicates = [HasFlatScratchSTMode];
- }
+ def _ST_gfx12 : VFLAT_Real_gfx12<op, !cast<FLAT_Pseudo>(ps#"_ST"), opName>;
}
multiclass VFLAT_Real_SVS_gfx12<bits<8> op, string ps, string opName> {
- def _SVS_gfx12 : VFLAT_Real_gfx12<op, !cast<FLAT_Pseudo>(ps#"_SVS"), opName> {
- let OtherPredicates = [HasFlatScratchSVSMode];
- }
+ def _SVS_gfx12 : VFLAT_Real_gfx12<op, !cast<FLAT_Pseudo>(ps#"_SVS"), opName>;
}
multiclass VFLAT_Real_Atomics_gfx12<bits<8> op, string ps = NAME, string opName = !tolower(NAME),
More information about the llvm-commits
mailing list