[llvm] [AArch64][GlobalISel] Add custom legalization for v4s8 = G_TRUNC v4s16 (PR #85610)

[Thorsten Schütt via llvm-commits]

tschuett wrote:

It looks complicated. InstCombine combines bitcasts on the vector register of extractVectorElement, https://github.com/llvm/llvm-project/blob/8e5de66af3da8c2fc79b8fe2cbc26f94b677434d/llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp#L183


https://github.com/llvm/llvm-project/pull/85610