[llvm] 2d80505 - [AIX] Support per global code model. (#79202)
via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 15 09:52:08 PDT 2024
Author: Sean Fertile
Date: 2024-03-15T12:52:04-04:00
New Revision: 2d80505401835ed4c32d0d58f015efddf929c39d
URL: https://github.com/llvm/llvm-project/commit/2d80505401835ed4c32d0d58f015efddf929c39d
DIFF: https://github.com/llvm/llvm-project/commit/2d80505401835ed4c32d0d58f015efddf929c39d.diff
LOG: [AIX] Support per global code model. (#79202)
Exploit the per global code model attribute on AIX. On AIX we need to
update both the code sequence used to access the global (either 1 or 2
instructions for small and large code model respectively) and the
storage mapping class that we emit the toc entry.
---------
Co-authored-by: Amy Kwan <akwan0907 at gmail.com>
Added:
llvm/test/CodeGen/PowerPC/aix-codemodel-attr.ll
Modified:
llvm/include/llvm/MC/MCSymbolXCOFF.h
llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
llvm/lib/Target/PowerPC/PPCSubtarget.cpp
llvm/lib/Target/PowerPC/PPCSubtarget.h
Removed:
################################################################################
diff --git a/llvm/include/llvm/MC/MCSymbolXCOFF.h b/llvm/include/llvm/MC/MCSymbolXCOFF.h
index 11c3b8831ba517..3bf4491e8fe2f8 100644
--- a/llvm/include/llvm/MC/MCSymbolXCOFF.h
+++ b/llvm/include/llvm/MC/MCSymbolXCOFF.h
@@ -26,6 +26,8 @@ class MCSymbolXCOFF : public MCSymbol {
static bool classof(const MCSymbol *S) { return S->isXCOFF(); }
+ enum CodeModel : uint8_t { CM_Small, CM_Large };
+
static StringRef getUnqualifiedName(StringRef Name) {
if (Name.back() == ']') {
StringRef Lhs, Rhs;
@@ -72,8 +74,22 @@ class MCSymbolXCOFF : public MCSymbol {
void setEHInfo() const { modifyFlags(SF_EHInfo, SF_EHInfo); }
+ bool hasPerSymbolCodeModel() const { return PerSymbolCodeModel.has_value(); }
+
+ CodeModel getPerSymbolCodeModel() const {
+ assert(hasPerSymbolCodeModel() &&
+ "Requested code model for symbol without one");
+ return *PerSymbolCodeModel;
+ }
+
+ void setPerSymbolCodeModel(MCSymbolXCOFF::CodeModel Model) {
+ PerSymbolCodeModel = Model;
+ }
+
private:
std::optional<XCOFF::StorageClass> StorageClass;
+ std::optional<CodeModel> PerSymbolCodeModel;
+
MCSectionXCOFF *RepresentedCsect = nullptr;
XCOFF::VisibilityType VisibilityType = XCOFF::SYM_V_UNSPECIFIED;
StringRef SymbolTableName;
diff --git a/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp b/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
index 6943ce261d9d9c..15b59421a0f44a 100644
--- a/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
+++ b/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
@@ -2680,21 +2680,34 @@ MCSection *TargetLoweringObjectFileXCOFF::getSectionForFunctionDescriptor(
MCSection *TargetLoweringObjectFileXCOFF::getSectionForTOCEntry(
const MCSymbol *Sym, const TargetMachine &TM) const {
- // Use TE storage-mapping class when large code model is enabled so that
- // the chance of needing -bbigtoc is decreased. Also, the toc-entry for
- // EH info is never referenced directly using instructions so it can be
- // allocated with TE storage-mapping class.
- // The "_$TLSML" symbol for TLS local-dynamic mode requires XMC_TC, otherwise
- // the AIX assembler will complain.
+ const XCOFF::StorageMappingClass SMC = [](const MCSymbol *Sym,
+ const TargetMachine &TM) {
+ const MCSymbolXCOFF *XSym = cast<MCSymbolXCOFF>(Sym);
+
+ // The "_$TLSML" symbol for TLS local-dynamic mode requires XMC_TC,
+ // otherwise the AIX assembler will complain.
+ if (XSym->getSymbolTableName() == "_$TLSML")
+ return XCOFF::XMC_TC;
+
+ // Use large code model toc entries for ehinfo symbols as they are
+ // never referenced directly. The runtime loads their TOC entry
+ // addresses from the trace-back table.
+ if (XSym->isEHInfo())
+ return XCOFF::XMC_TE;
+
+ // If the symbol does not have a code model specified use the module value.
+ if (!XSym->hasPerSymbolCodeModel())
+ return TM.getCodeModel() == CodeModel::Large ? XCOFF::XMC_TE
+ : XCOFF::XMC_TC;
+
+ return XSym->getPerSymbolCodeModel() == MCSymbolXCOFF::CM_Large
+ ? XCOFF::XMC_TE
+ : XCOFF::XMC_TC;
+ }(Sym, TM);
+
return getContext().getXCOFFSection(
cast<MCSymbolXCOFF>(Sym)->getSymbolTableName(), SectionKind::getData(),
- XCOFF::CsectProperties(
- ((TM.getCodeModel() == CodeModel::Large &&
- cast<MCSymbolXCOFF>(Sym)->getSymbolTableName() != "_$TLSML") ||
- cast<MCSymbolXCOFF>(Sym)->isEHInfo())
- ? XCOFF::XMC_TE
- : XCOFF::XMC_TC,
- XCOFF::XTY_SD));
+ XCOFF::CsectProperties(SMC, XCOFF::XTY_SD));
}
MCSection *TargetLoweringObjectFileXCOFF::getSectionForLSDA(
diff --git a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
index 45f446bd2042f0..64cae1caa6437d 100644
--- a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
+++ b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
@@ -474,6 +474,35 @@ static void collectTOCStats(PPCAsmPrinter::TOCEntryType Type) {
}
}
+static CodeModel::Model getCodeModel(const PPCSubtarget &S,
+ const TargetMachine &TM,
+ const MachineOperand &MO) {
+ CodeModel::Model ModuleModel = TM.getCodeModel();
+
+ // If the operand is not a global address then there is no
+ // global variable to carry an attribute.
+ if (!(MO.getType() == MachineOperand::MO_GlobalAddress))
+ return ModuleModel;
+
+ const GlobalValue *GV = MO.getGlobal();
+ assert(GV && "expected global for MO_GlobalAddress");
+
+ return S.getCodeModel(TM, GV);
+}
+
+static void setOptionalCodeModel(MCSymbolXCOFF *XSym, CodeModel::Model CM) {
+ switch (CM) {
+ case CodeModel::Large:
+ XSym->setPerSymbolCodeModel(MCSymbolXCOFF::CM_Large);
+ return;
+ case CodeModel::Small:
+ XSym->setPerSymbolCodeModel(MCSymbolXCOFF::CM_Small);
+ return;
+ default:
+ report_fatal_error("Invalid code model for AIX");
+ }
+}
+
/// lookUpOrCreateTOCEntry -- Given a symbol, look up whether a TOC entry
/// exists for it. If not, create one. Then return a symbol that references
/// the TOC entry.
@@ -1014,7 +1043,7 @@ void PPCAsmPrinter::emitInstruction(const MachineInstr *MI) {
// relative to the toc-base.
if (IsAIX) {
assert(
- TM.getCodeModel() == CodeModel::Small &&
+ getCodeModel(*Subtarget, TM, MO) == CodeModel::Small &&
"This pseudo should only be selected for 32-bit small code model.");
Exp = getTOCEntryLoadingExprForXCOFF(MOSymbol, Exp, VK);
TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
@@ -1098,7 +1127,12 @@ void PPCAsmPrinter::emitInstruction(const MachineInstr *MI) {
return;
}
case PPC::ADDIStocHA: {
- assert((IsAIX && !IsPPC64 && TM.getCodeModel() == CodeModel::Large) &&
+ const MachineOperand &MO = MI->getOperand(2);
+
+ assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) &&
+ "Invalid operand for ADDIStocHA.");
+ assert((IsAIX && !IsPPC64 &&
+ getCodeModel(*Subtarget, TM, MO) == CodeModel::Large) &&
"This pseudo should only be selected for 32-bit large code model on"
" AIX.");
@@ -1108,10 +1142,6 @@ void PPCAsmPrinter::emitInstruction(const MachineInstr *MI) {
// Change the opcode to ADDIS.
TmpInst.setOpcode(PPC::ADDIS);
- const MachineOperand &MO = MI->getOperand(2);
- assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) &&
- "Invalid operand for ADDIStocHA.");
-
// Map the machine operand to its corresponding MCSymbol.
MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this);
@@ -1131,7 +1161,12 @@ void PPCAsmPrinter::emitInstruction(const MachineInstr *MI) {
return;
}
case PPC::LWZtocL: {
- assert(IsAIX && !IsPPC64 && TM.getCodeModel() == CodeModel::Large &&
+ const MachineOperand &MO = MI->getOperand(1);
+
+ assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) &&
+ "Invalid operand for LWZtocL.");
+ assert(IsAIX && !IsPPC64 &&
+ getCodeModel(*Subtarget, TM, MO) == CodeModel::Large &&
"This pseudo should only be selected for 32-bit large code model on"
" AIX.");
@@ -1141,10 +1176,6 @@ void PPCAsmPrinter::emitInstruction(const MachineInstr *MI) {
// Change the opcode to lwz.
TmpInst.setOpcode(PPC::LWZ);
- const MachineOperand &MO = MI->getOperand(1);
- assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) &&
- "Invalid operand for LWZtocL.");
-
// Map the machine operand to its corresponding MCSymbol.
MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this);
@@ -1183,8 +1214,12 @@ void PPCAsmPrinter::emitInstruction(const MachineInstr *MI) {
const bool GlobalToc =
MO.isGlobal() && Subtarget->isGVIndirectSymbol(MO.getGlobal());
+
+ const CodeModel::Model CM =
+ IsAIX ? getCodeModel(*Subtarget, TM, MO) : TM.getCodeModel();
+
if (GlobalToc || MO.isJTI() || MO.isBlockAddress() ||
- (MO.isCPI() && TM.getCodeModel() == CodeModel::Large))
+ (MO.isCPI() && CM == CodeModel::Large))
MOSymbol = lookUpOrCreateTOCEntry(MOSymbol, getTOCEntryTypeForMO(MO), VK);
VK = IsAIX ? MCSymbolRefExpr::VK_PPC_U : MCSymbolRefExpr::VK_PPC_TOC_HA;
@@ -1225,8 +1260,9 @@ void PPCAsmPrinter::emitInstruction(const MachineInstr *MI) {
const MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this);
MCSymbolRefExpr::VariantKind VK = GetVKForMO(MO);
-
- if (!MO.isCPI() || TM.getCodeModel() == CodeModel::Large)
+ CodeModel::Model CM =
+ IsAIX ? getCodeModel(*Subtarget, TM, MO) : TM.getCodeModel();
+ if (!MO.isCPI() || CM == CodeModel::Large)
MOSymbol = lookUpOrCreateTOCEntry(MOSymbol, getTOCEntryTypeForMO(MO), VK);
VK = IsAIX ? MCSymbolRefExpr::VK_PPC_L : MCSymbolRefExpr::VK_PPC_TOC_LO;
@@ -2984,6 +3020,10 @@ bool PPCAIXAsmPrinter::doInitialization(Module &M) {
}
setCsectAlignment(&G);
+ std::optional<CodeModel::Model> OptionalCodeModel = G.getCodeModel();
+ if (OptionalCodeModel)
+ setOptionalCodeModel(cast<MCSymbolXCOFF>(getSymbol(&G)),
+ *OptionalCodeModel);
}
for (const auto &F : M)
@@ -3005,6 +3045,15 @@ bool PPCAIXAsmPrinter::doInitialization(Module &M) {
false);
}
+ const GlobalVariable *GVar =
+ dyn_cast_or_null<GlobalVariable>(Alias.getAliaseeObject());
+ if (GVar) {
+ std::optional<CodeModel::Model> OptionalCodeModel = GVar->getCodeModel();
+ if (OptionalCodeModel)
+ setOptionalCodeModel(cast<MCSymbolXCOFF>(getSymbol(&Alias)),
+ *OptionalCodeModel);
+ }
+
GOAliasMap[Aliasee].push_back(&Alias);
}
diff --git a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index 0c25accd1d6ce6..dfea9e7709240c 100644
--- a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -524,6 +524,24 @@ static bool hasTocDataAttr(SDValue Val, unsigned PointerSize) {
return true;
}
+static CodeModel::Model getCodeModel(const PPCSubtarget &Subtarget,
+ const TargetMachine &TM,
+ const SDNode *Node) {
+ // If there isn't an attribute to override the module code model
+ // this will be the effective code model.
+ CodeModel::Model ModuleModel = TM.getCodeModel();
+
+ GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Node->getOperand(0));
+ if (!GA)
+ return ModuleModel;
+
+ const GlobalValue *GV = GA->getGlobal();
+ if (!GV)
+ return ModuleModel;
+
+ return Subtarget.getCodeModel(TM, GV);
+}
+
/// isInt32Immediate - This method tests to see if the node is a 32-bit constant
/// operand. If so Imm will receive the 32-bit value.
static bool isInt32Immediate(SDNode *N, unsigned &Imm) {
@@ -6059,7 +6077,8 @@ void PPCDAGToDAGISel::Select(SDNode *N) {
const bool isAIXABI = Subtarget->isAIXABI();
// PowerPC only support small, medium and large code model.
- const CodeModel::Model CModel = TM.getCodeModel();
+ const CodeModel::Model CModel = getCodeModel(*Subtarget, TM, N);
+
assert(!(CModel == CodeModel::Tiny || CModel == CodeModel::Kernel) &&
"PowerPC doesn't support tiny or kernel code models.");
diff --git a/llvm/lib/Target/PowerPC/PPCSubtarget.cpp b/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
index 5380ec1c4c0d9c..653d9bda99192a 100644
--- a/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
+++ b/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
@@ -186,14 +186,63 @@ bool PPCSubtarget::enableSubRegLiveness() const {
}
bool PPCSubtarget::isGVIndirectSymbol(const GlobalValue *GV) const {
+ if (isAIXABI()) {
+ if (const GlobalVariable *GVar = dyn_cast<GlobalVariable>(GV))
+ // On AIX the only symbols that aren't indirect are toc-data.
+ return !GVar->hasAttribute("toc-data");
+
+ return true;
+ }
+
// Large code model always uses the TOC even for local symbols.
if (TM.getCodeModel() == CodeModel::Large)
return true;
+
if (TM.shouldAssumeDSOLocal(GV))
return false;
return true;
}
+CodeModel::Model PPCSubtarget::getCodeModel(const TargetMachine &TM,
+ const GlobalValue *GV) const {
+ // If there isn't an attribute to override the module code model
+ // this will be the effective code model.
+ CodeModel::Model ModuleModel = TM.getCodeModel();
+
+ // Initially support per global code model for AIX only.
+ if (!isAIXABI())
+ return ModuleModel;
+
+ // Only GlobalVariables carry an attribute which can override the module code
+ // model.
+ assert(GV && "Unexpected NULL GlobalValue");
+ const GlobalVariable *GlobalVar =
+ [](const GlobalValue *GV) -> const GlobalVariable * {
+ const GlobalVariable *Var = dyn_cast<GlobalVariable>(GV);
+ if (Var)
+ return Var;
+
+ const GlobalAlias *Alias = dyn_cast<GlobalAlias>(GV);
+ if (Alias)
+ return dyn_cast<GlobalVariable>(Alias->getAliaseeObject());
+
+ return nullptr;
+ }(GV);
+
+ if (!GlobalVar)
+ return ModuleModel;
+
+ std::optional<CodeModel::Model> MaybeCodeModel = GlobalVar->getCodeModel();
+ if (MaybeCodeModel) {
+ CodeModel::Model CM = *MaybeCodeModel;
+ assert((CM == CodeModel::Small || CM == CodeModel::Large) &&
+ "invalid code model for AIX");
+ return CM;
+ }
+
+ return ModuleModel;
+}
+
bool PPCSubtarget::isELFv2ABI() const { return TM.isELFv2ABI(); }
bool PPCSubtarget::isPPC64() const { return TM.isPPC64(); }
diff --git a/llvm/lib/Target/PowerPC/PPCSubtarget.h b/llvm/lib/Target/PowerPC/PPCSubtarget.h
index 306a52dca8362b..bf35f8ec151b10 100644
--- a/llvm/lib/Target/PowerPC/PPCSubtarget.h
+++ b/llvm/lib/Target/PowerPC/PPCSubtarget.h
@@ -245,6 +245,10 @@ class PPCSubtarget : public PPCGenSubtargetInfo {
/// True if the GV will be accessed via an indirect symbol.
bool isGVIndirectSymbol(const GlobalValue *GV) const;
+ /// Calculates the effective code model for argument GV.
+ CodeModel::Model getCodeModel(const TargetMachine &TM,
+ const GlobalValue *GV) const;
+
/// True if the ABI is descriptor based.
bool usesFunctionDescriptors() const {
// Both 32-bit and 64-bit AIX are descriptor based. For ELF only the 64-bit
diff --git a/llvm/test/CodeGen/PowerPC/aix-codemodel-attr.ll b/llvm/test/CodeGen/PowerPC/aix-codemodel-attr.ll
new file mode 100644
index 00000000000000..ef1156e338a89a
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/aix-codemodel-attr.ll
@@ -0,0 +1,166 @@
+; RUN: llc --verify-machineinstrs -mtriple powerpc-ibm-aix --code-model=small < \
+; RUN: %s | FileCheck --check-prefixes=CHECK,CHECK32,CHECK-SMALL,CHECK-SMALL32 %s
+
+; RUN: llc --verify-machineinstrs -mtriple powerpc-ibm-aix --code-model=large < \
+; RUN: %s | FileCheck --check-prefixes=CHECK,CHECK32,CHECK-LARGE,CHECK-LARGE32 %s
+
+; RUN: llc --verify-machineinstrs -mtriple powerpc64-ibm-aix --code-model=small < \
+; RUN: %s | FileCheck --check-prefixes=CHECK,CHECK64,CHECK-SMALL,CHECK-SMALL64 %s
+
+; RUN: llc --verify-machineinstrs -mtriple powerpc64-ibm-aix --code-model=large < \
+; RUN: %s | FileCheck --check-prefixes=CHECK,CHECK64,CHECK-LARGE,CHECK-LARGE64 %s
+
+ at a = external dso_local global i32, code_model "small", align 4
+ at b = external dso_local global i32, code_model "large", align 4
+ at c = dso_local global i32 55, code_model "small", align 4
+ at d = dso_local global i32 41, code_model "large", align 4
+ at e = external dso_local global i32, align 4
+ at f = dso_local global i32 2748, align 4
+
+ at large_aliasee = global i32 10, code_model "large", align 4
+ at small_aliasee = global i32 171, code_model "small", align 4
+ at normal_aliasee = global i32 2748, align 4
+
+ at al = alias i32, ptr @large_aliasee
+ at as = alias i32, ptr @small_aliasee
+ at an = alias i32, ptr @normal_aliasee
+
+define i32 @A() local_unnamed_addr {
+entry:
+ %0 = load i32, ptr @a, align 4
+ ret i32 %0
+}
+; CHECK32: lwz [[SCRATCH:[0-9]+]], L..C[[TL_A:[0-9]+]](2) # @a
+; CHECK64: ld [[SCRATCH:[0-9]+]], L..C[[TL_A:[0-9]+]](2) # @a
+; CHECK: lwz 3, 0([[SCRATCH]])
+; CHECK: blr
+
+define i32 @B() local_unnamed_addr {
+entry:
+ %0 = load i32, ptr @b, align 4
+ ret i32 %0
+}
+; CHECK: addis [[HI:[0-9]+]], L..C[[TL_B:[0-9]+]]@u(2)
+; CHECK32: lwz [[ADDR:[0-9]+]], L..C[[TL_B]]@l([[HI]])
+; CHECK64: ld [[ADDR:[0-9]+]], L..C[[TL_B]]@l([[HI]])
+; CHECK: lwz 3, 0([[ADDR]])
+; CHECK: blr
+
+define i32 @C() local_unnamed_addr {
+entry:
+ %0 = load i32, ptr @c, align 4
+ ret i32 %0
+}
+; CHECK32: lwz [[SCRATCH:[0-9]+]], L..C[[TL_C:[0-9]+]](2) # @c
+; CHECK64: ld [[SCRATCH:[0-9]+]], L..C[[TL_C:[0-9]+]](2) # @c
+; CHECK: lwz 3, 0([[SCRATCH]])
+; CHECK: blr
+
+define i32 @D() local_unnamed_addr {
+entry:
+ %0 = load i32, ptr @d, align 4
+ ret i32 %0
+}
+; CHECK: addis [[HI:[0-9]+]], L..C[[TL_D:[0-9]+]]@u(2)
+; CHECK32: lwz [[ADDR:[0-9]+]], L..C[[TL_D]]@l([[HI]])
+; CHECK64: ld [[ADDR:[0-9]+]], L..C[[TL_D]]@l([[HI]])
+; CHECK: lwz 3, 0([[ADDR]])
+; CHECK: blr
+
+define i32 @E() {
+entry:
+ %0 = load i32, ptr @e, align 4
+ ret i32 %0
+}
+; CHECK-LARGE: addis [[HI:[0-9]+]], L..C[[TL_E:[0-9]+]]@u(2)
+; CHECK-LARGE32: lwz [[SCRATCH:[0-9]+]], L..C[[TL_E]]@l([[HI]])
+; CHECK-SMALL32: lwz [[SCRATCH:[0-9]+]], L..C[[TL_E:[0-9]+]](2)
+; CHECK-LARGE64: ld [[SCRATCH:[0-9]+]], L..C[[TL_E]]@l([[HI]])
+; CHECK-SMALL64: ld [[SCRATCH:[0-9]+]], L..C[[TL_E:[0-9]+]](2)
+; CHECK: lwz 3, 0([[SCRATCH]])
+; CHECK: blr
+
+define i32 @F() {
+entry:
+ %0 = load i32, ptr @f, align 4
+ ret i32 %0
+}
+; CHECK-LARGE: addis [[HI:[0-9]+]], L..C[[TL_F:[0-9]+]]@u(2)
+; CHECK-LARGE32: lwz [[SCRATCH:[0-9]+]], L..C[[TL_F]]@l([[HI]])
+; CHECK-SMALL32: lwz [[SCRATCH:[0-9]+]], L..C[[TL_F:[0-9]+]](2)
+; CHECK-LARGE64: ld [[SCRATCH:[0-9]+]], L..C[[TL_F]]@l([[HI]])
+; CHECK-SMALL64: ld [[SCRATCH:[0-9]+]], L..C[[TL_F:[0-9]+]](2)
+; CHECK: lwz 3, 0([[SCRATCH]])
+; CHECK: blr
+
+define noundef nonnull ptr @addr_a() local_unnamed_addr {
+entry:
+ ret ptr @a
+}
+; CHECK32: lwz 3, L..C[[TL_A]](2) # @a
+; CHECK64: ld 3, L..C[[TL_A]](2) # @a
+; CHECK: blr
+
+define noundef nonnull ptr @addr_b() local_unnamed_addr {
+entry:
+ ret ptr @b
+}
+; CHECK: addis [[HI:[0-9]+]], L..C[[TL_B]]@u(2)
+; CHECK32: lwz 3, L..C[[TL_B]]@l([[HI]])
+; CHECK64: ld 3, L..C[[TL_B]]@l([[HI]])
+; CHECK: blr
+
+
+define noundef nonnull ptr @addr_c() local_unnamed_addr {
+entry:
+ ret ptr @c
+}
+; CHECK32: lwz 3, L..C[[TL_C]](2) # @c
+; CHECK64: ld 3, L..C[[TL_C]](2) # @c
+; CHECK: blr
+
+define noundef nonnull ptr @addr_d() local_unnamed_addr {
+entry:
+ ret ptr @d
+}
+; CHECK: addis [[HI:[0-9]+]], L..C[[TL_D]]@u(2)
+; CHECK32: lwz 3, L..C[[TL_D]]@l([[HI]])
+; CHECK64: ld 3, L..C[[TL_D]]@l([[HI]])
+; CHECK: blr
+
+define i32 @G() {
+ %tmp = load i32, ptr @al
+ ret i32 %tmp
+}
+; CHECK: addis [[HI:[0-9]+]], L..C[[TL_AL:[0-9]+]]@u(2)
+; CHECK32: lwz [[ADDR:[0-9]+]], L..C[[TL_AL]]@l([[HI]])
+; CHECK64: ld [[ADDR:[0-9]+]], L..C[[TL_AL]]@l([[HI]])
+; CHECK: lwz 3, 0([[ADDR]])
+
+define i32 @H() {
+ %tmp = load i32, ptr @as
+ ret i32 %tmp
+}
+; CHECK32: lwz [[ADDR:[0-9]+]], L..C[[TL_AS:[0-9]+]](2)
+; CHECK64: ld [[ADDR:[0-9]+]], L..C[[TL_AS:[0-9]+]](2)
+; CHECK: lwz 3, 0([[ADDR]])
+
+;; Check TOC entires have correct storage mapping class
+; CHECK: L..C[[TL_A]]:
+; CHECK: .tc a[TC],a[UA]
+; CHECK: L..C[[TL_B]]:
+; CHECK: .tc b[TE],b[UA]
+; CHECK: L..C[[TL_C]]:
+; CHECK: .tc c[TC],c[RW]
+; CHECK: L..C[[TL_D]]:
+; CHECK: .tc d[TE],d[RW]
+; CHECK: L..C[[TL_E]]:
+; CHECK-SMALL: .tc e[TC],e[UA]
+; CHECK-LARGE: .tc e[TE],e[UA]
+; CHECK: L..C[[TL_F]]:
+; CHECK-SMALL: .tc f[TC],f[RW]
+; CHECK-LARGE: .tc f[TE],f[RW]
+; CHECK: L..C[[TL_AL]]:
+; CHECK: .tc al[TE],al
+; CHECK: L..C[[TL_AS]]:
+; CHECK: .tc as[TC],as
More information about the llvm-commits
mailing list