[llvm] e61e260 - [InstCombine] Fold `mul (sext bool X), Y` into `select X, -Y, 0` (#84792)
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Fri Mar 15 01:08:50 PDT 2024
Author: SahilPatidar
Date: 2024-03-15T16:08:46+08:00
New Revision: e61e26091c5088b32b68e020cd51ab6de972004f
URL: https://github.com/llvm/llvm-project/commit/e61e26091c5088b32b68e020cd51ab6de972004f
DIFF: https://github.com/llvm/llvm-project/commit/e61e26091c5088b32b68e020cd51ab6de972004f.diff
LOG: [InstCombine] Fold `mul (sext bool X), Y` into `select X, -Y, 0` (#84792)
Alive2: https://alive2.llvm.org/ce/z/n_ns-W
Resolve #84608
Added:
Modified:
llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
llvm/test/Transforms/InstCombine/mul.ll
llvm/test/Transforms/InstCombine/sub-xor-cmp.ll
Removed:
################################################################################
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
index 7be7923175e497..9d4c271f990d19 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
@@ -448,6 +448,14 @@ Instruction *InstCombinerImpl::visitMul(BinaryOperator &I) {
if (match(Op1, m_ZExt(m_Value(X))) && X->getType()->isIntOrIntVectorTy(1))
return SelectInst::Create(X, Op0, ConstantInt::getNullValue(Ty));
+ // mul (sext X), Y -> select X, -Y, 0
+ // mul Y, (sext X) -> select X, -Y, 0
+ if (match(&I, m_c_Mul(m_OneUse(m_SExt(m_Value(X))), m_Value(Y))) &&
+ X->getType()->isIntOrIntVectorTy(1))
+ return SelectInst::Create(
+ X, Builder.CreateNeg(Y, "", /*HasNUW=*/false, I.hasNoSignedWrap()),
+ ConstantInt::getNullValue(Op0->getType()));
+
Constant *ImmC;
if (match(Op1, m_ImmConstant(ImmC))) {
// (sext bool X) * C --> X ? -C : 0
diff --git a/llvm/test/Transforms/InstCombine/mul.ll b/llvm/test/Transforms/InstCombine/mul.ll
index e7141d7c25ad21..a176d16f2cdfb6 100644
--- a/llvm/test/Transforms/InstCombine/mul.ll
+++ b/llvm/test/Transforms/InstCombine/mul.ll
@@ -2049,3 +2049,94 @@ define i32 @zext_negpow2_use(i8 %x) {
%r = mul i32 %zx, -16777216 ; -1 << 24
ret i32 %r
}
+
+define i32 @mul_sext_icmp_with_zero(i32 %x) {
+; CHECK-LABEL: @mul_sext_icmp_with_zero(
+; CHECK-NEXT: ret i32 0
+;
+ %cmp = icmp eq i32 %x, 0
+ %sext = sext i1 %cmp to i32
+ %mul = mul i32 %sext, %x
+ ret i32 %mul
+}
+
+define i32 @test_mul_sext_bool(i1 %x, i32 %y) {
+; CHECK-LABEL: @test_mul_sext_bool(
+; CHECK-NEXT: [[Y_NEG:%.*]] = sub i32 0, [[Y:%.*]]
+; CHECK-NEXT: [[MUL:%.*]] = select i1 [[X:%.*]], i32 [[Y_NEG]], i32 0
+; CHECK-NEXT: ret i32 [[MUL]]
+;
+ %sext = sext i1 %x to i32
+ %mul = mul i32 %sext, %y
+ ret i32 %mul
+}
+
+define i32 @test_mul_sext_bool_nuw(i1 %x, i32 %y) {
+; CHECK-LABEL: @test_mul_sext_bool_nuw(
+; CHECK-NEXT: [[Y_NEG:%.*]] = sub i32 0, [[Y:%.*]]
+; CHECK-NEXT: [[MUL:%.*]] = select i1 [[X:%.*]], i32 [[Y_NEG]], i32 0
+; CHECK-NEXT: ret i32 [[MUL]]
+;
+ %sext = sext i1 %x to i32
+ %mul = mul nuw i32 %sext, %y
+ ret i32 %mul
+}
+
+define i32 @test_mul_sext_bool_nsw(i1 %x, i32 %y) {
+; CHECK-LABEL: @test_mul_sext_bool_nsw(
+; CHECK-NEXT: [[Y_NEG:%.*]] = sub nsw i32 0, [[Y:%.*]]
+; CHECK-NEXT: [[MUL:%.*]] = select i1 [[X:%.*]], i32 [[Y_NEG]], i32 0
+; CHECK-NEXT: ret i32 [[MUL]]
+;
+ %sext = sext i1 %x to i32
+ %mul = mul nsw i32 %sext, %y
+ ret i32 %mul
+}
+
+define i32 @test_mul_sext_bool_nuw_nsw(i1 %x, i32 %y) {
+; CHECK-LABEL: @test_mul_sext_bool_nuw_nsw(
+; CHECK-NEXT: [[Y_NEG:%.*]] = sub nsw i32 0, [[Y:%.*]]
+; CHECK-NEXT: [[MUL:%.*]] = select i1 [[X:%.*]], i32 [[Y_NEG]], i32 0
+; CHECK-NEXT: ret i32 [[MUL]]
+;
+ %sext = sext i1 %x to i32
+ %mul = mul nuw nsw i32 %sext, %y
+ ret i32 %mul
+}
+
+define i32 @test_mul_sext_bool_commuted(i1 %x, i32 %y) {
+; CHECK-LABEL: @test_mul_sext_bool_commuted(
+; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[Y:%.*]], -2
+; CHECK-NEXT: [[YY_NEG1:%.*]] = add i32 [[TMP1]], 1
+; CHECK-NEXT: [[MUL:%.*]] = select i1 [[X:%.*]], i32 [[YY_NEG1]], i32 0
+; CHECK-NEXT: ret i32 [[MUL]]
+;
+ %yy = xor i32 %y, 1
+ %sext = sext i1 %x to i32
+ %mul = mul i32 %yy, %sext
+ ret i32 %mul
+}
+
+define i32 @test_mul_sext_nonbool(i2 %x, i32 %y) {
+; CHECK-LABEL: @test_mul_sext_nonbool(
+; CHECK-NEXT: [[SEXT:%.*]] = sext i2 [[X:%.*]] to i32
+; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[SEXT]], [[Y:%.*]]
+; CHECK-NEXT: ret i32 [[MUL]]
+;
+ %sext = sext i2 %x to i32
+ %mul = mul i32 %sext, %y
+ ret i32 %mul
+}
+
+define i32 @test_mul_sext_multiuse(i1 %x, i32 %y) {
+; CHECK-LABEL: @test_mul_sext_multiuse(
+; CHECK-NEXT: [[SEXT:%.*]] = sext i1 [[X:%.*]] to i32
+; CHECK-NEXT: tail call void @use(i32 [[SEXT]])
+; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[SEXT]], [[Y:%.*]]
+; CHECK-NEXT: ret i32 [[MUL]]
+;
+ %sext = sext i1 %x to i32
+ tail call void @use(i32 %sext)
+ %mul = mul i32 %sext, %y
+ ret i32 %mul
+}
diff --git a/llvm/test/Transforms/InstCombine/sub-xor-cmp.ll b/llvm/test/Transforms/InstCombine/sub-xor-cmp.ll
index 2e1ff0a21a3def..461c9b0fb1e0c0 100644
--- a/llvm/test/Transforms/InstCombine/sub-xor-cmp.ll
+++ b/llvm/test/Transforms/InstCombine/sub-xor-cmp.ll
@@ -117,11 +117,9 @@ define i64 @sext_
diff _i1_xor_sub_1(i64 %a, i1 %b, i1 %c) {
define i64 @sext_multi_uses(i64 %a, i1 %b, i64 %x) {
; CHECK-LABEL: define i64 @sext_multi_uses(
; CHECK-SAME: i64 [[A:%.*]], i1 [[B:%.*]], i64 [[X:%.*]]) {
-; CHECK-NEXT: [[C:%.*]] = sext i1 [[B]] to i64
-; CHECK-NEXT: [[TMP1:%.*]] = sub i64 0, [[A]]
-; CHECK-NEXT: [[E:%.*]] = select i1 [[B]], i64 [[TMP1]], i64 [[A]]
-; CHECK-NEXT: [[F:%.*]] = mul i64 [[C]], [[X]]
-; CHECK-NEXT: [[R:%.*]] = add i64 [[F]], [[E]]
+; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[X]], [[A]]
+; CHECK-NEXT: [[TMP2:%.*]] = sub i64 0, [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[B]], i64 [[TMP2]], i64 [[A]]
; CHECK-NEXT: ret i64 [[R]]
;
%c = sext i1 %b to i64
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