[llvm] [RISCV] Use 'riscv-isa' module flag to set ELF flags and attributes. (PR #85155)

[Alex Bradbury via llvm-commits]

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@@ -385,8 +385,32 @@ void RISCVAsmPrinter::emitStartOfAsmFile(Module &M) {
   if (const MDString *ModuleTargetABI =
           dyn_cast_or_null<MDString>(M.getModuleFlag("target-abi")))
     RTS.setTargetABI(RISCVABI::getTargetABI(ModuleTargetABI->getString()));
+
+  MCSubtargetInfo SubtargetInfo = *TM.getMCSubtargetInfo();
+
+  // Use module flag to update feature bits.
+  if (auto *MD = dyn_cast_or_null<MDNode>(M.getModuleFlag("riscv-isa"))) {
+    for (auto &ISA : MD->operands()) {
+      if (auto *ISAString = dyn_cast_or_null<MDString>(ISA)) {
+        auto ParseResult = llvm::RISCVISAInfo::parseArchString(
+            ISAString->getString(), /*EnableExperimentalExtension=*/true,
+            /*ExperimentalExtensionVersionCheck=*/true);
+        if (!errorToBool(ParseResult.takeError())) {
+          auto &ISAInfo = *ParseResult;
+          for (const auto &Feature : RISCVFeatureKV) {
+            if (ISAInfo->hasExtension(Feature.Key) &&
----------------
asb wrote:

The consensus from the sync-up call was I think that:
* This patch shouldn't be blocked on adding additional error checking for incompatible combinations. We'd previously identified warnings for this to be nice to have, but non-essential.
* There's quite a lot of subtlety about what errors and the potential impact it has - in fact it seems we currently error when combining objects with D and Zdinx and arguably shouldn't. This probably deserves more testing and discussion, but separately to this patch.

https://github.com/llvm/llvm-project/pull/85155