[llvm] [DAG] Matched FixedWidth pattern for ISD::AVGFLOORU (PR #84903)

Shourya Goel via llvm-commits llvm-commits at lists.llvm.org
Thu Mar 14 09:28:36 PDT 2024


================
@@ -859,6 +859,36 @@ define <4 x i32> @urhadd_v4i32(<4 x i32> %x) {
   ret <4 x i32> %r
 }
 
+define i4 @uhadd_fixedwidth_i4(i4 %a0, i4 %a1)  {
+; CHECK-LABEL: uhadd_fixedwidth_i4:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    eor w8, w0, w1
+; CHECK-NEXT:    and w9, w0, w1
+; CHECK-NEXT:    and w8, w8, #0xe
+; CHECK-NEXT:    add w0, w9, w8, lsr #1
+; CHECK-NEXT:    ret
+  %and = and i4 %a0, %a1
+  %xor = xor i4 %a0, %a1
+  %srl = lshr i4 %xor, 1
+  %res = add i4 %and, %srl
+  ret i4 %res
+}
+
+define <4 x i32> @uhadd_fixedwidth_v4i32(<4 x i32> %a0, <4 x i32> %a1)  {
+; CHECK-LABEL: uhadd_fixedwidth_v4i32:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    and v2.16b, v0.16b, v1.16b
+; CHECK-NEXT:    eor v0.16b, v0.16b, v1.16b
+; CHECK-NEXT:    usra v2.4s, v0.4s, #1
+; CHECK-NEXT:    mov v0.16b, v2.16b
----------------
Sh0g0-1758 wrote:

Ah, I wrote the correct check assertions manually now with the original value type and the checks are passing now. 

https://github.com/llvm/llvm-project/pull/84903


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