[llvm] [ValueTracking] Allow tracking values through Integral AddrSpaceCasts (PR #70483)

[Jeffrey Byrnes via llvm-commits]

jrbyrnes wrote:

The only targets with data-layout defined address spaces are:
1. AVR (function address space)
2. WebAssembly
3. AMDGPU
4. X86
5. NVPTX

- AVR addrspacecasts are noops https://github.com/llvm/llvm-project/blob/26bd3d0f9a5a518de02f4dc1921648cda54a0d4e/llvm/lib/Target/AVR/AVRTargetMachine.h#L51 so this analysis is correct

- WebAssembly address spaces are non-integral https://github.com/llvm/llvm-project/blob/26bd3d0f9a5a518de02f4dc1921648cda54a0d4e/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp#L122 so this isnt relevant

- AMDGPU addrspace semantics https://github.com/llvm/llvm-project/blob/26bd3d0f9a5a518de02f4dc1921648cda54a0d4e/llvm/lib/Target/AMDGPU/SIISelLowering.cpp#L6741 are consistent with this analysis.

- X86 addrspacecast semantics are consisntent with this anlysis

- NVPTX uses specific isntructions for addrspacecasts, but these are consistent with this analysis (thanks @arsenm  ).


There are a few other targets with addrspace handling / test coverage.
1. SPIRV
2. XCore
3. AArch64
4. Mips
5. PowerPC
6. ARN
7. DirectX
8. RISCV

Of these, only DirectX, XCore and SPIRV have non-noop addrspacecasts. In particular, I'm not sure about DirectX and XCore; I can only assume that integral addrspacecasts on these targets match the valuetracking logic.

I have added tests for relevant targets.

https://github.com/llvm/llvm-project/pull/70483