[clang] [llvm] [RISC-V] Add CSR read/write builtins (PR #85091)

[Jessica Clarke via llvm-commits]

jrtc27 wrote:

I have always been unconvinced that these are a good idea to have / add significant value over using inline assembly. IIRC Arm has them but nobody uses them?

https://github.com/llvm/llvm-project/pull/85091