[clang] [llvm] [RISC-V] Add CSR read/write builtins (PR #85091)

Jessica Clarke via llvm-commits llvm-commits at lists.llvm.org
Wed Mar 13 12:18:57 PDT 2024


jrtc27 wrote:

I have always been unconvinced that these are a good idea to have / add significant value over using inline assembly. IIRC Arm has them but nobody uses them?

https://github.com/llvm/llvm-project/pull/85091


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