[clang] [llvm] [RISC-V] Add CSR read/write builtins (PR #85091)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 13 11:25:31 PDT 2024
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@@ -74,6 +74,21 @@ let TargetPrefix = "riscv" in {
} // TargetPrefix = "riscv"
+let TargetPrefix = "riscv" in {
+ // Zicsr
+ def int_riscv_csrr :
+ DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_i32_ty],
+ [IntrNoMem, IntrHasSideEffects, ImmArg<ArgIndex<0>>]>;
+ def int_riscv_csrr64 :
+ DefaultAttrsIntrinsic<[llvm_i64_ty], [llvm_i64_ty],
+ [IntrNoMem, IntrHasSideEffects, ImmArg<ArgIndex<0>>]>;
+ def int_riscv_csrw :
+ DefaultAttrsIntrinsic<[], [llvm_i32_ty, llvm_i32_ty],
+ [IntrNoMem, IntrHasSideEffects, ImmArg<ArgIndex<0>>]>;
+ def int_riscv_csrw64 :
+ DefaultAttrsIntrinsic<[], [llvm_i64_ty, llvm_i64_ty],
+ [IntrNoMem, IntrHasSideEffects, ImmArg<ArgIndex<0>>]>;
+} // TargetPrefix = "riscv"
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topperc wrote:
What about CSR swap?
https://github.com/llvm/llvm-project/pull/85091
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