[llvm] [X86] matchAddressRecursively - move ZERO_EXTEND patterns into matchIndexRecursively (PR #85081)

[Simon Pilgrim via llvm-commits]

================
@@ -2859,9 +2872,14 @@ bool X86DAGToDAGISel::selectVectorAddr(MemSDNode *Parent, SDValue BasePtr,
 
   // Attempt to match index patterns, as long as we're not relying on implicit
   // sign-extension, which is performed BEFORE scale.
-  if (IndexOp.getScalarValueSizeInBits() == BasePtr.getScalarValueSizeInBits())
-    AM.IndexReg = matchIndexRecursively(IndexOp, AM, 0);
-  else
+  if (IndexOp.getScalarValueSizeInBits() ==
+      BasePtr.getScalarValueSizeInBits()) {
+    auto ret_val = matchIndexRecursively(IndexOp, AM, 0);
+    if (ret_val)
+      AM.IndexReg = ret_val.value();
+    else
+      AM.IndexReg = IndexOp;
----------------
RKSimon wrote:

```
AM.IndexReg = matchIndexRecursively(IndexOp, AM, 0).value_or(IndexOp);
```

https://github.com/llvm/llvm-project/pull/85081