[llvm] [X86] Support APX CMOV/CFCMOV instructions (PR #82592)

via llvm-commits llvm-commits at lists.llvm.org
Tue Mar 12 21:55:58 PDT 2024


https://github.com/XinWang10 updated https://github.com/llvm/llvm-project/pull/82592

>From 5e2d5279f25748422dab6f625f428c6db200898a Mon Sep 17 00:00:00 2001
From: "Wang, Xin10" <xin10.wang at intel.com>
Date: Tue, 20 Feb 2024 22:53:50 -0800
Subject: [PATCH 01/10] [X86] Support APX CMOV/CFCMOV instructions

---
 .../lib/Target/X86/AsmParser/X86AsmParser.cpp |   2 +-
 .../lib/Target/X86/MCTargetDesc/X86BaseInfo.h |  11 +
 .../X86/MCTargetDesc/X86InstPrinterCommon.cpp |   2 +-
 .../X86/MCTargetDesc/X86MCCodeEmitter.cpp     |  27 +
 llvm/lib/Target/X86/X86InstrAsmAlias.td       |  71 ++
 llvm/lib/Target/X86/X86InstrCMovSetCC.td      | 122 ++-
 llvm/lib/Target/X86/X86InstrFormats.td        |   2 +
 llvm/lib/Target/X86/X86InstrInfo.cpp          |  23 +-
 llvm/lib/Target/X86/X86InstrInfo.h            |   3 +-
 llvm/lib/Target/X86/X86InstrPredicates.td     |   1 +
 llvm/test/CodeGen/X86/apx/add.ll              |  90 +-
 llvm/test/CodeGen/X86/apx/cfcmov.ll           |  94 ++
 llvm/test/CodeGen/X86/apx/inc.ll              |  24 +-
 llvm/test/CodeGen/X86/apx/shift-eflags.ll     |  22 +-
 llvm/test/CodeGen/X86/apx/sub.ll              |  80 +-
 llvm/test/CodeGen/X86/cmov.ll                 | 139 +++
 llvm/test/CodeGen/X86/cmp.ll                  |  13 +-
 llvm/test/MC/Disassembler/X86/apx/cfcmov.txt  | 962 ++++++++++++++++++
 llvm/test/MC/Disassembler/X86/apx/cmov.txt    | 386 +++++++
 llvm/test/MC/X86/apx/cfcmov-att.s             | 725 +++++++++++++
 llvm/test/MC/X86/apx/cfcmov-intel.s           | 722 +++++++++++++
 llvm/test/MC/X86/apx/cmov-att.s               | 293 ++++++
 llvm/test/MC/X86/apx/cmov-intel.s             | 290 ++++++
 llvm/test/TableGen/x86-fold-tables.inc        |   3 +
 llvm/utils/TableGen/X86ManualFoldTables.def   |   7 +
 llvm/utils/TableGen/X86RecognizableInstr.cpp  |  25 +-
 llvm/utils/TableGen/X86RecognizableInstr.h    |   2 +
 27 files changed, 3970 insertions(+), 171 deletions(-)
 create mode 100644 llvm/test/CodeGen/X86/apx/cfcmov.ll
 create mode 100644 llvm/test/MC/Disassembler/X86/apx/cfcmov.txt
 create mode 100644 llvm/test/MC/Disassembler/X86/apx/cmov.txt
 create mode 100644 llvm/test/MC/X86/apx/cfcmov-att.s
 create mode 100644 llvm/test/MC/X86/apx/cfcmov-intel.s
 create mode 100644 llvm/test/MC/X86/apx/cmov-att.s
 create mode 100644 llvm/test/MC/X86/apx/cmov-intel.s

diff --git a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
index e3701d69934c08..777b188288472a 100644
--- a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -4068,7 +4068,7 @@ unsigned X86AsmParser::checkTargetMatchPredicate(MCInst &Inst) {
 
   if (UseApxExtendedReg && !X86II::canUseApxExtendedReg(MCID))
     return Match_Unsupported;
-  if (ForcedNoFlag != !!(MCID.TSFlags & X86II::EVEX_NF))
+  if (ForcedNoFlag != !!(MCID.TSFlags & X86II::EVEX_NF) && !X86::isCFCMOVCC(Opc))
     return Match_Unsupported;
 
   if (ForcedVEXEncoding == VEXEncoding_EVEX &&
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
index 65b8ebc0b9b994..f8fa05eb9642d0 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
@@ -545,6 +545,14 @@ enum : uint64_t {
   /// PrefixByte - This form is used for instructions that represent a prefix
   /// byte like data16 or rep.
   PrefixByte = 10,
+  /// MRMDestRegCC - This form is used for the cfcmov instructions, which use
+  /// the Mod/RM byte to specify the operands reg(r/m) and reg(reg) and also
+  /// encodes a condition code.
+  MRMDestRegCC = 18,
+  /// MRMDestMemCC - This form is used for the cfcmov instructions, which use
+  /// the Mod/RM byte to specify the operands mem(r/m) and reg(reg) and also
+  /// encodes a condition code.
+  MRMDestMemCC = 19,
   /// MRMDestMem4VOp3CC - This form is used for instructions that use the Mod/RM
   /// byte to specify a destination which in this case is memory and operand 3
   /// with VEX.VVVV, and also encodes a condition code.
@@ -1032,6 +1040,7 @@ inline int getMemoryOperandNo(uint64_t TSFlags) {
     return -1;
   case X86II::MRMDestMem:
   case X86II::MRMDestMemFSIB:
+  case X86II::MRMDestMemCC:
     return hasNewDataDest(TSFlags);
   case X86II::MRMSrcMem:
   case X86II::MRMSrcMemFSIB:
@@ -1045,11 +1054,13 @@ inline int getMemoryOperandNo(uint64_t TSFlags) {
     // Skip registers encoded in reg, VEX_VVVV, and I8IMM.
     return 3;
   case X86II::MRMSrcMemCC:
+    return 1 + HasVEX_4V;
   case X86II::MRMDestMem4VOp3CC:
     // Start from 1, skip any registers encoded in VEX_VVVV or I8IMM, or a
     // mask register.
     return 1;
   case X86II::MRMDestReg:
+  case X86II::MRMDestRegCC:
   case X86II::MRMSrcReg:
   case X86II::MRMSrcReg4VOp3:
   case X86II::MRMSrcRegOp4:
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
index 29a1866bf01ab0..21c1556d1d8ed2 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
@@ -394,7 +394,7 @@ void X86InstPrinterCommon::printInstFlags(const MCInst *MI, raw_ostream &O,
   else if (Flags & X86::IP_HAS_REPEAT)
     O << "\trep\t";
 
-  if (TSFlags & X86II::EVEX_NF)
+  if (TSFlags & X86II::EVEX_NF && !X86::isCFCMOVCC(MI->getOpcode()))
     O << "\t{nf}";
 
   // These all require a pseudo prefix
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
index dcd0551b7b7653..9820f071029be9 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
@@ -1071,6 +1071,7 @@ X86MCCodeEmitter::emitVEXOpcodePrefix(int MemOperand, const MCInst &MI,
   case X86II::MRM_C0:
   case X86II::RawFrm:
     break;
+  case X86II::MRMDestMemCC:
   case X86II::MRMDestMemFSIB:
   case X86II::MRMDestMem: {
     // MRMDestMem instructions forms:
@@ -1102,6 +1103,7 @@ X86MCCodeEmitter::emitVEXOpcodePrefix(int MemOperand, const MCInst &MI,
     }
     break;
   }
+  case X86II::MRMSrcMemCC:
   case X86II::MRMSrcMemFSIB:
   case X86II::MRMSrcMem: {
     // MRMSrcMem instructions forms:
@@ -1180,6 +1182,7 @@ X86MCCodeEmitter::emitVEXOpcodePrefix(int MemOperand, const MCInst &MI,
     }
     break;
   }
+  case X86II::MRMSrcRegCC:
   case X86II::MRMSrcReg: {
     // MRMSrcReg instructions forms:
     //  dst(ModR/M), src1(VEX_4V), src2(ModR/M), src3(Imm[7:4])
@@ -1242,6 +1245,7 @@ X86MCCodeEmitter::emitVEXOpcodePrefix(int MemOperand, const MCInst &MI,
     ++CurOp;
     break;
   }
+  case X86II::MRMDestRegCC:
   case X86II::MRMDestReg: {
     // MRMDestReg instructions forms:
     //  dst(ModR/M), src(ModR/M)
@@ -1638,6 +1642,15 @@ void X86MCCodeEmitter::encodeInstruction(const MCInst &MI,
     CurOp = SrcRegNum + 1;
     break;
   }
+  case X86II::MRMDestRegCC: {
+    unsigned FirstOp = CurOp++;
+    unsigned SecondOp = CurOp++;
+    unsigned CC = MI.getOperand(CurOp++).getImm();
+    emitByte(BaseOpcode + CC, CB);
+    emitRegModRMByte(MI.getOperand(FirstOp),
+                     getX86RegNum(MI.getOperand(SecondOp)), CB);
+    break;
+  }
   case X86II::MRMDestMem4VOp3CC: {
     unsigned CC = MI.getOperand(8).getImm();
     emitByte(BaseOpcode + CC, CB);
@@ -1667,6 +1680,16 @@ void X86MCCodeEmitter::encodeInstruction(const MCInst &MI,
     CurOp = SrcRegNum + 1;
     break;
   }
+  case X86II::MRMDestMemCC: {
+    unsigned MemOp = CurOp;
+    CurOp = MemOp + X86::AddrNumOperands;
+    unsigned RegOp = CurOp++;
+    unsigned CC = MI.getOperand(CurOp++).getImm();
+    emitByte(BaseOpcode + CC, CB);
+    emitMemModRMByte(MI, MemOp, getX86RegNum(MI.getOperand(RegOp)),
+                     TSFlags, Kind, StartByte, CB, Fixups, STI);
+    break;
+  }
   case X86II::MRMSrcReg: {
     emitByte(BaseOpcode, CB);
     unsigned SrcRegNum = CurOp + 1;
@@ -1717,6 +1740,8 @@ void X86MCCodeEmitter::encodeInstruction(const MCInst &MI,
     break;
   }
   case X86II::MRMSrcRegCC: {
+    if (IsND)
+      ++CurOp;
     unsigned FirstOp = CurOp++;
     unsigned SecondOp = CurOp++;
 
@@ -1778,6 +1803,8 @@ void X86MCCodeEmitter::encodeInstruction(const MCInst &MI,
     break;
   }
   case X86II::MRMSrcMemCC: {
+    if (IsND)
+      ++CurOp;
     unsigned RegOp = CurOp++;
     unsigned FirstMemOp = CurOp;
     CurOp = FirstMemOp + X86::AddrNumOperands;
diff --git a/llvm/lib/Target/X86/X86InstrAsmAlias.td b/llvm/lib/Target/X86/X86InstrAsmAlias.td
index fab058dc390bb3..6b15213a2e6833 100644
--- a/llvm/lib/Target/X86/X86InstrAsmAlias.td
+++ b/llvm/lib/Target/X86/X86InstrAsmAlias.td
@@ -402,6 +402,12 @@ defm : IntegerCondCodeMnemonicAlias<"cmov", "q", "att">;
 // No size suffix for intel-style asm.
 defm : IntegerCondCodeMnemonicAlias<"cmov", "", "intel">;
 
+// Aliases for cfcmov<CC>{w,l,q}
+defm : IntegerCondCodeMnemonicAlias<"cfcmov", "w", "att">;
+defm : IntegerCondCodeMnemonicAlias<"cfcmov", "l", "att">;
+defm : IntegerCondCodeMnemonicAlias<"cfcmov", "q", "att">;
+// No size suffix for intel-style asm.
+defm : IntegerCondCodeMnemonicAlias<"cfcmov", "", "intel">;
 //===----------------------------------------------------------------------===//
 // Assembler Instruction Aliases
 //===----------------------------------------------------------------------===//
@@ -768,6 +774,20 @@ multiclass CMOV_SETCC_Aliases<string Cond, int CC> {
                   (CMOV64rr GR64:$dst, GR64:$src, CC), 0>;
   def : InstAlias<"cmov"#Cond#"{q}\t{$src, $dst|$dst, $src}",
                   (CMOV64rm GR64:$dst, i64mem:$src, CC), 0>;
+let Predicates = [In64BitMode] in {
+  def : InstAlias<"cmov"#Cond#"{w}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
+                  (CMOV16rr_ND GR16:$dst, GR16:$src1, GR16:$src2, CC), 0>;
+  def : InstAlias<"cmov"#Cond#"{w}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
+                  (CMOV16rm_ND GR16:$dst, GR16:$src1, i16mem:$src2, CC), 0>;
+  def : InstAlias<"cmov"#Cond#"{l}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
+                  (CMOV32rr_ND GR32:$dst, GR32:$src1, GR32:$src2, CC), 0>;
+  def : InstAlias<"cmov"#Cond#"{l}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
+                  (CMOV32rm_ND GR32:$dst, GR32:$src1, i32mem:$src2, CC), 0>;
+  def : InstAlias<"cmov"#Cond#"{q}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
+                  (CMOV64rr_ND GR64:$dst, GR64:$src1, GR64:$src2, CC), 0>;
+  def : InstAlias<"cmov"#Cond#"{q}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
+                  (CMOV64rm_ND GR64:$dst, GR64:$src1, i64mem:$src2, CC), 0>;
+}
 
   def : InstAlias<"set"#Cond#"\t$dst", (SETCCr GR8:$dst, CC), 0>;
   def : InstAlias<"set"#Cond#"\t$dst", (SETCCm i8mem:$dst, CC), 0>;
@@ -790,6 +810,57 @@ defm : CMOV_SETCC_Aliases<"ge", 13>;
 defm : CMOV_SETCC_Aliases<"le", 14>;
 defm : CMOV_SETCC_Aliases<"g" , 15>;
 
+multiclass CFCMOV_Aliases<string Cond, int CC> {
+let Predicates = [In64BitMode] in {
+  def : InstAlias<"cfcmov"#Cond#"{w}\t{$src, $dst|$dst, $src}",
+                  (CFCMOV16rr GR16:$dst, GR16:$src, CC), 0>;
+  def : InstAlias<"cfcmov"#Cond#"{l}\t{$src, $dst|$dst, $src}",
+                  (CFCMOV32rr GR32:$dst, GR32:$src, CC), 0>;
+  def : InstAlias<"cfcmov"#Cond#"{q}\t{$src, $dst|$dst, $src}",
+                  (CFCMOV64rr GR64:$dst, GR64:$src, CC), 0>;
+  def : InstAlias<"cfcmov"#Cond#"{w}\t{$src, $dst|$dst, $src}",
+                  (CFCMOV16rm GR16:$dst, i16mem:$src, CC), 0>;
+  def : InstAlias<"cfcmov"#Cond#"{l}\t{$src, $dst|$dst, $src}",
+                  (CFCMOV32rm GR32:$dst, i32mem:$src, CC), 0>;
+  def : InstAlias<"cfcmov"#Cond#"{q}\t{$src, $dst|$dst, $src}",
+                  (CFCMOV64rm GR64:$dst, i64mem:$src, CC), 0>;
+  def : InstAlias<"cfcmov"#Cond#"{w}\t{$src, $dst|$dst, $src}",
+                  (CFCMOV16mr i16mem:$dst, GR16:$src, CC), 0>;
+  def : InstAlias<"cfcmov"#Cond#"{l}\t{$src, $dst|$dst, $src}",
+                  (CFCMOV32mr i32mem:$dst, GR32:$src, CC), 0>;
+  def : InstAlias<"cfcmov"#Cond#"{q}\t{$src, $dst|$dst, $src}",
+                  (CFCMOV64mr i64mem:$dst, GR64:$src, CC), 0>;
+  def : InstAlias<"cfcmov"#Cond#"{w}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
+                  (CFCMOV16rr_ND GR16:$dst, GR16:$src1, GR16:$src2, CC), 0>;
+  def : InstAlias<"cfcmov"#Cond#"{l}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
+                  (CFCMOV32rr_ND GR32:$dst, GR32:$src1, GR32:$src2, CC), 0>;
+  def : InstAlias<"cfcmov"#Cond#"{q}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
+                  (CFCMOV64rr_ND GR64:$dst, GR64:$src1, GR64:$src2, CC), 0>;
+  def : InstAlias<"cfcmov"#Cond#"{w}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
+                  (CFCMOV16rm_ND GR16:$dst, GR16:$src1, i16mem:$src2, CC), 0>;
+  def : InstAlias<"cfcmov"#Cond#"{l}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
+                  (CFCMOV32rm_ND GR32:$dst, GR32:$src1, i32mem:$src2, CC), 0>;
+  def : InstAlias<"cfcmov"#Cond#"{q}\t{$src2, $src1, $dst|$dst, $src1, $src2}",
+                  (CFCMOV64rm_ND GR64:$dst, GR64:$src1, i64mem:$src2, CC), 0>;
+}
+}
+defm : CFCMOV_Aliases<"o" ,  0>;
+defm : CFCMOV_Aliases<"no",  1>;
+defm : CFCMOV_Aliases<"b" ,  2>;
+defm : CFCMOV_Aliases<"ae",  3>;
+defm : CFCMOV_Aliases<"e" ,  4>;
+defm : CFCMOV_Aliases<"ne",  5>;
+defm : CFCMOV_Aliases<"be",  6>;
+defm : CFCMOV_Aliases<"a" ,  7>;
+defm : CFCMOV_Aliases<"s" ,  8>;
+defm : CFCMOV_Aliases<"ns",  9>;
+defm : CFCMOV_Aliases<"p" , 10>;
+defm : CFCMOV_Aliases<"np", 11>;
+defm : CFCMOV_Aliases<"l" , 12>;
+defm : CFCMOV_Aliases<"ge", 13>;
+defm : CFCMOV_Aliases<"le", 14>;
+defm : CFCMOV_Aliases<"g" , 15>;
+
 // Condition dump instructions Alias
 def : InstAlias<"jo\t$dst",  (JCC_1 brtarget8:$dst,  0), 0>;
 def : InstAlias<"jno\t$dst", (JCC_1 brtarget8:$dst,  1), 0>;
diff --git a/llvm/lib/Target/X86/X86InstrCMovSetCC.td b/llvm/lib/Target/X86/X86InstrCMovSetCC.td
index 2e31c05cd687d3..699014b29bae44 100644
--- a/llvm/lib/Target/X86/X86InstrCMovSetCC.td
+++ b/llvm/lib/Target/X86/X86InstrCMovSetCC.td
@@ -11,48 +11,73 @@
 //
 //===----------------------------------------------------------------------===//
 
-
 // CMOV instructions.
-let isCodeGenOnly = 1, ForceDisassemble = 1 in {
-let Uses = [EFLAGS], Predicates = [HasCMOV], Constraints = "$src1 = $dst",
-    isCommutable = 1, SchedRW = [WriteCMOV] in {
-  def CMOV16rr
-    : I<0x40, MRMSrcRegCC, (outs GR16:$dst), (ins GR16:$src1, GR16:$src2, ccode:$cond),
-        "cmov${cond}{w}\t{$src2, $dst|$dst, $src2}",
-        [(set GR16:$dst,
-              (X86cmov GR16:$src1, GR16:$src2, timm:$cond, EFLAGS))]>,
-              TB, OpSize16;
-  def CMOV32rr
-    : I<0x40, MRMSrcRegCC, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2, ccode:$cond),
-        "cmov${cond}{l}\t{$src2, $dst|$dst, $src2}",
-        [(set GR32:$dst,
-              (X86cmov GR32:$src1, GR32:$src2, timm:$cond, EFLAGS))]>,
-              TB, OpSize32;
-  def CMOV64rr
-    :RI<0x40, MRMSrcRegCC, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2, ccode:$cond),
-        "cmov${cond}{q}\t{$src2, $dst|$dst, $src2}",
-        [(set GR64:$dst,
-              (X86cmov GR64:$src1, GR64:$src2, timm:$cond, EFLAGS))]>, TB;
+multiclass Cmov<X86TypeInfo t, string args, bit ndd = 0, string suffix = ""> {
+let isCommutable = 1, SchedRW = [WriteCMOV] in
+  def rr#suffix : ITy<0x40, MRMSrcRegCC, t, (outs t.RegClass:$dst),
+                      (ins t.RegClass:$src1, t.RegClass:$src2, ccode:$cond),
+                      "cmov${cond}", args,
+                      [(set t.RegClass:$dst, (X86cmov t.RegClass:$src1,
+                                        t.RegClass:$src2, timm:$cond, EFLAGS))]>, UseEFLAGS, NDD<ndd>;
+let SchedRW = [WriteCMOV.Folded, WriteCMOV.ReadAfterFold] in
+  def rm#suffix : ITy<0x40, MRMSrcMemCC, t, (outs t.RegClass:$dst),
+                      (ins t.RegClass:$src1, t.MemOperand:$src2, ccode:$cond),
+                      "cmov${cond}", args,
+                      [(set t.RegClass:$dst, (X86cmov t.RegClass:$src1,
+                                    (t.LoadNode addr:$src2), timm:$cond, EFLAGS))]>, UseEFLAGS, NDD<ndd>;
 }
 
-let Uses = [EFLAGS], Predicates = [HasCMOV], Constraints = "$src1 = $dst",
-    SchedRW = [WriteCMOV.Folded, WriteCMOV.ReadAfterFold] in {
-  def CMOV16rm
-    : I<0x40, MRMSrcMemCC, (outs GR16:$dst), (ins GR16:$src1, i16mem:$src2, ccode:$cond),
-        "cmov${cond}{w}\t{$src2, $dst|$dst, $src2}",
-        [(set GR16:$dst, (X86cmov GR16:$src1, (loadi16 addr:$src2),
-                                  timm:$cond, EFLAGS))]>, TB, OpSize16;
-  def CMOV32rm
-    : I<0x40, MRMSrcMemCC, (outs GR32:$dst), (ins GR32:$src1, i32mem:$src2, ccode:$cond),
-        "cmov${cond}{l}\t{$src2, $dst|$dst, $src2}",
-        [(set GR32:$dst, (X86cmov GR32:$src1, (loadi32 addr:$src2),
-                                  timm:$cond, EFLAGS))]>, TB, OpSize32;
-  def CMOV64rm
-    :RI<0x40, MRMSrcMemCC, (outs GR64:$dst), (ins GR64:$src1, i64mem:$src2, ccode:$cond),
-        "cmov${cond}{q}\t{$src2, $dst|$dst, $src2}",
-        [(set GR64:$dst, (X86cmov GR64:$src1, (loadi64 addr:$src2),
-                                  timm:$cond, EFLAGS))]>, TB;
-} // Uses = [EFLAGS], Predicates = [HasCMOV], Constraints = "$src1 = $dst"
+multiclass Cfcmov<X86TypeInfo t> {
+let isCommutable = 1, SchedRW = [WriteCMOV] in {
+let Predicates = [HasCMOV, HasCF, In64BitMode] in {
+  def rr : ITy<0x40, MRMSrcRegCC, t, (outs t.RegClass:$dst),
+               (ins t.RegClass:$src1, ccode:$cond),
+               "cfcmov${cond}", unaryop_ndd_args,
+               [(set t.RegClass:$dst, (X86cmov 0,
+                                 t.RegClass:$src1, timm:$cond, EFLAGS))]>, UseEFLAGS, EVEX, T_MAP4;
+  def rr_REV : ITy<0x40, MRMDestRegCC, t, (outs t.RegClass:$dst),
+                   (ins t.RegClass:$src1, ccode:$cond),
+                   "cfcmov${cond}", unaryop_ndd_args, []>, UseEFLAGS, NF;
+}
+let Predicates = [HasCMOV, HasCF, HasNDD, In64BitMode] in
+  def rr_ND : ITy<0x40, MRMSrcRegCC, t, (outs t.RegClass:$dst),
+                  (ins t.RegClass:$src1, t.RegClass:$src2, ccode:$cond),
+                  "cfcmov${cond}", binop_ndd_args, []>, UseEFLAGS, NDD<1>, NF;  
+}
+let SchedRW = [WriteCMOV.Folded, WriteCMOV.ReadAfterFold] in {
+let Predicates = [HasCMOV, HasCF, In64BitMode] in {
+  let mayLoad = 1 in
+    def rm : ITy<0x40, MRMSrcMemCC, t, (outs t.RegClass:$dst),
+                 (ins t.MemOperand:$src1, ccode:$cond),
+                 "cfcmov${cond}", unaryop_ndd_args, []>, UseEFLAGS, EVEX, T_MAP4;
+  let mayStore = 1 in
+    def mr : ITy<0x40, MRMDestMemCC, t, (outs t.MemOperand:$dst),
+                 (ins t.RegClass:$src1, ccode:$cond),
+                 "cfcmov${cond}", unaryop_ndd_args, []>, UseEFLAGS, NF;
+}
+let Predicates = [HasCMOV, HasCF, HasNDD, In64BitMode], mayLoad = 1 in
+  def rm_ND : ITy<0x40, MRMSrcMemCC, t, (outs t.RegClass:$dst),
+                  (ins t.RegClass:$src1, t.MemOperand:$src2, ccode:$cond),
+                  "cfcmov${cond}", binop_ndd_args, []>, UseEFLAGS, NDD<1>, NF;
+}
+}
+
+let isCodeGenOnly = 1, ForceDisassemble = 1 in {
+  let Predicates = [HasCMOV, NoNDD], Constraints = "$dst = $src1" in {
+    defm CMOV16 : Cmov<Xi16, binop_args>, OpSize16, TB;
+    defm CMOV32 : Cmov<Xi32, binop_args>, OpSize32, TB;
+    defm CMOV64 : Cmov<Xi64, binop_args>, TB;
+  }
+
+  let Predicates = [HasCMOV, HasNDD, In64BitMode] in {
+    defm CMOV16 : Cmov<Xi16, binop_ndd_args, 1, "_ND">, PD;
+    defm CMOV32 : Cmov<Xi32, binop_ndd_args, 1, "_ND">;
+    defm CMOV64 : Cmov<Xi64, binop_ndd_args, 1, "_ND">;
+  }
+
+  defm CFCMOV16 : Cfcmov<Xi16>, PD;
+  defm CFCMOV32 : Cfcmov<Xi32>;
+  defm CFCMOV64 : Cfcmov<Xi64>;
 } // isCodeGenOnly = 1, ForceDisassemble = 1
 
 def inv_cond_XFORM : SDNodeXForm<imm, [{
@@ -63,7 +88,7 @@ def inv_cond_XFORM : SDNodeXForm<imm, [{
 
 // Conditional moves with folded loads with operands swapped and conditions
 // inverted.
-let Predicates = [HasCMOV] in {
+let Predicates = [HasCMOV, NoNDD] in {
   def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, timm:$cond, EFLAGS),
             (CMOV16rm GR16:$src2, addr:$src1, (inv_cond_XFORM timm:$cond))>;
   def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, timm:$cond, EFLAGS),
@@ -72,6 +97,23 @@ let Predicates = [HasCMOV] in {
             (CMOV64rm GR64:$src2, addr:$src1, (inv_cond_XFORM timm:$cond))>;
 }
 
+let Predicates = [HasCMOV, HasNDD] in {
+  def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, timm:$cond, EFLAGS),
+            (CMOV16rm_ND GR16:$src2, addr:$src1, (inv_cond_XFORM timm:$cond))>;
+  def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, timm:$cond, EFLAGS),
+            (CMOV32rm_ND GR32:$src2, addr:$src1, (inv_cond_XFORM timm:$cond))>;
+  def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, timm:$cond, EFLAGS),
+            (CMOV64rm_ND GR64:$src2, addr:$src1, (inv_cond_XFORM timm:$cond))>;
+}
+let Predicates = [HasCMOV, HasCF] in {
+  def : Pat<(X86cmov GR16:$src1, 0, timm:$cond, EFLAGS),
+            (CFCMOV16rr GR16:$src1, (inv_cond_XFORM timm:$cond))>;
+  def : Pat<(X86cmov GR32:$src1, 0, timm:$cond, EFLAGS),
+            (CFCMOV32rr GR32:$src1, (inv_cond_XFORM timm:$cond))>;
+  def : Pat<(X86cmov GR64:$src1, 0, timm:$cond, EFLAGS),
+            (CFCMOV64rr GR64:$src1, (inv_cond_XFORM timm:$cond))>;
+}
+
 // SetCC instructions.
 let Uses = [EFLAGS], isCodeGenOnly = 1, ForceDisassemble = 1 in {
   def SETCCr : I<0x90, MRMXrCC, (outs GR8:$dst), (ins ccode:$cond),
diff --git a/llvm/lib/Target/X86/X86InstrFormats.td b/llvm/lib/Target/X86/X86InstrFormats.td
index 13014293267b32..31ee288c6f8bb2 100644
--- a/llvm/lib/Target/X86/X86InstrFormats.td
+++ b/llvm/lib/Target/X86/X86InstrFormats.td
@@ -28,6 +28,8 @@ def RawFrmImm8    : Format<7>;
 def RawFrmImm16   : Format<8>;
 def AddCCFrm      : Format<9>;
 def PrefixByte    : Format<10>;
+def MRMDestRegCC  : Format<18>;
+def MRMDestMemCC  : Format<19>;
 def MRMDestMem4VOp3CC : Format<20>;
 def MRMr0          : Format<21>;
 def MRMSrcMemFSIB  : Format<22>;
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index b65f49527ae5dd..7ec35f7f526c3f 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -2639,7 +2639,10 @@ MachineInstr *X86InstrInfo::commuteInstructionImpl(MachineInstr &MI, bool NewMI,
     break;
   case X86::CMOV16rr:
   case X86::CMOV32rr:
-  case X86::CMOV64rr: {
+  case X86::CMOV64rr:
+  case X86::CMOV16rr_ND:
+  case X86::CMOV32rr_ND:
+  case X86::CMOV64rr_ND: {
     WorkingMI = CloneIfNew(MI);
     unsigned OpNo = MI.getDesc().getNumOperands() - 1;
     X86::CondCode CC = static_cast<X86::CondCode>(MI.getOperand(OpNo).getImm());
@@ -3120,7 +3123,8 @@ bool X86InstrInfo::hasCommutePreference(MachineInstr &MI, bool &Commute) const {
 
 int X86::getCondSrcNoFromDesc(const MCInstrDesc &MCID) {
   unsigned Opcode = MCID.getOpcode();
-  if (!(X86::isJCC(Opcode) || X86::isSETCC(Opcode) || X86::isCMOVCC(Opcode)))
+  if (!(X86::isJCC(Opcode) || X86::isSETCC(Opcode) || X86::isCMOVCC(Opcode) ||
+        X86::isCFCMOVCC(Opcode)))
     return -1;
   // Assume that condition code is always the last use operand.
   unsigned NumUses = MCID.getNumOperands() - MCID.getNumDefs();
@@ -3312,16 +3316,21 @@ X86::getX86ConditionCode(CmpInst::Predicate Predicate) {
 }
 
 /// Return a cmov opcode for the given register size in bytes, and operand type.
-unsigned X86::getCMovOpcode(unsigned RegBytes, bool HasMemoryOperand) {
+unsigned X86::getCMovOpcode(unsigned RegBytes, bool HasMemoryOperand,
+                            bool HasNDD) {
   switch (RegBytes) {
   default:
     llvm_unreachable("Illegal register size!");
+#define GET_ND_IF_ENABLED(OPC) (HasNDD ? OPC##_ND : OPC)
   case 2:
-    return HasMemoryOperand ? X86::CMOV16rm : X86::CMOV16rr;
+    return HasMemoryOperand ? GET_ND_IF_ENABLED(X86::CMOV16rm)
+                            : GET_ND_IF_ENABLED(X86::CMOV16rr);
   case 4:
-    return HasMemoryOperand ? X86::CMOV32rm : X86::CMOV32rr;
+    return HasMemoryOperand ? GET_ND_IF_ENABLED(X86::CMOV32rm)
+                            : GET_ND_IF_ENABLED(X86::CMOV32rr);
   case 8:
-    return HasMemoryOperand ? X86::CMOV64rm : X86::CMOV64rr;
+    return HasMemoryOperand ? GET_ND_IF_ENABLED(X86::CMOV64rm)
+                            : GET_ND_IF_ENABLED(X86::CMOV64rr);
   }
 }
 
@@ -4048,7 +4057,7 @@ void X86InstrInfo::insertSelect(MachineBasicBlock &MBB,
   const TargetRegisterClass &RC = *MRI.getRegClass(DstReg);
   assert(Cond.size() == 1 && "Invalid Cond array");
   unsigned Opc = X86::getCMovOpcode(TRI.getRegSizeInBits(RC) / 8,
-                                    false /*HasMemoryOperand*/);
+                                    false /*HasMemoryOperand*/, Subtarget.hasNDD());
   BuildMI(MBB, I, DL, get(Opc), DstReg)
       .addReg(FalseReg)
       .addReg(TrueReg)
diff --git a/llvm/lib/Target/X86/X86InstrInfo.h b/llvm/lib/Target/X86/X86InstrInfo.h
index 0e5fcbeda08f79..30f40264064d5b 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.h
+++ b/llvm/lib/Target/X86/X86InstrInfo.h
@@ -42,7 +42,8 @@ enum AsmComments {
 std::pair<CondCode, bool> getX86ConditionCode(CmpInst::Predicate Predicate);
 
 /// Return a cmov opcode for the given register size in bytes, and operand type.
-unsigned getCMovOpcode(unsigned RegBytes, bool HasMemoryOperand = false);
+unsigned getCMovOpcode(unsigned RegBytes, bool HasMemoryOperand = false,
+                       bool HasNDD = false);
 
 /// Return the source operand # for condition code by \p MCID. If the
 /// instruction doesn't have a condition code, return -1.
diff --git a/llvm/lib/Target/X86/X86InstrPredicates.td b/llvm/lib/Target/X86/X86InstrPredicates.td
index 7dd51ba6c027ae..123f5c0205e34b 100644
--- a/llvm/lib/Target/X86/X86InstrPredicates.td
+++ b/llvm/lib/Target/X86/X86InstrPredicates.td
@@ -45,6 +45,7 @@ def NoEGPR       : Predicate<"!Subtarget->hasEGPR()">;
 // entries, so that the NDD variant can be selected first to benefit RA.
 def HasNDD       : Predicate<"Subtarget->hasNDD()">;
 def NoNDD        : Predicate<"!Subtarget->hasNDD()">;
+def HasCF        : Predicate<"Subtarget->hasCF()">;
 def HasCMOV      : Predicate<"Subtarget->canUseCMOV()">;
 def NoCMOV       : Predicate<"!Subtarget->canUseCMOV()">;
 def HasNOPL      : Predicate<"Subtarget->hasNOPL()">;
diff --git a/llvm/test/CodeGen/X86/apx/add.ll b/llvm/test/CodeGen/X86/apx/add.ll
index cdb29a70770e4b..d3301ecdb72d0f 100644
--- a/llvm/test/CodeGen/X86/apx/add.ll
+++ b/llvm/test/CodeGen/X86/apx/add.ll
@@ -298,9 +298,9 @@ define i8 @addflag8rr(i8 noundef %a, i8 noundef %b) {
 ; CHECK-LABEL: addflag8rr:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    addb %sil, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x00,0xf7]
-; CHECK-NEXT:    movzbl %al, %ecx # encoding: [0x0f,0xb6,0xc8]
-; CHECK-NEXT:    movl $255, %eax # encoding: [0xb8,0xff,0x00,0x00,0x00]
-; CHECK-NEXT:    cmovael %ecx, %eax # encoding: [0x0f,0x43,0xc1]
+; CHECK-NEXT:    movzbl %al, %eax # encoding: [0x0f,0xb6,0xc0]
+; CHECK-NEXT:    movl $255, %ecx # encoding: [0xb9,0xff,0x00,0x00,0x00]
+; CHECK-NEXT:    cmovbl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x42,0xc1]
 ; CHECK-NEXT:    # kill: def $al killed $al killed $eax
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
@@ -311,10 +311,10 @@ entry:
 define i16 @addflag16rr(i16 noundef %a, i16 noundef %b) {
 ; CHECK-LABEL: addflag16rr:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    addw %si, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x01,0xf7]
-; CHECK-NEXT:    movl $65535, %eax # encoding: [0xb8,0xff,0xff,0x00,0x00]
+; CHECK-NEXT:    addw %si, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x01,0xf7]
+; CHECK-NEXT:    movl $65535, %ecx # encoding: [0xb9,0xff,0xff,0x00,0x00]
 ; CHECK-NEXT:    # imm = 0xFFFF
-; CHECK-NEXT:    cmovael %ecx, %eax # encoding: [0x0f,0x43,0xc1]
+; CHECK-NEXT:    cmovbl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x42,0xc1]
 ; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
@@ -325,9 +325,9 @@ entry:
 define i32 @addflag32rr(i32 noundef %a, i32 noundef %b) {
 ; CHECK-LABEL: addflag32rr:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    addl %esi, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x01,0xf7]
-; CHECK-NEXT:    movl $-1, %eax # encoding: [0xb8,0xff,0xff,0xff,0xff]
-; CHECK-NEXT:    cmovael %ecx, %eax # encoding: [0x0f,0x43,0xc1]
+; CHECK-NEXT:    addl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x01,0xf7]
+; CHECK-NEXT:    movl $-1, %ecx # encoding: [0xb9,0xff,0xff,0xff,0xff]
+; CHECK-NEXT:    cmovbl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x42,0xc1]
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
     %add = call i32 @llvm.uadd.sat.i32(i32 %a, i32 %b)
@@ -337,9 +337,9 @@ entry:
 define i64 @addflag64rr(i64 noundef %a, i64 noundef %b) {
 ; CHECK-LABEL: addflag64rr:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    addq %rsi, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x01,0xf7]
-; CHECK-NEXT:    movq $-1, %rax # encoding: [0x48,0xc7,0xc0,0xff,0xff,0xff,0xff]
-; CHECK-NEXT:    cmovaeq %rcx, %rax # encoding: [0x48,0x0f,0x43,0xc1]
+; CHECK-NEXT:    addq %rsi, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x01,0xf7]
+; CHECK-NEXT:    movq $-1, %rcx # encoding: [0x48,0xc7,0xc1,0xff,0xff,0xff,0xff]
+; CHECK-NEXT:    cmovbq %rcx, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x0f,0x42,0xc1]
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
     %add = call i64 @llvm.uadd.sat.i64(i64 %a, i64 %b)
@@ -350,9 +350,9 @@ define i8 @addflag8rm(i8 noundef %a, ptr %b) {
 ; CHECK-LABEL: addflag8rm:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    addb (%rsi), %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x02,0x3e]
-; CHECK-NEXT:    movzbl %al, %ecx # encoding: [0x0f,0xb6,0xc8]
-; CHECK-NEXT:    movl $255, %eax # encoding: [0xb8,0xff,0x00,0x00,0x00]
-; CHECK-NEXT:    cmovael %ecx, %eax # encoding: [0x0f,0x43,0xc1]
+; CHECK-NEXT:    movzbl %al, %eax # encoding: [0x0f,0xb6,0xc0]
+; CHECK-NEXT:    movl $255, %ecx # encoding: [0xb9,0xff,0x00,0x00,0x00]
+; CHECK-NEXT:    cmovbl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x42,0xc1]
 ; CHECK-NEXT:    # kill: def $al killed $al killed $eax
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
@@ -364,10 +364,10 @@ entry:
 define i16 @addflag16rm(i16 noundef %a, ptr %b) {
 ; CHECK-LABEL: addflag16rm:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    addw (%rsi), %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x03,0x3e]
-; CHECK-NEXT:    movl $65535, %eax # encoding: [0xb8,0xff,0xff,0x00,0x00]
+; CHECK-NEXT:    addw (%rsi), %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x03,0x3e]
+; CHECK-NEXT:    movl $65535, %ecx # encoding: [0xb9,0xff,0xff,0x00,0x00]
 ; CHECK-NEXT:    # imm = 0xFFFF
-; CHECK-NEXT:    cmovael %ecx, %eax # encoding: [0x0f,0x43,0xc1]
+; CHECK-NEXT:    cmovbl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x42,0xc1]
 ; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
@@ -379,9 +379,9 @@ entry:
 define i32 @addflag32rm(i32 noundef %a, ptr %b) {
 ; CHECK-LABEL: addflag32rm:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    addl (%rsi), %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x03,0x3e]
-; CHECK-NEXT:    movl $-1, %eax # encoding: [0xb8,0xff,0xff,0xff,0xff]
-; CHECK-NEXT:    cmovael %ecx, %eax # encoding: [0x0f,0x43,0xc1]
+; CHECK-NEXT:    addl (%rsi), %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x03,0x3e]
+; CHECK-NEXT:    movl $-1, %ecx # encoding: [0xb9,0xff,0xff,0xff,0xff]
+; CHECK-NEXT:    cmovbl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x42,0xc1]
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
     %t = load i32, ptr %b
@@ -392,9 +392,9 @@ entry:
 define i64 @addflag64rm(i64 noundef %a, ptr %b) {
 ; CHECK-LABEL: addflag64rm:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    addq (%rsi), %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x03,0x3e]
-; CHECK-NEXT:    movq $-1, %rax # encoding: [0x48,0xc7,0xc0,0xff,0xff,0xff,0xff]
-; CHECK-NEXT:    cmovaeq %rcx, %rax # encoding: [0x48,0x0f,0x43,0xc1]
+; CHECK-NEXT:    addq (%rsi), %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x03,0x3e]
+; CHECK-NEXT:    movq $-1, %rcx # encoding: [0x48,0xc7,0xc1,0xff,0xff,0xff,0xff]
+; CHECK-NEXT:    cmovbq %rcx, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x0f,0x42,0xc1]
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
     %t = load i64, ptr %b
@@ -405,10 +405,10 @@ entry:
 define i16 @addflag16ri8(i16 noundef %a) {
 ; CHECK-LABEL: addflag16ri8:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    addw $123, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x83,0xc7,0x7b]
-; CHECK-NEXT:    movl $65535, %eax # encoding: [0xb8,0xff,0xff,0x00,0x00]
+; CHECK-NEXT:    addw $123, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x83,0xc7,0x7b]
+; CHECK-NEXT:    movl $65535, %ecx # encoding: [0xb9,0xff,0xff,0x00,0x00]
 ; CHECK-NEXT:    # imm = 0xFFFF
-; CHECK-NEXT:    cmovael %ecx, %eax # encoding: [0x0f,0x43,0xc1]
+; CHECK-NEXT:    cmovbl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x42,0xc1]
 ; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
@@ -419,9 +419,9 @@ entry:
 define i32 @addflag32ri8(i32 noundef %a) {
 ; CHECK-LABEL: addflag32ri8:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    addl $123, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x83,0xc7,0x7b]
-; CHECK-NEXT:    movl $-1, %eax # encoding: [0xb8,0xff,0xff,0xff,0xff]
-; CHECK-NEXT:    cmovael %ecx, %eax # encoding: [0x0f,0x43,0xc1]
+; CHECK-NEXT:    addl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xc7,0x7b]
+; CHECK-NEXT:    movl $-1, %ecx # encoding: [0xb9,0xff,0xff,0xff,0xff]
+; CHECK-NEXT:    cmovbl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x42,0xc1]
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
     %add = call i32 @llvm.uadd.sat.i32(i32 %a, i32 123)
@@ -431,9 +431,9 @@ entry:
 define i64 @addflag64ri8(i64 noundef %a) {
 ; CHECK-LABEL: addflag64ri8:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    addq $123, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x83,0xc7,0x7b]
-; CHECK-NEXT:    movq $-1, %rax # encoding: [0x48,0xc7,0xc0,0xff,0xff,0xff,0xff]
-; CHECK-NEXT:    cmovaeq %rcx, %rax # encoding: [0x48,0x0f,0x43,0xc1]
+; CHECK-NEXT:    addq $123, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0xc7,0x7b]
+; CHECK-NEXT:    movq $-1, %rcx # encoding: [0x48,0xc7,0xc1,0xff,0xff,0xff,0xff]
+; CHECK-NEXT:    cmovbq %rcx, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x0f,0x42,0xc1]
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
     %add = call i64 @llvm.uadd.sat.i64(i64 %a, i64 123)
@@ -444,9 +444,9 @@ define i8 @addflag8ri(i8 noundef %a) {
 ; CHECK-LABEL: addflag8ri:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    addb $123, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0xc7,0x7b]
-; CHECK-NEXT:    movzbl %al, %ecx # encoding: [0x0f,0xb6,0xc8]
-; CHECK-NEXT:    movl $255, %eax # encoding: [0xb8,0xff,0x00,0x00,0x00]
-; CHECK-NEXT:    cmovael %ecx, %eax # encoding: [0x0f,0x43,0xc1]
+; CHECK-NEXT:    movzbl %al, %eax # encoding: [0x0f,0xb6,0xc0]
+; CHECK-NEXT:    movl $255, %ecx # encoding: [0xb9,0xff,0x00,0x00,0x00]
+; CHECK-NEXT:    cmovbl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x42,0xc1]
 ; CHECK-NEXT:    # kill: def $al killed $al killed $eax
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
@@ -457,11 +457,11 @@ entry:
 define i16 @addflag16ri(i16 noundef %a) {
 ; CHECK-LABEL: addflag16ri:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    addw $1234, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x81,0xc7,0xd2,0x04]
+; CHECK-NEXT:    addw $1234, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0xc7,0xd2,0x04]
 ; CHECK-NEXT:    # imm = 0x4D2
-; CHECK-NEXT:    movl $65535, %eax # encoding: [0xb8,0xff,0xff,0x00,0x00]
+; CHECK-NEXT:    movl $65535, %ecx # encoding: [0xb9,0xff,0xff,0x00,0x00]
 ; CHECK-NEXT:    # imm = 0xFFFF
-; CHECK-NEXT:    cmovael %ecx, %eax # encoding: [0x0f,0x43,0xc1]
+; CHECK-NEXT:    cmovbl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x42,0xc1]
 ; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
@@ -472,10 +472,10 @@ entry:
 define i32 @addflag32ri(i32 noundef %a) {
 ; CHECK-LABEL: addflag32ri:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    addl $123456, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x81,0xc7,0x40,0xe2,0x01,0x00]
+; CHECK-NEXT:    addl $123456, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xc7,0x40,0xe2,0x01,0x00]
 ; CHECK-NEXT:    # imm = 0x1E240
-; CHECK-NEXT:    movl $-1, %eax # encoding: [0xb8,0xff,0xff,0xff,0xff]
-; CHECK-NEXT:    cmovael %ecx, %eax # encoding: [0x0f,0x43,0xc1]
+; CHECK-NEXT:    movl $-1, %ecx # encoding: [0xb9,0xff,0xff,0xff,0xff]
+; CHECK-NEXT:    cmovbl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x42,0xc1]
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
     %add = call i32 @llvm.uadd.sat.i32(i32 %a, i32 123456)
@@ -485,10 +485,10 @@ entry:
 define i64 @addflag64ri(i64 noundef %a) {
 ; CHECK-LABEL: addflag64ri:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    addq $123456, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x81,0xc7,0x40,0xe2,0x01,0x00]
+; CHECK-NEXT:    addq $123456, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xc7,0x40,0xe2,0x01,0x00]
 ; CHECK-NEXT:    # imm = 0x1E240
-; CHECK-NEXT:    movq $-1, %rax # encoding: [0x48,0xc7,0xc0,0xff,0xff,0xff,0xff]
-; CHECK-NEXT:    cmovaeq %rcx, %rax # encoding: [0x48,0x0f,0x43,0xc1]
+; CHECK-NEXT:    movq $-1, %rcx # encoding: [0x48,0xc7,0xc1,0xff,0xff,0xff,0xff]
+; CHECK-NEXT:    cmovbq %rcx, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x0f,0x42,0xc1]
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
     %add = call i64 @llvm.uadd.sat.i64(i64 %a, i64 123456)
diff --git a/llvm/test/CodeGen/X86/apx/cfcmov.ll b/llvm/test/CodeGen/X86/apx/cfcmov.ll
new file mode 100644
index 00000000000000..97758203f85ce8
--- /dev/null
+++ b/llvm/test/CodeGen/X86/apx/cfcmov.ll
@@ -0,0 +1,94 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+cf -x86-cmov-converter=false -verify-machineinstrs | FileCheck %s
+
+define i8 @cfcmov8rr(i8 %0) {
+; CHECK-LABEL: cfcmov8rr:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    cmpb $1, %dil
+; CHECK-NEXT:    cfcmovel %edi, %eax
+; CHECK-NEXT:    # kill: def $al killed $al killed $eax
+; CHECK-NEXT:    retq
+  %2 = icmp eq i8 %0, 1
+  %3 = select i1 %2, i8 %0, i8 0
+  ret i8 %3
+}
+
+define i16 @cfcmov16rr(i16 %0) {
+; CHECK-LABEL: cfcmov16rr:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    cmpw $1, %di
+; CHECK-NEXT:    cfcmovnel %edi, %eax
+; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
+; CHECK-NEXT:    retq
+  %2 = icmp ne i16 %0, 1
+  %3 = select i1 %2, i16 %0, i16 0
+  ret i16 %3
+}
+
+define i32 @cfcmov32rr(i32 %0) {
+; CHECK-LABEL: cfcmov32rr:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    cmpl $2, %edi
+; CHECK-NEXT:    cfcmovael %edi, %eax
+; CHECK-NEXT:    retq
+  %2 = icmp ugt i32 %0, 1
+  %3 = select i1 %2, i32 %0, i32 0
+  ret i32 %3
+}
+
+define i64 @cfcmov64rr(i64 %0) {
+; CHECK-LABEL: cfcmov64rr:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    testq %rdi, %rdi
+; CHECK-NEXT:    cfcmoveq %rdi, %rax
+; CHECK-NEXT:    retq
+  %2 = icmp ult i64 %0, 1
+  %3 = select i1 %2, i64 %0, i64 0
+  ret i64 %3
+}
+
+define i8 @cfcmov8rr_inv(i8 %0) {
+; CHECK-LABEL: cfcmov8rr_inv:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    cmpb $1, %dil
+; CHECK-NEXT:    cfcmovnel %edi, %eax
+; CHECK-NEXT:    # kill: def $al killed $al killed $eax
+; CHECK-NEXT:    retq
+  %2 = icmp eq i8 %0, 1
+  %3 = select i1 %2, i8 0, i8 %0
+  ret i8 %3
+}
+
+define i16 @cfcmov16rr_inv(i16 %0) {
+; CHECK-LABEL: cfcmov16rr_inv:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    cmpw $1, %di
+; CHECK-NEXT:    cfcmovel %edi, %eax
+; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
+; CHECK-NEXT:    retq
+  %2 = icmp ne i16 %0, 1
+  %3 = select i1 %2, i16 0, i16 %0
+  ret i16 %3
+}
+
+define i32 @cfcmov32rr_inv(i32 %0) {
+; CHECK-LABEL: cfcmov32rr_inv:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    cmpl $2, %edi
+; CHECK-NEXT:    cfcmovbl %edi, %eax
+; CHECK-NEXT:    retq
+  %2 = icmp ugt i32 %0, 1
+  %3 = select i1 %2, i32 0, i32 %0
+  ret i32 %3
+}
+
+define i64 @cfcmov64rr_inv(i64 %0) {
+; CHECK-LABEL: cfcmov64rr_inv:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    cmpq $2, %rdi
+; CHECK-NEXT:    cfcmovaeq %rdi, %rax
+; CHECK-NEXT:    retq
+  %2 = icmp ule i64 %0, 1
+  %3 = select i1 %2, i64 0, i64 %0
+  ret i64 %3
+}
diff --git a/llvm/test/CodeGen/X86/apx/inc.ll b/llvm/test/CodeGen/X86/apx/inc.ll
index 613f7866c9ac5c..a9c6d740cf2cee 100644
--- a/llvm/test/CodeGen/X86/apx/inc.ll
+++ b/llvm/test/CodeGen/X86/apx/inc.ll
@@ -92,9 +92,9 @@ define i8 @uinc8r(i8 noundef %a) {
 ; CHECK-LABEL: uinc8r:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    incb %dil, %al
-; CHECK-NEXT:    movzbl %al, %ecx
-; CHECK-NEXT:    movl $255, %eax
-; CHECK-NEXT:    cmovnel %ecx, %eax
+; CHECK-NEXT:    movzbl %al, %eax
+; CHECK-NEXT:    movl $255, %ecx
+; CHECK-NEXT:    cmovel %ecx, %eax
 ; CHECK-NEXT:    # kill: def $al killed $al killed $eax
 ; CHECK-NEXT:    retq
 entry:
@@ -105,9 +105,9 @@ entry:
 define i16 @uinc16r(i16 noundef %a) {
 ; CHECK-LABEL: uinc16r:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    incw %di, %cx
-; CHECK-NEXT:    movl $65535, %eax # imm = 0xFFFF
-; CHECK-NEXT:    cmovnel %ecx, %eax
+; CHECK-NEXT:    incw %di, %ax
+; CHECK-NEXT:    movl $65535, %ecx # imm = 0xFFFF
+; CHECK-NEXT:    cmovel %ecx, %eax
 ; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
 ; CHECK-NEXT:    retq
 entry:
@@ -118,9 +118,9 @@ entry:
 define i32 @uinc32r(i32 noundef %a) {
 ; CHECK-LABEL: uinc32r:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    incl %edi, %ecx
-; CHECK-NEXT:    movl $-1, %eax
-; CHECK-NEXT:    cmovnel %ecx, %eax
+; CHECK-NEXT:    incl %edi, %eax
+; CHECK-NEXT:    movl $-1, %ecx
+; CHECK-NEXT:    cmovel %ecx, %eax
 ; CHECK-NEXT:    retq
 entry:
   %inc = call i32 @llvm.uadd.sat.i32(i32 %a, i32 1)
@@ -130,9 +130,9 @@ entry:
 define i64 @uinc64r(i64 noundef %a) {
 ; CHECK-LABEL: uinc64r:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    incq %rdi, %rcx
-; CHECK-NEXT:    movq $-1, %rax
-; CHECK-NEXT:    cmovneq %rcx, %rax
+; CHECK-NEXT:    incq %rdi, %rax
+; CHECK-NEXT:    movq $-1, %rcx
+; CHECK-NEXT:    cmoveq %rcx, %rax
 ; CHECK-NEXT:    retq
 entry:
   %inc = call i64 @llvm.uadd.sat.i64(i64 %a, i64 1)
diff --git a/llvm/test/CodeGen/X86/apx/shift-eflags.ll b/llvm/test/CodeGen/X86/apx/shift-eflags.ll
index f34dc6c05dad98..932cdc189bf9f8 100644
--- a/llvm/test/CodeGen/X86/apx/shift-eflags.ll
+++ b/llvm/test/CodeGen/X86/apx/shift-eflags.ll
@@ -7,9 +7,8 @@
 define i32 @ashr_const(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
 ; CHECK-LABEL: ashr_const:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    movl %edx, %eax
-; CHECK-NEXT:    sarl $14, %edi, %edx
-; CHECK-NEXT:    cmovnel %ecx, %eax
+; CHECK-NEXT:    sarl $14, %edi, %eax
+; CHECK-NEXT:    cmovel %edx, %ecx, %eax
 ; CHECK-NEXT:    retq
   %s = ashr i32 %a0, 14
   %c = icmp eq i32 %s, 0
@@ -21,9 +20,8 @@ define i32 @ashr_const(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
 define i32 @lshr_const(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
 ; CHECK-LABEL: lshr_const:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    movl %edx, %eax
 ; CHECK-NEXT:    testl $-16384, %edi # imm = 0xC000
-; CHECK-NEXT:    cmovnel %ecx, %eax
+; CHECK-NEXT:    cmovel %edx, %ecx, %eax
 ; CHECK-NEXT:    retq
   %s = lshr i32 %a0, 14
   %c = icmp eq i32 %s, 0
@@ -35,9 +33,8 @@ define i32 @lshr_const(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
 define i32 @shl_const(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
 ; CHECK-LABEL: shl_const:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    movl %edx, %eax
 ; CHECK-NEXT:    testl $262143, %edi # imm = 0x3FFFF
-; CHECK-NEXT:    cmovnel %ecx, %eax
+; CHECK-NEXT:    cmovel %edx, %ecx, %eax
 ; CHECK-NEXT:    retq
   %s = shl i32 %a0, 14
   %c = icmp eq i32 %s, 0
@@ -88,9 +85,8 @@ define i32 @shl_const_self_select(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
 define i32 @ashr_const1(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
 ; CHECK-LABEL: ashr_const1:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    movl %edx, %eax
-; CHECK-NEXT:    sarl %edi, %edx
-; CHECK-NEXT:    cmovnel %ecx, %eax
+; CHECK-NEXT:    sarl %edi, %eax
+; CHECK-NEXT:    cmovel %edx, %ecx, %eax
 ; CHECK-NEXT:    retq
   %s = ashr i32 %a0, 1
   %c = icmp eq i32 %s, 0
@@ -102,9 +98,8 @@ define i32 @ashr_const1(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
 define i32 @lshr_const1(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
 ; CHECK-LABEL: lshr_const1:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    movl %edx, %eax
 ; CHECK-NEXT:    testl $-2, %edi
-; CHECK-NEXT:    cmovnel %ecx, %eax
+; CHECK-NEXT:    cmovel %edx, %ecx, %eax
 ; CHECK-NEXT:    retq
   %s = lshr i32 %a0, 1
   %c = icmp eq i32 %s, 0
@@ -116,9 +111,8 @@ define i32 @lshr_const1(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
 define i32 @shl_const1(i32 %a0, i32 %a1, i32 %a2, i32 %a3) {
 ; CHECK-LABEL: shl_const1:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    movl %edx, %eax
 ; CHECK-NEXT:    testl $2147483647, %edi # imm = 0x7FFFFFFF
-; CHECK-NEXT:    cmovnel %ecx, %eax
+; CHECK-NEXT:    cmovel %edx, %ecx, %eax
 ; CHECK-NEXT:    retq
   %s = shl i32 %a0, 1
   %c = icmp eq i32 %s, 0
diff --git a/llvm/test/CodeGen/X86/apx/sub.ll b/llvm/test/CodeGen/X86/apx/sub.ll
index 4b0bd14872141b..be0914c90b9faf 100644
--- a/llvm/test/CodeGen/X86/apx/sub.ll
+++ b/llvm/test/CodeGen/X86/apx/sub.ll
@@ -299,10 +299,10 @@ declare i64 @llvm.usub.sat.i64(i64, i64)
 define i8 @subflag8rr(i8 noundef %a, i8 noundef %b) {
 ; CHECK-LABEL: subflag8rr:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    xorl %ecx, %ecx # encoding: [0x31,0xc9]
-; CHECK-NEXT:    subb %sil, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x28,0xf7]
-; CHECK-NEXT:    movzbl %al, %eax # encoding: [0x0f,0xb6,0xc0]
-; CHECK-NEXT:    cmovbl %ecx, %eax # encoding: [0x0f,0x42,0xc1]
+; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
+; CHECK-NEXT:    subb %sil, %dil, %cl # encoding: [0x62,0xf4,0x74,0x18,0x28,0xf7]
+; CHECK-NEXT:    movzbl %cl, %ecx # encoding: [0x0f,0xb6,0xc9]
+; CHECK-NEXT:    cmovael %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x43,0xc1]
 ; CHECK-NEXT:    # kill: def $al killed $al killed $eax
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
@@ -313,9 +313,9 @@ entry:
 define i16 @subflag16rr(i16 noundef %a, i16 noundef %b) {
 ; CHECK-LABEL: subflag16rr:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    xorl %ecx, %ecx # encoding: [0x31,0xc9]
-; CHECK-NEXT:    subw %si, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf7]
-; CHECK-NEXT:    cmovbl %ecx, %eax # encoding: [0x0f,0x42,0xc1]
+; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
+; CHECK-NEXT:    subw %si, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x29,0xf7]
+; CHECK-NEXT:    cmovael %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x43,0xc1]
 ; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
@@ -326,9 +326,9 @@ entry:
 define i32 @subflag32rr(i32 noundef %a, i32 noundef %b) {
 ; CHECK-LABEL: subflag32rr:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    xorl %ecx, %ecx # encoding: [0x31,0xc9]
-; CHECK-NEXT:    subl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xf7]
-; CHECK-NEXT:    cmovbl %ecx, %eax # encoding: [0x0f,0x42,0xc1]
+; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
+; CHECK-NEXT:    subl %esi, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x29,0xf7]
+; CHECK-NEXT:    cmovael %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x43,0xc1]
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
     %sub = call i32 @llvm.usub.sat.i32(i32 %a, i32 %b)
@@ -340,7 +340,7 @@ define i64 @subflag64rr(i64 noundef %a, i64 noundef %b) {
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
 ; CHECK-NEXT:    subq %rsi, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x29,0xf7]
-; CHECK-NEXT:    cmovaeq %rcx, %rax # encoding: [0x48,0x0f,0x43,0xc1]
+; CHECK-NEXT:    cmovaeq %rcx, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x0f,0x43,0xc1]
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
     %sub = call i64 @llvm.usub.sat.i64(i64 %a, i64 %b)
@@ -350,10 +350,10 @@ entry:
 define i8 @subflag8rm(i8 noundef %a, ptr %b) {
 ; CHECK-LABEL: subflag8rm:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    xorl %ecx, %ecx # encoding: [0x31,0xc9]
-; CHECK-NEXT:    subb (%rsi), %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x2a,0x3e]
-; CHECK-NEXT:    movzbl %al, %eax # encoding: [0x0f,0xb6,0xc0]
-; CHECK-NEXT:    cmovbl %ecx, %eax # encoding: [0x0f,0x42,0xc1]
+; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
+; CHECK-NEXT:    subb (%rsi), %dil, %cl # encoding: [0x62,0xf4,0x74,0x18,0x2a,0x3e]
+; CHECK-NEXT:    movzbl %cl, %ecx # encoding: [0x0f,0xb6,0xc9]
+; CHECK-NEXT:    cmovael %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x43,0xc1]
 ; CHECK-NEXT:    # kill: def $al killed $al killed $eax
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
@@ -365,9 +365,9 @@ entry:
 define i16 @subflag16rm(i16 noundef %a, ptr %b) {
 ; CHECK-LABEL: subflag16rm:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    xorl %ecx, %ecx # encoding: [0x31,0xc9]
-; CHECK-NEXT:    subw (%rsi), %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x2b,0x3e]
-; CHECK-NEXT:    cmovbl %ecx, %eax # encoding: [0x0f,0x42,0xc1]
+; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
+; CHECK-NEXT:    subw (%rsi), %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x2b,0x3e]
+; CHECK-NEXT:    cmovael %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x43,0xc1]
 ; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
@@ -379,9 +379,9 @@ entry:
 define i32 @subflag32rm(i32 noundef %a, ptr %b) {
 ; CHECK-LABEL: subflag32rm:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    xorl %ecx, %ecx # encoding: [0x31,0xc9]
-; CHECK-NEXT:    subl (%rsi), %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x2b,0x3e]
-; CHECK-NEXT:    cmovbl %ecx, %eax # encoding: [0x0f,0x42,0xc1]
+; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
+; CHECK-NEXT:    subl (%rsi), %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x2b,0x3e]
+; CHECK-NEXT:    cmovael %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x43,0xc1]
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
     %t = load i32, ptr %b
@@ -394,7 +394,7 @@ define i64 @subflag64rm(i64 noundef %a, ptr %b) {
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
 ; CHECK-NEXT:    subq (%rsi), %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x2b,0x3e]
-; CHECK-NEXT:    cmovaeq %rcx, %rax # encoding: [0x48,0x0f,0x43,0xc1]
+; CHECK-NEXT:    cmovaeq %rcx, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x0f,0x43,0xc1]
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
     %t = load i64, ptr %b
@@ -405,9 +405,9 @@ entry:
 define i16 @subflag16ri8(i16 noundef %a) {
 ; CHECK-LABEL: subflag16ri8:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    xorl %ecx, %ecx # encoding: [0x31,0xc9]
-; CHECK-NEXT:    subw $123, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x83,0xef,0x7b]
-; CHECK-NEXT:    cmovbl %ecx, %eax # encoding: [0x0f,0x42,0xc1]
+; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
+; CHECK-NEXT:    subw $123, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x83,0xef,0x7b]
+; CHECK-NEXT:    cmovael %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x43,0xc1]
 ; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
@@ -418,9 +418,9 @@ entry:
 define i32 @subflag32ri8(i32 noundef %a) {
 ; CHECK-LABEL: subflag32ri8:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    xorl %ecx, %ecx # encoding: [0x31,0xc9]
-; CHECK-NEXT:    subl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xef,0x7b]
-; CHECK-NEXT:    cmovbl %ecx, %eax # encoding: [0x0f,0x42,0xc1]
+; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
+; CHECK-NEXT:    subl $123, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x83,0xef,0x7b]
+; CHECK-NEXT:    cmovael %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x43,0xc1]
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
     %sub = call i32 @llvm.usub.sat.i32(i32 %a, i32 123)
@@ -432,7 +432,7 @@ define i64 @subflag64ri8(i64 noundef %a) {
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
 ; CHECK-NEXT:    subq $123, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x83,0xef,0x7b]
-; CHECK-NEXT:    cmovaeq %rcx, %rax # encoding: [0x48,0x0f,0x43,0xc1]
+; CHECK-NEXT:    cmovaeq %rcx, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x0f,0x43,0xc1]
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
     %sub = call i64 @llvm.usub.sat.i64(i64 %a, i64 123)
@@ -442,10 +442,10 @@ entry:
 define i8 @subflag8ri(i8 noundef %a) {
 ; CHECK-LABEL: subflag8ri:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    xorl %ecx, %ecx # encoding: [0x31,0xc9]
-; CHECK-NEXT:    subb $123, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0xef,0x7b]
-; CHECK-NEXT:    movzbl %al, %eax # encoding: [0x0f,0xb6,0xc0]
-; CHECK-NEXT:    cmovbl %ecx, %eax # encoding: [0x0f,0x42,0xc1]
+; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
+; CHECK-NEXT:    subb $123, %dil, %cl # encoding: [0x62,0xf4,0x74,0x18,0x80,0xef,0x7b]
+; CHECK-NEXT:    movzbl %cl, %ecx # encoding: [0x0f,0xb6,0xc9]
+; CHECK-NEXT:    cmovael %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x43,0xc1]
 ; CHECK-NEXT:    # kill: def $al killed $al killed $eax
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
@@ -456,10 +456,10 @@ entry:
 define i16 @subflag16ri(i16 noundef %a) {
 ; CHECK-LABEL: subflag16ri:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    xorl %ecx, %ecx # encoding: [0x31,0xc9]
-; CHECK-NEXT:    subw $1234, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0xef,0xd2,0x04]
+; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
+; CHECK-NEXT:    subw $1234, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x81,0xef,0xd2,0x04]
 ; CHECK-NEXT:    # imm = 0x4D2
-; CHECK-NEXT:    cmovbl %ecx, %eax # encoding: [0x0f,0x42,0xc1]
+; CHECK-NEXT:    cmovael %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x43,0xc1]
 ; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
@@ -470,10 +470,10 @@ entry:
 define i32 @subflag32ri(i32 noundef %a) {
 ; CHECK-LABEL: subflag32ri:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    xorl %ecx, %ecx # encoding: [0x31,0xc9]
-; CHECK-NEXT:    subl $123456, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xef,0x40,0xe2,0x01,0x00]
+; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
+; CHECK-NEXT:    subl $123456, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x81,0xef,0x40,0xe2,0x01,0x00]
 ; CHECK-NEXT:    # imm = 0x1E240
-; CHECK-NEXT:    cmovbl %ecx, %eax # encoding: [0x0f,0x42,0xc1]
+; CHECK-NEXT:    cmovael %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x43,0xc1]
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
     %sub = call i32 @llvm.usub.sat.i32(i32 %a, i32 123456)
@@ -486,7 +486,7 @@ define i64 @subflag64ri(i64 noundef %a) {
 ; CHECK-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
 ; CHECK-NEXT:    subq $123456, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x81,0xef,0x40,0xe2,0x01,0x00]
 ; CHECK-NEXT:    # imm = 0x1E240
-; CHECK-NEXT:    cmovaeq %rcx, %rax # encoding: [0x48,0x0f,0x43,0xc1]
+; CHECK-NEXT:    cmovaeq %rcx, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x0f,0x43,0xc1]
 ; CHECK-NEXT:    retq # encoding: [0xc3]
 entry:
     %sub = call i64 @llvm.usub.sat.i64(i64 %a, i64 123456)
diff --git a/llvm/test/CodeGen/X86/cmov.ll b/llvm/test/CodeGen/X86/cmov.ll
index 374e75967d52fc..a8c068fc5b8650 100644
--- a/llvm/test/CodeGen/X86/cmov.ll
+++ b/llvm/test/CodeGen/X86/cmov.ll
@@ -1,5 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown -disable-cgp-select2branch -x86-cmov-converter=false | FileCheck %s
+; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown -disable-cgp-select2branch -x86-cmov-converter=false -mattr=+ndd --show-mc-encoding | FileCheck %s --check-prefix=NDD
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
 
 define i32 @test1(i32 %x, i32 %n, i32 %w, ptr %vp) nounwind readnone {
@@ -9,6 +10,13 @@ define i32 @test1(i32 %x, i32 %n, i32 %w, ptr %vp) nounwind readnone {
 ; CHECK-NEXT:    movl $12, %eax
 ; CHECK-NEXT:    cmovael (%rcx), %eax
 ; CHECK-NEXT:    retq
+;
+; NDD-LABEL: test1:
+; NDD:       # %bb.0: # %entry
+; NDD-NEXT:    btl %esi, %edi # encoding: [0x0f,0xa3,0xf7]
+; NDD-NEXT:    movl $12, %eax # encoding: [0xb8,0x0c,0x00,0x00,0x00]
+; NDD-NEXT:    cmovael (%rcx), %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x43,0x01]
+; NDD-NEXT:    retq # encoding: [0xc3]
 entry:
 	%0 = lshr i32 %x, %n
 	%1 = and i32 %0, 1
@@ -25,6 +33,13 @@ define i32 @test2(i32 %x, i32 %n, i32 %w, ptr %vp) nounwind readnone {
 ; CHECK-NEXT:    movl $12, %eax
 ; CHECK-NEXT:    cmovbl (%rcx), %eax
 ; CHECK-NEXT:    retq
+;
+; NDD-LABEL: test2:
+; NDD:       # %bb.0: # %entry
+; NDD-NEXT:    btl %esi, %edi # encoding: [0x0f,0xa3,0xf7]
+; NDD-NEXT:    movl $12, %eax # encoding: [0xb8,0x0c,0x00,0x00,0x00]
+; NDD-NEXT:    cmovbl (%rcx), %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x42,0x01]
+; NDD-NEXT:    retq # encoding: [0xc3]
 entry:
 	%0 = lshr i32 %x, %n
 	%1 = and i32 %0, 1
@@ -50,6 +65,16 @@ define void @test3(i64 %a, i64 %b, i1 %p) nounwind {
 ; CHECK-NEXT:    callq bar at PLT
 ; CHECK-NEXT:    popq %rax
 ; CHECK-NEXT:    retq
+;
+; NDD-LABEL: test3:
+; NDD:       # %bb.0:
+; NDD-NEXT:    pushq %rax # encoding: [0x50]
+; NDD-NEXT:    testb $1, %dl # encoding: [0xf6,0xc2,0x01]
+; NDD-NEXT:    cmovel %esi, %edi # EVEX TO LEGACY Compression encoding: [0x0f,0x44,0xfe]
+; NDD-NEXT:    callq bar at PLT # encoding: [0xe8,A,A,A,A]
+; NDD-NEXT:    # fixup A - offset: 1, value: bar at PLT-4, kind: FK_PCRel_4
+; NDD-NEXT:    popq %rax # encoding: [0x58]
+; NDD-NEXT:    retq # encoding: [0xc3]
   %c = trunc i64 %a to i32
   %d = trunc i64 %b to i32
   %e = select i1 %p, i32 %c, i32 %d
@@ -114,6 +139,54 @@ define i1 @test4() nounwind {
 ; CHECK-NEXT:    movl %ebx, %eax
 ; CHECK-NEXT:    popq %rbx
 ; CHECK-NEXT:    retq
+;
+; NDD-LABEL: test4:
+; NDD:       # %bb.0: # %entry
+; NDD-NEXT:    movsbl g_3(%rip), %eax # encoding: [0x0f,0xbe,0x05,A,A,A,A]
+; NDD-NEXT:    # fixup A - offset: 3, value: g_3-4, kind: reloc_riprel_4byte
+; NDD-NEXT:    movzbl %al, %ecx # encoding: [0x0f,0xb6,0xc8]
+; NDD-NEXT:    shrl $7, %ecx # EVEX TO LEGACY Compression encoding: [0xc1,0xe9,0x07]
+; NDD-NEXT:    xorb $1, %cl # EVEX TO LEGACY Compression encoding: [0x80,0xf1,0x01]
+; NDD-NEXT:    sarl %cl, %eax, %ecx # encoding: [0x62,0xf4,0x74,0x18,0xd3,0xf8]
+; NDD-NEXT:    movzbl g_96(%rip), %eax # encoding: [0x0f,0xb6,0x05,A,A,A,A]
+; NDD-NEXT:    # fixup A - offset: 3, value: g_96-4, kind: reloc_riprel_4byte
+; NDD-NEXT:    testb %al, %al # encoding: [0x84,0xc0]
+; NDD-NEXT:    je .LBB3_2 # encoding: [0x74,A]
+; NDD-NEXT:    # fixup A - offset: 1, value: .LBB3_2-1, kind: FK_PCRel_1
+; NDD-NEXT:  # %bb.1: # %bb.i.i.i
+; NDD-NEXT:    movzbl g_100(%rip), %edx # encoding: [0x0f,0xb6,0x15,A,A,A,A]
+; NDD-NEXT:    # fixup A - offset: 3, value: g_100-4, kind: reloc_riprel_4byte
+; NDD-NEXT:  .LBB3_2: # %func_4.exit.i
+; NDD-NEXT:    pushq %rbx # encoding: [0x53]
+; NDD-NEXT:    xorl %edx, %edx # encoding: [0x31,0xd2]
+; NDD-NEXT:    testb %cl, %cl # encoding: [0x84,0xc9]
+; NDD-NEXT:    setne %bl # encoding: [0x0f,0x95,0xc3]
+; NDD-NEXT:    movzbl %al, %ecx # encoding: [0x0f,0xb6,0xc8]
+; NDD-NEXT:    cmovnel %edx, %ecx # EVEX TO LEGACY Compression encoding: [0x0f,0x45,0xca]
+; NDD-NEXT:    testb %al, %al # encoding: [0x84,0xc0]
+; NDD-NEXT:    je .LBB3_5 # encoding: [0x74,A]
+; NDD-NEXT:    # fixup A - offset: 1, value: .LBB3_5-1, kind: FK_PCRel_1
+; NDD-NEXT:  # %bb.3: # %func_4.exit.i
+; NDD-NEXT:    testb %bl, %bl # encoding: [0x84,0xdb]
+; NDD-NEXT:    jne .LBB3_5 # encoding: [0x75,A]
+; NDD-NEXT:    # fixup A - offset: 1, value: .LBB3_5-1, kind: FK_PCRel_1
+; NDD-NEXT:  # %bb.4: # %bb.i.i
+; NDD-NEXT:    movzbl g_100(%rip), %ecx # encoding: [0x0f,0xb6,0x0d,A,A,A,A]
+; NDD-NEXT:    # fixup A - offset: 3, value: g_100-4, kind: reloc_riprel_4byte
+; NDD-NEXT:    xorl %ebx, %ebx # encoding: [0x31,0xdb]
+; NDD-NEXT:    movl %eax, %ecx # encoding: [0x89,0xc1]
+; NDD-NEXT:  .LBB3_5: # %func_1.exit
+; NDD-NEXT:    movb %cl, g_96(%rip) # encoding: [0x88,0x0d,A,A,A,A]
+; NDD-NEXT:    # fixup A - offset: 2, value: g_96-4, kind: reloc_riprel_4byte
+; NDD-NEXT:    movzbl %cl, %esi # encoding: [0x0f,0xb6,0xf1]
+; NDD-NEXT:    movl $_2E_str, %edi # encoding: [0xbf,A,A,A,A]
+; NDD-NEXT:    # fixup A - offset: 1, value: _2E_str, kind: FK_Data_4
+; NDD-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
+; NDD-NEXT:    callq printf at PLT # encoding: [0xe8,A,A,A,A]
+; NDD-NEXT:    # fixup A - offset: 1, value: printf at PLT-4, kind: FK_PCRel_4
+; NDD-NEXT:    movl %ebx, %eax # encoding: [0x89,0xd8]
+; NDD-NEXT:    popq %rbx # encoding: [0x5b]
+; NDD-NEXT:    retq # encoding: [0xc3]
 entry:
   %0 = load i8, ptr @g_3, align 1
   %1 = sext i8 %0 to i32
@@ -163,6 +236,14 @@ define i32 @test5(ptr nocapture %P) nounwind readonly {
 ; CHECK-NEXT:    setge %al
 ; CHECK-NEXT:    orl $-2, %eax
 ; CHECK-NEXT:    retq
+;
+; NDD-LABEL: test5:
+; NDD:       # %bb.0: # %entry
+; NDD-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
+; NDD-NEXT:    cmpl $42, (%rdi) # encoding: [0x83,0x3f,0x2a]
+; NDD-NEXT:    setge %al # encoding: [0x0f,0x9d,0xc0]
+; NDD-NEXT:    orl $-2, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xc8,0xfe]
+; NDD-NEXT:    retq # encoding: [0xc3]
 entry:
 	%0 = load i32, ptr %P, align 4
 	%1 = icmp sgt i32 %0, 41
@@ -178,6 +259,14 @@ define i32 @test6(ptr nocapture %P) nounwind readonly {
 ; CHECK-NEXT:    setl %al
 ; CHECK-NEXT:    leal 4(%rax,%rax,8), %eax
 ; CHECK-NEXT:    retq
+;
+; NDD-LABEL: test6:
+; NDD:       # %bb.0: # %entry
+; NDD-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
+; NDD-NEXT:    cmpl $42, (%rdi) # encoding: [0x83,0x3f,0x2a]
+; NDD-NEXT:    setl %al # encoding: [0x0f,0x9c,0xc0]
+; NDD-NEXT:    leal 4(%rax,%rax,8), %eax # encoding: [0x8d,0x44,0xc0,0x04]
+; NDD-NEXT:    retq # encoding: [0xc3]
 entry:
 	%0 = load i32, ptr %P, align 4
 	%1 = icmp sgt i32 %0, 41
@@ -194,6 +283,13 @@ define i8 @test7(i1 inreg %c, i8 inreg %a, i8 inreg %b) nounwind {
 ; CHECK-NEXT:    cmovel %edx, %eax
 ; CHECK-NEXT:    # kill: def $al killed $al killed $eax
 ; CHECK-NEXT:    retq
+;
+; NDD-LABEL: test7:
+; NDD:       # %bb.0:
+; NDD-NEXT:    testb $1, %dil # encoding: [0x40,0xf6,0xc7,0x01]
+; NDD-NEXT:    cmovnel %esi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x45,0xd6]
+; NDD-NEXT:    # kill: def $al killed $al killed $eax
+; NDD-NEXT:    retq # encoding: [0xc3]
   %d = select i1 %c, i8 %a, i8 %b
   ret i8 %d
 }
@@ -205,6 +301,13 @@ define i64 @test8(i64 %0, i64 %1, i64 %2) {
 ; CHECK-NEXT:    cmpq $-2147483648, %rdi # imm = 0x80000000
 ; CHECK-NEXT:    cmovlq %rdx, %rax
 ; CHECK-NEXT:    retq
+;
+; NDD-LABEL: test8:
+; NDD:       # %bb.0:
+; NDD-NEXT:    cmpq $-2147483648, %rdi # encoding: [0x48,0x81,0xff,0x00,0x00,0x00,0x80]
+; NDD-NEXT:    # imm = 0x80000000
+; NDD-NEXT:    cmovgeq %rsi, %rdx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x4d,0xd6]
+; NDD-NEXT:    retq # encoding: [0xc3]
   %4 = icmp sgt i64 %0, -2147483649
   %5 = select i1 %4, i64 %1, i64 %2
   ret i64 %5
@@ -218,6 +321,14 @@ define i32 @smin(i32 %x) {
 ; CHECK-NEXT:    movl $-1, %eax
 ; CHECK-NEXT:    cmovnsl %edi, %eax
 ; CHECK-NEXT:    retq
+;
+; NDD-LABEL: smin:
+; NDD:       # %bb.0:
+; NDD-NEXT:    notl %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0xf7,0xd7]
+; NDD-NEXT:    testl %edi, %edi # encoding: [0x85,0xff]
+; NDD-NEXT:    movl $-1, %ecx # encoding: [0xb9,0xff,0xff,0xff,0xff]
+; NDD-NEXT:    cmovsl %ecx, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x48,0xc1]
+; NDD-NEXT:    retq # encoding: [0xc3]
   %not_x = xor i32 %x, -1
   %1 = icmp slt i32 %not_x, -1
   %sel = select i1 %1, i32 %not_x, i32 -1
@@ -231,6 +342,13 @@ define i32 @pr47049_1(i32 %0) {
 ; CHECK-NEXT:    movl $1, %eax
 ; CHECK-NEXT:    cmovlel %edi, %eax
 ; CHECK-NEXT:    retq
+;
+; NDD-LABEL: pr47049_1:
+; NDD:       # %bb.0:
+; NDD-NEXT:    testl %edi, %edi # encoding: [0x85,0xff]
+; NDD-NEXT:    movl $1, %eax # encoding: [0xb8,0x01,0x00,0x00,0x00]
+; NDD-NEXT:    cmovlel %edi, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x4e,0xc7]
+; NDD-NEXT:    retq # encoding: [0xc3]
   %2 = icmp slt i32 %0, 1
   %3 = select i1 %2, i32 %0, i32 1
   ret i32 %3
@@ -243,6 +361,13 @@ define i32 @pr47049_2(i32 %0) {
 ; CHECK-NEXT:    movl $-1, %eax
 ; CHECK-NEXT:    cmovnsl %edi, %eax
 ; CHECK-NEXT:    retq
+;
+; NDD-LABEL: pr47049_2:
+; NDD:       # %bb.0:
+; NDD-NEXT:    testl %edi, %edi # encoding: [0x85,0xff]
+; NDD-NEXT:    movl $-1, %eax # encoding: [0xb8,0xff,0xff,0xff,0xff]
+; NDD-NEXT:    cmovnsl %edi, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x49,0xc7]
+; NDD-NEXT:    retq # encoding: [0xc3]
   %2 = icmp sgt i32 %0, -1
   %3 = select i1 %2, i32 %0, i32 -1
   ret i32 %3
@@ -255,6 +380,13 @@ define i32 @pr47049_3(i32 %0) {
 ; CHECK-NEXT:    movl $1, %eax
 ; CHECK-NEXT:    cmovgl %edi, %eax
 ; CHECK-NEXT:    retq
+;
+; NDD-LABEL: pr47049_3:
+; NDD:       # %bb.0:
+; NDD-NEXT:    testl %edi, %edi # encoding: [0x85,0xff]
+; NDD-NEXT:    movl $1, %eax # encoding: [0xb8,0x01,0x00,0x00,0x00]
+; NDD-NEXT:    cmovgl %edi, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x4f,0xc7]
+; NDD-NEXT:    retq # encoding: [0xc3]
   %2 = icmp sgt i32 %0, 1
   %3 = select i1 %2, i32 %0, i32 1
   ret i32 %3
@@ -267,6 +399,13 @@ define i32 @pr47049_4(i32 %0) {
 ; CHECK-NEXT:    movl $1, %eax
 ; CHECK-NEXT:    cmovnel %edi, %eax
 ; CHECK-NEXT:    retq
+;
+; NDD-LABEL: pr47049_4:
+; NDD:       # %bb.0:
+; NDD-NEXT:    testl %edi, %edi # encoding: [0x85,0xff]
+; NDD-NEXT:    movl $1, %eax # encoding: [0xb8,0x01,0x00,0x00,0x00]
+; NDD-NEXT:    cmovnel %edi, %eax # EVEX TO LEGACY Compression encoding: [0x0f,0x45,0xc7]
+; NDD-NEXT:    retq # encoding: [0xc3]
   %2 = icmp ugt i32 %0, 1
   %3 = select i1 %2, i32 %0, i32 1
   ret i32 %3
diff --git a/llvm/test/CodeGen/X86/cmp.ll b/llvm/test/CodeGen/X86/cmp.ll
index cd1953bec774d9..30e52f06307599 100644
--- a/llvm/test/CodeGen/X86/cmp.ll
+++ b/llvm/test/CodeGen/X86/cmp.ll
@@ -416,9 +416,8 @@ define i32 @test13(i32 %mask, i32 %base, i32 %intra) {
 ;
 ; NDD-LABEL: test13:
 ; NDD:       # %bb.0:
-; NDD-NEXT:    movl %esi, %eax # encoding: [0x89,0xf0]
 ; NDD-NEXT:    testb $8, %dil # encoding: [0x40,0xf6,0xc7,0x08]
-; NDD-NEXT:    cmovnel %edx, %eax # encoding: [0x0f,0x45,0xc2]
+; NDD-NEXT:    cmovnel %edx, %esi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x45,0xf2]
 ; NDD-NEXT:    retq # encoding: [0xc3]
   %and = and i32 %mask, 8
   %tobool = icmp ne i32 %and, 0
@@ -436,9 +435,8 @@ define i32 @test14(i32 %mask, i32 %base, i32 %intra) {
 ;
 ; NDD-LABEL: test14:
 ; NDD:       # %bb.0:
-; NDD-NEXT:    movl %esi, %eax # encoding: [0x89,0xf0]
-; NDD-NEXT:    shrl $7, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0xc1,0xef,0x07]
-; NDD-NEXT:    cmovnsl %edx, %eax # encoding: [0x0f,0x49,0xc2]
+; NDD-NEXT:    shrl $7, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0xc1,0xef,0x07]
+; NDD-NEXT:    cmovnsl %edx, %esi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x49,0xf2]
 ; NDD-NEXT:    retq # encoding: [0xc3]
   %s = lshr i32 %mask, 7
   %tobool = icmp sgt i32 %s, -1
@@ -1100,9 +1098,8 @@ define { i64, i64 } @pr39968(i64, i64, i32) {
 ; NDD:       # %bb.0:
 ; NDD-NEXT:    xorl %eax, %eax # encoding: [0x31,0xc0]
 ; NDD-NEXT:    testb $64, %dl # encoding: [0xf6,0xc2,0x40]
-; NDD-NEXT:    cmovneq %rdi, %rsi # encoding: [0x48,0x0f,0x45,0xf7]
-; NDD-NEXT:    cmovneq %rdi, %rax # encoding: [0x48,0x0f,0x45,0xc7]
-; NDD-NEXT:    movq %rsi, %rdx # encoding: [0x48,0x89,0xf2]
+; NDD-NEXT:    cmovneq %rdi, %rsi, %rdx # encoding: [0x62,0xf4,0xec,0x18,0x45,0xf7]
+; NDD-NEXT:    cmovneq %rdi, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x0f,0x45,0xc7]
 ; NDD-NEXT:    retq # encoding: [0xc3]
   %4 = and i32 %2, 64
   %5 = icmp ne i32 %4, 0
diff --git a/llvm/test/MC/Disassembler/X86/apx/cfcmov.txt b/llvm/test/MC/Disassembler/X86/apx/cfcmov.txt
new file mode 100644
index 00000000000000..378d890e08fcc4
--- /dev/null
+++ b/llvm/test/MC/Disassembler/X86/apx/cfcmov.txt
@@ -0,0 +1,962 @@
+# RUN: llvm-mc -triple x86_64 -disassemble %s | FileCheck %s --check-prefix=ATT
+# RUN: llvm-mc -triple x86_64 -disassemble -output-asm-variant=1 %s | FileCheck %s --check-prefix=INTEL
+
+# ATT:   cfcmovbw	%dx, %ax, %r9w
+# INTEL: cfcmovb	r9w, ax, dx
+0x62,0xf4,0x35,0x1c,0x42,0xc2
+
+# ATT:   cfcmovbl	%ecx, %edx, %r10d
+# INTEL: cfcmovb	r10d, edx, ecx
+0x62,0xf4,0x2c,0x1c,0x42,0xd1
+
+# ATT:   cfcmovbq	%r9, %r15, %r11
+# INTEL: cfcmovb	r11, r15, r9
+0x62,0x54,0xa4,0x1c,0x42,0xf9
+
+# ATT:   cfcmovbw	123(%r8,%rax,4), %dx, %ax
+# INTEL: cfcmovb	ax, dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x1c,0x42,0x54,0x80,0x7b
+
+# ATT:   cfcmovbl	123(%r8,%rax,4), %ecx, %edx
+# INTEL: cfcmovb	edx, ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x6c,0x1c,0x42,0x4c,0x80,0x7b
+
+# ATT:   cfcmovbq	123(%r8,%rax,4), %r9, %r15
+# INTEL: cfcmovb	r15, r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0x84,0x1c,0x42,0x4c,0x80,0x7b
+
+# ATT:   cfcmovbw	%dx, 123(%r8,%rax,4)
+# INTEL: cfcmovb	word ptr [r8 + 4*rax + 123], dx
+0x62,0xd4,0x7d,0x0c,0x42,0x54,0x80,0x7b
+
+# ATT:   cfcmovbl	%ecx, 123(%r8,%rax,4)
+# INTEL: cfcmovb	dword ptr [r8 + 4*rax + 123], ecx
+0x62,0xd4,0x7c,0x0c,0x42,0x4c,0x80,0x7b
+
+# ATT:   cfcmovbq	%r9, 123(%r8,%rax,4)
+# INTEL: cfcmovb	qword ptr [r8 + 4*rax + 123], r9
+0x62,0x54,0xfc,0x0c,0x42,0x4c,0x80,0x7b
+
+# ATT:   cfcmovbw	123(%r8,%rax,4), %dx
+# INTEL: cfcmovb	dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x08,0x42,0x54,0x80,0x7b
+
+# ATT:   cfcmovbl	123(%r8,%rax,4), %ecx
+# INTEL: cfcmovb	ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7c,0x08,0x42,0x4c,0x80,0x7b
+
+# ATT:   cfcmovbq	123(%r8,%rax,4), %r9
+# INTEL: cfcmovb	r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0xfc,0x08,0x42,0x4c,0x80,0x7b
+
+# ATT:   cfcmovbw	%dx, %ax
+# INTEL: cfcmovb	ax, dx
+0x62,0xf4,0x7d,0x08,0x42,0xc2
+
+# ATT:   cfcmovbl	%ecx, %edx
+# INTEL: cfcmovb	edx, ecx
+0x62,0xf4,0x7c,0x08,0x42,0xd1
+
+# ATT:   cfcmovbq	%r9, %r15
+# INTEL: cfcmovb	r15, r9
+0x62,0x54,0xfc,0x08,0x42,0xf9
+
+# ATT:   cfcmovbew	%dx, %ax, %r9w
+# INTEL: cfcmovbe	r9w, ax, dx
+0x62,0xf4,0x35,0x1c,0x46,0xc2
+
+# ATT:   cfcmovbel	%ecx, %edx, %r10d
+# INTEL: cfcmovbe	r10d, edx, ecx
+0x62,0xf4,0x2c,0x1c,0x46,0xd1
+
+# ATT:   cfcmovbeq	%r9, %r15, %r11
+# INTEL: cfcmovbe	r11, r15, r9
+0x62,0x54,0xa4,0x1c,0x46,0xf9
+
+# ATT:   cfcmovbew	123(%r8,%rax,4), %dx, %ax
+# INTEL: cfcmovbe	ax, dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x1c,0x46,0x54,0x80,0x7b
+
+# ATT:   cfcmovbel	123(%r8,%rax,4), %ecx, %edx
+# INTEL: cfcmovbe	edx, ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x6c,0x1c,0x46,0x4c,0x80,0x7b
+
+# ATT:   cfcmovbeq	123(%r8,%rax,4), %r9, %r15
+# INTEL: cfcmovbe	r15, r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0x84,0x1c,0x46,0x4c,0x80,0x7b
+
+# ATT:   cfcmovbew	%dx, 123(%r8,%rax,4)
+# INTEL: cfcmovbe	word ptr [r8 + 4*rax + 123], dx
+0x62,0xd4,0x7d,0x0c,0x46,0x54,0x80,0x7b
+
+# ATT:   cfcmovbel	%ecx, 123(%r8,%rax,4)
+# INTEL: cfcmovbe	dword ptr [r8 + 4*rax + 123], ecx
+0x62,0xd4,0x7c,0x0c,0x46,0x4c,0x80,0x7b
+
+# ATT:   cfcmovbeq	%r9, 123(%r8,%rax,4)
+# INTEL: cfcmovbe	qword ptr [r8 + 4*rax + 123], r9
+0x62,0x54,0xfc,0x0c,0x46,0x4c,0x80,0x7b
+
+# ATT:   cfcmovbew	123(%r8,%rax,4), %dx
+# INTEL: cfcmovbe	dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x08,0x46,0x54,0x80,0x7b
+
+# ATT:   cfcmovbel	123(%r8,%rax,4), %ecx
+# INTEL: cfcmovbe	ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7c,0x08,0x46,0x4c,0x80,0x7b
+
+# ATT:   cfcmovbeq	123(%r8,%rax,4), %r9
+# INTEL: cfcmovbe	r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0xfc,0x08,0x46,0x4c,0x80,0x7b
+
+# ATT:   cfcmovbew	%dx, %ax
+# INTEL: cfcmovbe	ax, dx
+0x62,0xf4,0x7d,0x08,0x46,0xc2
+
+# ATT:   cfcmovbel	%ecx, %edx
+# INTEL: cfcmovbe	edx, ecx
+0x62,0xf4,0x7c,0x08,0x46,0xd1
+
+# ATT:   cfcmovbeq	%r9, %r15
+# INTEL: cfcmovbe	r15, r9
+0x62,0x54,0xfc,0x08,0x46,0xf9
+
+# ATT:   cfcmovlw	%dx, %ax, %r9w
+# INTEL: cfcmovl	r9w, ax, dx
+0x62,0xf4,0x35,0x1c,0x4c,0xc2
+
+# ATT:   cfcmovll	%ecx, %edx, %r10d
+# INTEL: cfcmovl	r10d, edx, ecx
+0x62,0xf4,0x2c,0x1c,0x4c,0xd1
+
+# ATT:   cfcmovlq	%r9, %r15, %r11
+# INTEL: cfcmovl	r11, r15, r9
+0x62,0x54,0xa4,0x1c,0x4c,0xf9
+
+# ATT:   cfcmovlw	123(%r8,%rax,4), %dx, %ax
+# INTEL: cfcmovl	ax, dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x1c,0x4c,0x54,0x80,0x7b
+
+# ATT:   cfcmovll	123(%r8,%rax,4), %ecx, %edx
+# INTEL: cfcmovl	edx, ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x6c,0x1c,0x4c,0x4c,0x80,0x7b
+
+# ATT:   cfcmovlq	123(%r8,%rax,4), %r9, %r15
+# INTEL: cfcmovl	r15, r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0x84,0x1c,0x4c,0x4c,0x80,0x7b
+
+# ATT:   cfcmovlw	%dx, 123(%r8,%rax,4)
+# INTEL: cfcmovl	word ptr [r8 + 4*rax + 123], dx
+0x62,0xd4,0x7d,0x0c,0x4c,0x54,0x80,0x7b
+
+# ATT:   cfcmovll	%ecx, 123(%r8,%rax,4)
+# INTEL: cfcmovl	dword ptr [r8 + 4*rax + 123], ecx
+0x62,0xd4,0x7c,0x0c,0x4c,0x4c,0x80,0x7b
+
+# ATT:   cfcmovlq	%r9, 123(%r8,%rax,4)
+# INTEL: cfcmovl	qword ptr [r8 + 4*rax + 123], r9
+0x62,0x54,0xfc,0x0c,0x4c,0x4c,0x80,0x7b
+
+# ATT:   cfcmovlw	123(%r8,%rax,4), %dx
+# INTEL: cfcmovl	dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x08,0x4c,0x54,0x80,0x7b
+
+# ATT:   cfcmovll	123(%r8,%rax,4), %ecx
+# INTEL: cfcmovl	ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7c,0x08,0x4c,0x4c,0x80,0x7b
+
+# ATT:   cfcmovlq	123(%r8,%rax,4), %r9
+# INTEL: cfcmovl	r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0xfc,0x08,0x4c,0x4c,0x80,0x7b
+
+# ATT:   cfcmovlw	%dx, %ax
+# INTEL: cfcmovl	ax, dx
+0x62,0xf4,0x7d,0x08,0x4c,0xc2
+
+# ATT:   cfcmovll	%ecx, %edx
+# INTEL: cfcmovl	edx, ecx
+0x62,0xf4,0x7c,0x08,0x4c,0xd1
+
+# ATT:   cfcmovlq	%r9, %r15
+# INTEL: cfcmovl	r15, r9
+0x62,0x54,0xfc,0x08,0x4c,0xf9
+
+# ATT:   cfcmovlew	%dx, %ax, %r9w
+# INTEL: cfcmovle	r9w, ax, dx
+0x62,0xf4,0x35,0x1c,0x4e,0xc2
+
+# ATT:   cfcmovlel	%ecx, %edx, %r10d
+# INTEL: cfcmovle	r10d, edx, ecx
+0x62,0xf4,0x2c,0x1c,0x4e,0xd1
+
+# ATT:   cfcmovleq	%r9, %r15, %r11
+# INTEL: cfcmovle	r11, r15, r9
+0x62,0x54,0xa4,0x1c,0x4e,0xf9
+
+# ATT:   cfcmovlew	123(%r8,%rax,4), %dx, %ax
+# INTEL: cfcmovle	ax, dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x1c,0x4e,0x54,0x80,0x7b
+
+# ATT:   cfcmovlel	123(%r8,%rax,4), %ecx, %edx
+# INTEL: cfcmovle	edx, ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x6c,0x1c,0x4e,0x4c,0x80,0x7b
+
+# ATT:   cfcmovleq	123(%r8,%rax,4), %r9, %r15
+# INTEL: cfcmovle	r15, r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0x84,0x1c,0x4e,0x4c,0x80,0x7b
+
+# ATT:   cfcmovlew	%dx, 123(%r8,%rax,4)
+# INTEL: cfcmovle	word ptr [r8 + 4*rax + 123], dx
+0x62,0xd4,0x7d,0x0c,0x4e,0x54,0x80,0x7b
+
+# ATT:   cfcmovlel	%ecx, 123(%r8,%rax,4)
+# INTEL: cfcmovle	dword ptr [r8 + 4*rax + 123], ecx
+0x62,0xd4,0x7c,0x0c,0x4e,0x4c,0x80,0x7b
+
+# ATT:   cfcmovleq	%r9, 123(%r8,%rax,4)
+# INTEL: cfcmovle	qword ptr [r8 + 4*rax + 123], r9
+0x62,0x54,0xfc,0x0c,0x4e,0x4c,0x80,0x7b
+
+# ATT:   cfcmovlew	123(%r8,%rax,4), %dx
+# INTEL: cfcmovle	dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x08,0x4e,0x54,0x80,0x7b
+
+# ATT:   cfcmovlel	123(%r8,%rax,4), %ecx
+# INTEL: cfcmovle	ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7c,0x08,0x4e,0x4c,0x80,0x7b
+
+# ATT:   cfcmovleq	123(%r8,%rax,4), %r9
+# INTEL: cfcmovle	r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0xfc,0x08,0x4e,0x4c,0x80,0x7b
+
+# ATT:   cfcmovlew	%dx, %ax
+# INTEL: cfcmovle	ax, dx
+0x62,0xf4,0x7d,0x08,0x4e,0xc2
+
+# ATT:   cfcmovlel	%ecx, %edx
+# INTEL: cfcmovle	edx, ecx
+0x62,0xf4,0x7c,0x08,0x4e,0xd1
+
+# ATT:   cfcmovleq	%r9, %r15
+# INTEL: cfcmovle	r15, r9
+0x62,0x54,0xfc,0x08,0x4e,0xf9
+
+# ATT:   cfcmovaew	%dx, %ax, %r9w
+# INTEL: cfcmovae	r9w, ax, dx
+0x62,0xf4,0x35,0x1c,0x43,0xc2
+
+# ATT:   cfcmovael	%ecx, %edx, %r10d
+# INTEL: cfcmovae	r10d, edx, ecx
+0x62,0xf4,0x2c,0x1c,0x43,0xd1
+
+# ATT:   cfcmovaeq	%r9, %r15, %r11
+# INTEL: cfcmovae	r11, r15, r9
+0x62,0x54,0xa4,0x1c,0x43,0xf9
+
+# ATT:   cfcmovaew	123(%r8,%rax,4), %dx, %ax
+# INTEL: cfcmovae	ax, dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x1c,0x43,0x54,0x80,0x7b
+
+# ATT:   cfcmovael	123(%r8,%rax,4), %ecx, %edx
+# INTEL: cfcmovae	edx, ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x6c,0x1c,0x43,0x4c,0x80,0x7b
+
+# ATT:   cfcmovaeq	123(%r8,%rax,4), %r9, %r15
+# INTEL: cfcmovae	r15, r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0x84,0x1c,0x43,0x4c,0x80,0x7b
+
+# ATT:   cfcmovaew	%dx, 123(%r8,%rax,4)
+# INTEL: cfcmovae	word ptr [r8 + 4*rax + 123], dx
+0x62,0xd4,0x7d,0x0c,0x43,0x54,0x80,0x7b
+
+# ATT:   cfcmovael	%ecx, 123(%r8,%rax,4)
+# INTEL: cfcmovae	dword ptr [r8 + 4*rax + 123], ecx
+0x62,0xd4,0x7c,0x0c,0x43,0x4c,0x80,0x7b
+
+# ATT:   cfcmovaeq	%r9, 123(%r8,%rax,4)
+# INTEL: cfcmovae	qword ptr [r8 + 4*rax + 123], r9
+0x62,0x54,0xfc,0x0c,0x43,0x4c,0x80,0x7b
+
+# ATT:   cfcmovaew	123(%r8,%rax,4), %dx
+# INTEL: cfcmovae	dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x08,0x43,0x54,0x80,0x7b
+
+# ATT:   cfcmovael	123(%r8,%rax,4), %ecx
+# INTEL: cfcmovae	ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7c,0x08,0x43,0x4c,0x80,0x7b
+
+# ATT:   cfcmovaeq	123(%r8,%rax,4), %r9
+# INTEL: cfcmovae	r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0xfc,0x08,0x43,0x4c,0x80,0x7b
+
+# ATT:   cfcmovaew	%dx, %ax
+# INTEL: cfcmovae	ax, dx
+0x62,0xf4,0x7d,0x08,0x43,0xc2
+
+# ATT:   cfcmovael	%ecx, %edx
+# INTEL: cfcmovae	edx, ecx
+0x62,0xf4,0x7c,0x08,0x43,0xd1
+
+# ATT:   cfcmovaeq	%r9, %r15
+# INTEL: cfcmovae	r15, r9
+0x62,0x54,0xfc,0x08,0x43,0xf9
+
+# ATT:   cfcmovaw	%dx, %ax, %r9w
+# INTEL: cfcmova	r9w, ax, dx
+0x62,0xf4,0x35,0x1c,0x47,0xc2
+
+# ATT:   cfcmoval	%ecx, %edx, %r10d
+# INTEL: cfcmova	r10d, edx, ecx
+0x62,0xf4,0x2c,0x1c,0x47,0xd1
+
+# ATT:   cfcmovaq	%r9, %r15, %r11
+# INTEL: cfcmova	r11, r15, r9
+0x62,0x54,0xa4,0x1c,0x47,0xf9
+
+# ATT:   cfcmovaw	123(%r8,%rax,4), %dx, %ax
+# INTEL: cfcmova	ax, dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x1c,0x47,0x54,0x80,0x7b
+
+# ATT:   cfcmoval	123(%r8,%rax,4), %ecx, %edx
+# INTEL: cfcmova	edx, ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x6c,0x1c,0x47,0x4c,0x80,0x7b
+
+# ATT:   cfcmovaq	123(%r8,%rax,4), %r9, %r15
+# INTEL: cfcmova	r15, r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0x84,0x1c,0x47,0x4c,0x80,0x7b
+
+# ATT:   cfcmovaw	%dx, 123(%r8,%rax,4)
+# INTEL: cfcmova	word ptr [r8 + 4*rax + 123], dx
+0x62,0xd4,0x7d,0x0c,0x47,0x54,0x80,0x7b
+
+# ATT:   cfcmoval	%ecx, 123(%r8,%rax,4)
+# INTEL: cfcmova	dword ptr [r8 + 4*rax + 123], ecx
+0x62,0xd4,0x7c,0x0c,0x47,0x4c,0x80,0x7b
+
+# ATT:   cfcmovaq	%r9, 123(%r8,%rax,4)
+# INTEL: cfcmova	qword ptr [r8 + 4*rax + 123], r9
+0x62,0x54,0xfc,0x0c,0x47,0x4c,0x80,0x7b
+
+# ATT:   cfcmovaw	123(%r8,%rax,4), %dx
+# INTEL: cfcmova	dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x08,0x47,0x54,0x80,0x7b
+
+# ATT:   cfcmoval	123(%r8,%rax,4), %ecx
+# INTEL: cfcmova	ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7c,0x08,0x47,0x4c,0x80,0x7b
+
+# ATT:   cfcmovaq	123(%r8,%rax,4), %r9
+# INTEL: cfcmova	r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0xfc,0x08,0x47,0x4c,0x80,0x7b
+
+# ATT:   cfcmovaw	%dx, %ax
+# INTEL: cfcmova	ax, dx
+0x62,0xf4,0x7d,0x08,0x47,0xc2
+
+# ATT:   cfcmoval	%ecx, %edx
+# INTEL: cfcmova	edx, ecx
+0x62,0xf4,0x7c,0x08,0x47,0xd1
+
+# ATT:   cfcmovaq	%r9, %r15
+# INTEL: cfcmova	r15, r9
+0x62,0x54,0xfc,0x08,0x47,0xf9
+
+# ATT:   cfcmovgew	%dx, %ax, %r9w
+# INTEL: cfcmovge	r9w, ax, dx
+0x62,0xf4,0x35,0x1c,0x4d,0xc2
+
+# ATT:   cfcmovgel	%ecx, %edx, %r10d
+# INTEL: cfcmovge	r10d, edx, ecx
+0x62,0xf4,0x2c,0x1c,0x4d,0xd1
+
+# ATT:   cfcmovgeq	%r9, %r15, %r11
+# INTEL: cfcmovge	r11, r15, r9
+0x62,0x54,0xa4,0x1c,0x4d,0xf9
+
+# ATT:   cfcmovgew	123(%r8,%rax,4), %dx, %ax
+# INTEL: cfcmovge	ax, dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x1c,0x4d,0x54,0x80,0x7b
+
+# ATT:   cfcmovgel	123(%r8,%rax,4), %ecx, %edx
+# INTEL: cfcmovge	edx, ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x6c,0x1c,0x4d,0x4c,0x80,0x7b
+
+# ATT:   cfcmovgeq	123(%r8,%rax,4), %r9, %r15
+# INTEL: cfcmovge	r15, r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0x84,0x1c,0x4d,0x4c,0x80,0x7b
+
+# ATT:   cfcmovgew	%dx, 123(%r8,%rax,4)
+# INTEL: cfcmovge	word ptr [r8 + 4*rax + 123], dx
+0x62,0xd4,0x7d,0x0c,0x4d,0x54,0x80,0x7b
+
+# ATT:   cfcmovgel	%ecx, 123(%r8,%rax,4)
+# INTEL: cfcmovge	dword ptr [r8 + 4*rax + 123], ecx
+0x62,0xd4,0x7c,0x0c,0x4d,0x4c,0x80,0x7b
+
+# ATT:   cfcmovgeq	%r9, 123(%r8,%rax,4)
+# INTEL: cfcmovge	qword ptr [r8 + 4*rax + 123], r9
+0x62,0x54,0xfc,0x0c,0x4d,0x4c,0x80,0x7b
+
+# ATT:   cfcmovgew	123(%r8,%rax,4), %dx
+# INTEL: cfcmovge	dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x08,0x4d,0x54,0x80,0x7b
+
+# ATT:   cfcmovgel	123(%r8,%rax,4), %ecx
+# INTEL: cfcmovge	ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7c,0x08,0x4d,0x4c,0x80,0x7b
+
+# ATT:   cfcmovgeq	123(%r8,%rax,4), %r9
+# INTEL: cfcmovge	r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0xfc,0x08,0x4d,0x4c,0x80,0x7b
+
+# ATT:   cfcmovgew	%dx, %ax
+# INTEL: cfcmovge	ax, dx
+0x62,0xf4,0x7d,0x08,0x4d,0xc2
+
+# ATT:   cfcmovgel	%ecx, %edx
+# INTEL: cfcmovge	edx, ecx
+0x62,0xf4,0x7c,0x08,0x4d,0xd1
+
+# ATT:   cfcmovgeq	%r9, %r15
+# INTEL: cfcmovge	r15, r9
+0x62,0x54,0xfc,0x08,0x4d,0xf9
+
+# ATT:   cfcmovgw	%dx, %ax, %r9w
+# INTEL: cfcmovg	r9w, ax, dx
+0x62,0xf4,0x35,0x1c,0x4f,0xc2
+
+# ATT:   cfcmovgl	%ecx, %edx, %r10d
+# INTEL: cfcmovg	r10d, edx, ecx
+0x62,0xf4,0x2c,0x1c,0x4f,0xd1
+
+# ATT:   cfcmovgq	%r9, %r15, %r11
+# INTEL: cfcmovg	r11, r15, r9
+0x62,0x54,0xa4,0x1c,0x4f,0xf9
+
+# ATT:   cfcmovgw	123(%r8,%rax,4), %dx, %ax
+# INTEL: cfcmovg	ax, dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x1c,0x4f,0x54,0x80,0x7b
+
+# ATT:   cfcmovgl	123(%r8,%rax,4), %ecx, %edx
+# INTEL: cfcmovg	edx, ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x6c,0x1c,0x4f,0x4c,0x80,0x7b
+
+# ATT:   cfcmovgq	123(%r8,%rax,4), %r9, %r15
+# INTEL: cfcmovg	r15, r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0x84,0x1c,0x4f,0x4c,0x80,0x7b
+
+# ATT:   cfcmovgw	%dx, 123(%r8,%rax,4)
+# INTEL: cfcmovg	word ptr [r8 + 4*rax + 123], dx
+0x62,0xd4,0x7d,0x0c,0x4f,0x54,0x80,0x7b
+
+# ATT:   cfcmovgl	%ecx, 123(%r8,%rax,4)
+# INTEL: cfcmovg	dword ptr [r8 + 4*rax + 123], ecx
+0x62,0xd4,0x7c,0x0c,0x4f,0x4c,0x80,0x7b
+
+# ATT:   cfcmovgq	%r9, 123(%r8,%rax,4)
+# INTEL: cfcmovg	qword ptr [r8 + 4*rax + 123], r9
+0x62,0x54,0xfc,0x0c,0x4f,0x4c,0x80,0x7b
+
+# ATT:   cfcmovgw	123(%r8,%rax,4), %dx
+# INTEL: cfcmovg	dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x08,0x4f,0x54,0x80,0x7b
+
+# ATT:   cfcmovgl	123(%r8,%rax,4), %ecx
+# INTEL: cfcmovg	ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7c,0x08,0x4f,0x4c,0x80,0x7b
+
+# ATT:   cfcmovgq	123(%r8,%rax,4), %r9
+# INTEL: cfcmovg	r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0xfc,0x08,0x4f,0x4c,0x80,0x7b
+
+# ATT:   cfcmovgw	%dx, %ax
+# INTEL: cfcmovg	ax, dx
+0x62,0xf4,0x7d,0x08,0x4f,0xc2
+
+# ATT:   cfcmovgl	%ecx, %edx
+# INTEL: cfcmovg	edx, ecx
+0x62,0xf4,0x7c,0x08,0x4f,0xd1
+
+# ATT:   cfcmovgq	%r9, %r15
+# INTEL: cfcmovg	r15, r9
+0x62,0x54,0xfc,0x08,0x4f,0xf9
+
+# ATT:   cfcmovnow	%dx, %ax, %r9w
+# INTEL: cfcmovno	r9w, ax, dx
+0x62,0xf4,0x35,0x1c,0x41,0xc2
+
+# ATT:   cfcmovnol	%ecx, %edx, %r10d
+# INTEL: cfcmovno	r10d, edx, ecx
+0x62,0xf4,0x2c,0x1c,0x41,0xd1
+
+# ATT:   cfcmovnoq	%r9, %r15, %r11
+# INTEL: cfcmovno	r11, r15, r9
+0x62,0x54,0xa4,0x1c,0x41,0xf9
+
+# ATT:   cfcmovnow	123(%r8,%rax,4), %dx, %ax
+# INTEL: cfcmovno	ax, dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x1c,0x41,0x54,0x80,0x7b
+
+# ATT:   cfcmovnol	123(%r8,%rax,4), %ecx, %edx
+# INTEL: cfcmovno	edx, ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x6c,0x1c,0x41,0x4c,0x80,0x7b
+
+# ATT:   cfcmovnoq	123(%r8,%rax,4), %r9, %r15
+# INTEL: cfcmovno	r15, r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0x84,0x1c,0x41,0x4c,0x80,0x7b
+
+# ATT:   cfcmovnow	%dx, 123(%r8,%rax,4)
+# INTEL: cfcmovno	word ptr [r8 + 4*rax + 123], dx
+0x62,0xd4,0x7d,0x0c,0x41,0x54,0x80,0x7b
+
+# ATT:   cfcmovnol	%ecx, 123(%r8,%rax,4)
+# INTEL: cfcmovno	dword ptr [r8 + 4*rax + 123], ecx
+0x62,0xd4,0x7c,0x0c,0x41,0x4c,0x80,0x7b
+
+# ATT:   cfcmovnoq	%r9, 123(%r8,%rax,4)
+# INTEL: cfcmovno	qword ptr [r8 + 4*rax + 123], r9
+0x62,0x54,0xfc,0x0c,0x41,0x4c,0x80,0x7b
+
+# ATT:   cfcmovnow	123(%r8,%rax,4), %dx
+# INTEL: cfcmovno	dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x08,0x41,0x54,0x80,0x7b
+
+# ATT:   cfcmovnol	123(%r8,%rax,4), %ecx
+# INTEL: cfcmovno	ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7c,0x08,0x41,0x4c,0x80,0x7b
+
+# ATT:   cfcmovnoq	123(%r8,%rax,4), %r9
+# INTEL: cfcmovno	r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0xfc,0x08,0x41,0x4c,0x80,0x7b
+
+# ATT:   cfcmovnow	%dx, %ax
+# INTEL: cfcmovno	ax, dx
+0x62,0xf4,0x7d,0x08,0x41,0xc2
+
+# ATT:   cfcmovnol	%ecx, %edx
+# INTEL: cfcmovno	edx, ecx
+0x62,0xf4,0x7c,0x08,0x41,0xd1
+
+# ATT:   cfcmovnoq	%r9, %r15
+# INTEL: cfcmovno	r15, r9
+0x62,0x54,0xfc,0x08,0x41,0xf9
+
+# ATT:   cfcmovnpw	%dx, %ax, %r9w
+# INTEL: cfcmovnp	r9w, ax, dx
+0x62,0xf4,0x35,0x1c,0x4b,0xc2
+
+# ATT:   cfcmovnpl	%ecx, %edx, %r10d
+# INTEL: cfcmovnp	r10d, edx, ecx
+0x62,0xf4,0x2c,0x1c,0x4b,0xd1
+
+# ATT:   cfcmovnpq	%r9, %r15, %r11
+# INTEL: cfcmovnp	r11, r15, r9
+0x62,0x54,0xa4,0x1c,0x4b,0xf9
+
+# ATT:   cfcmovnpw	123(%r8,%rax,4), %dx, %ax
+# INTEL: cfcmovnp	ax, dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x1c,0x4b,0x54,0x80,0x7b
+
+# ATT:   cfcmovnpl	123(%r8,%rax,4), %ecx, %edx
+# INTEL: cfcmovnp	edx, ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x6c,0x1c,0x4b,0x4c,0x80,0x7b
+
+# ATT:   cfcmovnpq	123(%r8,%rax,4), %r9, %r15
+# INTEL: cfcmovnp	r15, r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0x84,0x1c,0x4b,0x4c,0x80,0x7b
+
+# ATT:   cfcmovnpw	%dx, 123(%r8,%rax,4)
+# INTEL: cfcmovnp	word ptr [r8 + 4*rax + 123], dx
+0x62,0xd4,0x7d,0x0c,0x4b,0x54,0x80,0x7b
+
+# ATT:   cfcmovnpl	%ecx, 123(%r8,%rax,4)
+# INTEL: cfcmovnp	dword ptr [r8 + 4*rax + 123], ecx
+0x62,0xd4,0x7c,0x0c,0x4b,0x4c,0x80,0x7b
+
+# ATT:   cfcmovnpq	%r9, 123(%r8,%rax,4)
+# INTEL: cfcmovnp	qword ptr [r8 + 4*rax + 123], r9
+0x62,0x54,0xfc,0x0c,0x4b,0x4c,0x80,0x7b
+
+# ATT:   cfcmovnpw	123(%r8,%rax,4), %dx
+# INTEL: cfcmovnp	dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x08,0x4b,0x54,0x80,0x7b
+
+# ATT:   cfcmovnpl	123(%r8,%rax,4), %ecx
+# INTEL: cfcmovnp	ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7c,0x08,0x4b,0x4c,0x80,0x7b
+
+# ATT:   cfcmovnpq	123(%r8,%rax,4), %r9
+# INTEL: cfcmovnp	r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0xfc,0x08,0x4b,0x4c,0x80,0x7b
+
+# ATT:   cfcmovnpw	%dx, %ax
+# INTEL: cfcmovnp	ax, dx
+0x62,0xf4,0x7d,0x08,0x4b,0xc2
+
+# ATT:   cfcmovnpl	%ecx, %edx
+# INTEL: cfcmovnp	edx, ecx
+0x62,0xf4,0x7c,0x08,0x4b,0xd1
+
+# ATT:   cfcmovnpq	%r9, %r15
+# INTEL: cfcmovnp	r15, r9
+0x62,0x54,0xfc,0x08,0x4b,0xf9
+
+# ATT:   cfcmovnsw	%dx, %ax, %r9w
+# INTEL: cfcmovns	r9w, ax, dx
+0x62,0xf4,0x35,0x1c,0x49,0xc2
+
+# ATT:   cfcmovnsl	%ecx, %edx, %r10d
+# INTEL: cfcmovns	r10d, edx, ecx
+0x62,0xf4,0x2c,0x1c,0x49,0xd1
+
+# ATT:   cfcmovnsq	%r9, %r15, %r11
+# INTEL: cfcmovns	r11, r15, r9
+0x62,0x54,0xa4,0x1c,0x49,0xf9
+
+# ATT:   cfcmovnsw	123(%r8,%rax,4), %dx, %ax
+# INTEL: cfcmovns	ax, dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x1c,0x49,0x54,0x80,0x7b
+
+# ATT:   cfcmovnsl	123(%r8,%rax,4), %ecx, %edx
+# INTEL: cfcmovns	edx, ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x6c,0x1c,0x49,0x4c,0x80,0x7b
+
+# ATT:   cfcmovnsq	123(%r8,%rax,4), %r9, %r15
+# INTEL: cfcmovns	r15, r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0x84,0x1c,0x49,0x4c,0x80,0x7b
+
+# ATT:   cfcmovnsw	%dx, 123(%r8,%rax,4)
+# INTEL: cfcmovns	word ptr [r8 + 4*rax + 123], dx
+0x62,0xd4,0x7d,0x0c,0x49,0x54,0x80,0x7b
+
+# ATT:   cfcmovnsl	%ecx, 123(%r8,%rax,4)
+# INTEL: cfcmovns	dword ptr [r8 + 4*rax + 123], ecx
+0x62,0xd4,0x7c,0x0c,0x49,0x4c,0x80,0x7b
+
+# ATT:   cfcmovnsq	%r9, 123(%r8,%rax,4)
+# INTEL: cfcmovns	qword ptr [r8 + 4*rax + 123], r9
+0x62,0x54,0xfc,0x0c,0x49,0x4c,0x80,0x7b
+
+# ATT:   cfcmovnsw	123(%r8,%rax,4), %dx
+# INTEL: cfcmovns	dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x08,0x49,0x54,0x80,0x7b
+
+# ATT:   cfcmovnsl	123(%r8,%rax,4), %ecx
+# INTEL: cfcmovns	ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7c,0x08,0x49,0x4c,0x80,0x7b
+
+# ATT:   cfcmovnsq	123(%r8,%rax,4), %r9
+# INTEL: cfcmovns	r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0xfc,0x08,0x49,0x4c,0x80,0x7b
+
+# ATT:   cfcmovnsw	%dx, %ax
+# INTEL: cfcmovns	ax, dx
+0x62,0xf4,0x7d,0x08,0x49,0xc2
+
+# ATT:   cfcmovnsl	%ecx, %edx
+# INTEL: cfcmovns	edx, ecx
+0x62,0xf4,0x7c,0x08,0x49,0xd1
+
+# ATT:   cfcmovnsq	%r9, %r15
+# INTEL: cfcmovns	r15, r9
+0x62,0x54,0xfc,0x08,0x49,0xf9
+
+# ATT:   cfcmovnew	%dx, %ax, %r9w
+# INTEL: cfcmovne	r9w, ax, dx
+0x62,0xf4,0x35,0x1c,0x45,0xc2
+
+# ATT:   cfcmovnel	%ecx, %edx, %r10d
+# INTEL: cfcmovne	r10d, edx, ecx
+0x62,0xf4,0x2c,0x1c,0x45,0xd1
+
+# ATT:   cfcmovneq	%r9, %r15, %r11
+# INTEL: cfcmovne	r11, r15, r9
+0x62,0x54,0xa4,0x1c,0x45,0xf9
+
+# ATT:   cfcmovnew	123(%r8,%rax,4), %dx, %ax
+# INTEL: cfcmovne	ax, dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x1c,0x45,0x54,0x80,0x7b
+
+# ATT:   cfcmovnel	123(%r8,%rax,4), %ecx, %edx
+# INTEL: cfcmovne	edx, ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x6c,0x1c,0x45,0x4c,0x80,0x7b
+
+# ATT:   cfcmovneq	123(%r8,%rax,4), %r9, %r15
+# INTEL: cfcmovne	r15, r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0x84,0x1c,0x45,0x4c,0x80,0x7b
+
+# ATT:   cfcmovnew	%dx, 123(%r8,%rax,4)
+# INTEL: cfcmovne	word ptr [r8 + 4*rax + 123], dx
+0x62,0xd4,0x7d,0x0c,0x45,0x54,0x80,0x7b
+
+# ATT:   cfcmovnel	%ecx, 123(%r8,%rax,4)
+# INTEL: cfcmovne	dword ptr [r8 + 4*rax + 123], ecx
+0x62,0xd4,0x7c,0x0c,0x45,0x4c,0x80,0x7b
+
+# ATT:   cfcmovneq	%r9, 123(%r8,%rax,4)
+# INTEL: cfcmovne	qword ptr [r8 + 4*rax + 123], r9
+0x62,0x54,0xfc,0x0c,0x45,0x4c,0x80,0x7b
+
+# ATT:   cfcmovnew	123(%r8,%rax,4), %dx
+# INTEL: cfcmovne	dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x08,0x45,0x54,0x80,0x7b
+
+# ATT:   cfcmovnel	123(%r8,%rax,4), %ecx
+# INTEL: cfcmovne	ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7c,0x08,0x45,0x4c,0x80,0x7b
+
+# ATT:   cfcmovneq	123(%r8,%rax,4), %r9
+# INTEL: cfcmovne	r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0xfc,0x08,0x45,0x4c,0x80,0x7b
+
+# ATT:   cfcmovnew	%dx, %ax
+# INTEL: cfcmovne	ax, dx
+0x62,0xf4,0x7d,0x08,0x45,0xc2
+
+# ATT:   cfcmovnel	%ecx, %edx
+# INTEL: cfcmovne	edx, ecx
+0x62,0xf4,0x7c,0x08,0x45,0xd1
+
+# ATT:   cfcmovneq	%r9, %r15
+# INTEL: cfcmovne	r15, r9
+0x62,0x54,0xfc,0x08,0x45,0xf9
+
+# ATT:   cfcmovow	%dx, %ax, %r9w
+# INTEL: cfcmovo	r9w, ax, dx
+0x62,0xf4,0x35,0x1c,0x40,0xc2
+
+# ATT:   cfcmovol	%ecx, %edx, %r10d
+# INTEL: cfcmovo	r10d, edx, ecx
+0x62,0xf4,0x2c,0x1c,0x40,0xd1
+
+# ATT:   cfcmovoq	%r9, %r15, %r11
+# INTEL: cfcmovo	r11, r15, r9
+0x62,0x54,0xa4,0x1c,0x40,0xf9
+
+# ATT:   cfcmovow	123(%r8,%rax,4), %dx, %ax
+# INTEL: cfcmovo	ax, dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x1c,0x40,0x54,0x80,0x7b
+
+# ATT:   cfcmovol	123(%r8,%rax,4), %ecx, %edx
+# INTEL: cfcmovo	edx, ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x6c,0x1c,0x40,0x4c,0x80,0x7b
+
+# ATT:   cfcmovoq	123(%r8,%rax,4), %r9, %r15
+# INTEL: cfcmovo	r15, r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0x84,0x1c,0x40,0x4c,0x80,0x7b
+
+# ATT:   cfcmovow	%dx, 123(%r8,%rax,4)
+# INTEL: cfcmovo	word ptr [r8 + 4*rax + 123], dx
+0x62,0xd4,0x7d,0x0c,0x40,0x54,0x80,0x7b
+
+# ATT:   cfcmovol	%ecx, 123(%r8,%rax,4)
+# INTEL: cfcmovo	dword ptr [r8 + 4*rax + 123], ecx
+0x62,0xd4,0x7c,0x0c,0x40,0x4c,0x80,0x7b
+
+# ATT:   cfcmovoq	%r9, 123(%r8,%rax,4)
+# INTEL: cfcmovo	qword ptr [r8 + 4*rax + 123], r9
+0x62,0x54,0xfc,0x0c,0x40,0x4c,0x80,0x7b
+
+# ATT:   cfcmovow	123(%r8,%rax,4), %dx
+# INTEL: cfcmovo	dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x08,0x40,0x54,0x80,0x7b
+
+# ATT:   cfcmovol	123(%r8,%rax,4), %ecx
+# INTEL: cfcmovo	ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7c,0x08,0x40,0x4c,0x80,0x7b
+
+# ATT:   cfcmovoq	123(%r8,%rax,4), %r9
+# INTEL: cfcmovo	r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0xfc,0x08,0x40,0x4c,0x80,0x7b
+
+# ATT:   cfcmovow	%dx, %ax
+# INTEL: cfcmovo	ax, dx
+0x62,0xf4,0x7d,0x08,0x40,0xc2
+
+# ATT:   cfcmovol	%ecx, %edx
+# INTEL: cfcmovo	edx, ecx
+0x62,0xf4,0x7c,0x08,0x40,0xd1
+
+# ATT:   cfcmovoq	%r9, %r15
+# INTEL: cfcmovo	r15, r9
+0x62,0x54,0xfc,0x08,0x40,0xf9
+
+# ATT:   cfcmovpw	%dx, %ax, %r9w
+# INTEL: cfcmovp	r9w, ax, dx
+0x62,0xf4,0x35,0x1c,0x4a,0xc2
+
+# ATT:   cfcmovpl	%ecx, %edx, %r10d
+# INTEL: cfcmovp	r10d, edx, ecx
+0x62,0xf4,0x2c,0x1c,0x4a,0xd1
+
+# ATT:   cfcmovpq	%r9, %r15, %r11
+# INTEL: cfcmovp	r11, r15, r9
+0x62,0x54,0xa4,0x1c,0x4a,0xf9
+
+# ATT:   cfcmovpw	123(%r8,%rax,4), %dx, %ax
+# INTEL: cfcmovp	ax, dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x1c,0x4a,0x54,0x80,0x7b
+
+# ATT:   cfcmovpl	123(%r8,%rax,4), %ecx, %edx
+# INTEL: cfcmovp	edx, ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x6c,0x1c,0x4a,0x4c,0x80,0x7b
+
+# ATT:   cfcmovpq	123(%r8,%rax,4), %r9, %r15
+# INTEL: cfcmovp	r15, r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0x84,0x1c,0x4a,0x4c,0x80,0x7b
+
+# ATT:   cfcmovpw	%dx, 123(%r8,%rax,4)
+# INTEL: cfcmovp	word ptr [r8 + 4*rax + 123], dx
+0x62,0xd4,0x7d,0x0c,0x4a,0x54,0x80,0x7b
+
+# ATT:   cfcmovpl	%ecx, 123(%r8,%rax,4)
+# INTEL: cfcmovp	dword ptr [r8 + 4*rax + 123], ecx
+0x62,0xd4,0x7c,0x0c,0x4a,0x4c,0x80,0x7b
+
+# ATT:   cfcmovpq	%r9, 123(%r8,%rax,4)
+# INTEL: cfcmovp	qword ptr [r8 + 4*rax + 123], r9
+0x62,0x54,0xfc,0x0c,0x4a,0x4c,0x80,0x7b
+
+# ATT:   cfcmovpw	123(%r8,%rax,4), %dx
+# INTEL: cfcmovp	dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x08,0x4a,0x54,0x80,0x7b
+
+# ATT:   cfcmovpl	123(%r8,%rax,4), %ecx
+# INTEL: cfcmovp	ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7c,0x08,0x4a,0x4c,0x80,0x7b
+
+# ATT:   cfcmovpq	123(%r8,%rax,4), %r9
+# INTEL: cfcmovp	r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0xfc,0x08,0x4a,0x4c,0x80,0x7b
+
+# ATT:   cfcmovpw	%dx, %ax
+# INTEL: cfcmovp	ax, dx
+0x62,0xf4,0x7d,0x08,0x4a,0xc2
+
+# ATT:   cfcmovpl	%ecx, %edx
+# INTEL: cfcmovp	edx, ecx
+0x62,0xf4,0x7c,0x08,0x4a,0xd1
+
+# ATT:   cfcmovpq	%r9, %r15
+# INTEL: cfcmovp	r15, r9
+0x62,0x54,0xfc,0x08,0x4a,0xf9
+
+# ATT:   cfcmovsw	%dx, %ax, %r9w
+# INTEL: cfcmovs	r9w, ax, dx
+0x62,0xf4,0x35,0x1c,0x48,0xc2
+
+# ATT:   cfcmovsl	%ecx, %edx, %r10d
+# INTEL: cfcmovs	r10d, edx, ecx
+0x62,0xf4,0x2c,0x1c,0x48,0xd1
+
+# ATT:   cfcmovsq	%r9, %r15, %r11
+# INTEL: cfcmovs	r11, r15, r9
+0x62,0x54,0xa4,0x1c,0x48,0xf9
+
+# ATT:   cfcmovsw	123(%r8,%rax,4), %dx, %ax
+# INTEL: cfcmovs	ax, dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x1c,0x48,0x54,0x80,0x7b
+
+# ATT:   cfcmovsl	123(%r8,%rax,4), %ecx, %edx
+# INTEL: cfcmovs	edx, ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x6c,0x1c,0x48,0x4c,0x80,0x7b
+
+# ATT:   cfcmovsq	123(%r8,%rax,4), %r9, %r15
+# INTEL: cfcmovs	r15, r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0x84,0x1c,0x48,0x4c,0x80,0x7b
+
+# ATT:   cfcmovsw	%dx, 123(%r8,%rax,4)
+# INTEL: cfcmovs	word ptr [r8 + 4*rax + 123], dx
+0x62,0xd4,0x7d,0x0c,0x48,0x54,0x80,0x7b
+
+# ATT:   cfcmovsl	%ecx, 123(%r8,%rax,4)
+# INTEL: cfcmovs	dword ptr [r8 + 4*rax + 123], ecx
+0x62,0xd4,0x7c,0x0c,0x48,0x4c,0x80,0x7b
+
+# ATT:   cfcmovsq	%r9, 123(%r8,%rax,4)
+# INTEL: cfcmovs	qword ptr [r8 + 4*rax + 123], r9
+0x62,0x54,0xfc,0x0c,0x48,0x4c,0x80,0x7b
+
+# ATT:   cfcmovsw	123(%r8,%rax,4), %dx
+# INTEL: cfcmovs	dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x08,0x48,0x54,0x80,0x7b
+
+# ATT:   cfcmovsl	123(%r8,%rax,4), %ecx
+# INTEL: cfcmovs	ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7c,0x08,0x48,0x4c,0x80,0x7b
+
+# ATT:   cfcmovsq	123(%r8,%rax,4), %r9
+# INTEL: cfcmovs	r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0xfc,0x08,0x48,0x4c,0x80,0x7b
+
+# ATT:   cfcmovsw	%dx, %ax
+# INTEL: cfcmovs	ax, dx
+0x62,0xf4,0x7d,0x08,0x48,0xc2
+
+# ATT:   cfcmovsl	%ecx, %edx
+# INTEL: cfcmovs	edx, ecx
+0x62,0xf4,0x7c,0x08,0x48,0xd1
+
+# ATT:   cfcmovsq	%r9, %r15
+# INTEL: cfcmovs	r15, r9
+0x62,0x54,0xfc,0x08,0x48,0xf9
+
+# ATT:   cfcmovew	%dx, %ax, %r9w
+# INTEL: cfcmove	r9w, ax, dx
+0x62,0xf4,0x35,0x1c,0x44,0xc2
+
+# ATT:   cfcmovel	%ecx, %edx, %r10d
+# INTEL: cfcmove	r10d, edx, ecx
+0x62,0xf4,0x2c,0x1c,0x44,0xd1
+
+# ATT:   cfcmoveq	%r9, %r15, %r11
+# INTEL: cfcmove	r11, r15, r9
+0x62,0x54,0xa4,0x1c,0x44,0xf9
+
+# ATT:   cfcmovew	123(%r8,%rax,4), %dx, %ax
+# INTEL: cfcmove	ax, dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x1c,0x44,0x54,0x80,0x7b
+
+# ATT:   cfcmovel	123(%r8,%rax,4), %ecx, %edx
+# INTEL: cfcmove	edx, ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x6c,0x1c,0x44,0x4c,0x80,0x7b
+
+# ATT:   cfcmoveq	123(%r8,%rax,4), %r9, %r15
+# INTEL: cfcmove	r15, r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0x84,0x1c,0x44,0x4c,0x80,0x7b
+
+# ATT:   cfcmovew	%dx, 123(%r8,%rax,4)
+# INTEL: cfcmove	word ptr [r8 + 4*rax + 123], dx
+0x62,0xd4,0x7d,0x0c,0x44,0x54,0x80,0x7b
+
+# ATT:   cfcmovel	%ecx, 123(%r8,%rax,4)
+# INTEL: cfcmove	dword ptr [r8 + 4*rax + 123], ecx
+0x62,0xd4,0x7c,0x0c,0x44,0x4c,0x80,0x7b
+
+# ATT:   cfcmoveq	%r9, 123(%r8,%rax,4)
+# INTEL: cfcmove	qword ptr [r8 + 4*rax + 123], r9
+0x62,0x54,0xfc,0x0c,0x44,0x4c,0x80,0x7b
+
+# ATT:   cfcmovew	123(%r8,%rax,4), %dx
+# INTEL: cfcmove	dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x08,0x44,0x54,0x80,0x7b
+
+# ATT:   cfcmovel	123(%r8,%rax,4), %ecx
+# INTEL: cfcmove	ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7c,0x08,0x44,0x4c,0x80,0x7b
+
+# ATT:   cfcmoveq	123(%r8,%rax,4), %r9
+# INTEL: cfcmove	r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0xfc,0x08,0x44,0x4c,0x80,0x7b
+
+# ATT:   cfcmovew	%dx, %ax
+# INTEL: cfcmove	ax, dx
+0x62,0xf4,0x7d,0x08,0x44,0xc2
+
+# ATT:   cfcmovel	%ecx, %edx
+# INTEL: cfcmove	edx, ecx
+0x62,0xf4,0x7c,0x08,0x44,0xd1
+
+# ATT:   cfcmoveq	%r9, %r15
+# INTEL: cfcmove	r15, r9
+0x62,0x54,0xfc,0x08,0x44,0xf9
diff --git a/llvm/test/MC/Disassembler/X86/apx/cmov.txt b/llvm/test/MC/Disassembler/X86/apx/cmov.txt
new file mode 100644
index 00000000000000..cc96fb17e0085e
--- /dev/null
+++ b/llvm/test/MC/Disassembler/X86/apx/cmov.txt
@@ -0,0 +1,386 @@
+# RUN: llvm-mc -triple x86_64 -disassemble %s | FileCheck %s --check-prefix=ATT
+# RUN: llvm-mc -triple x86_64 -disassemble -output-asm-variant=1 %s | FileCheck %s --check-prefix=INTEL
+
+# ATT:   cmovbw	%dx, %ax, %r9w
+# INTEL: cmovb	r9w, ax, dx
+0x62,0xf4,0x35,0x18,0x42,0xc2
+
+# ATT:   cmovbl	%ecx, %edx, %r10d
+# INTEL: cmovb	r10d, edx, ecx
+0x62,0xf4,0x2c,0x18,0x42,0xd1
+
+# ATT:   cmovbq	%r9, %r15, %r11
+# INTEL: cmovb	r11, r15, r9
+0x62,0x54,0xa4,0x18,0x42,0xf9
+
+# ATT:   cmovbw	123(%r8,%rax,4), %dx, %ax
+# INTEL: cmovb	ax, dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x18,0x42,0x54,0x80,0x7b
+
+# ATT:   cmovbl	123(%r8,%rax,4), %ecx, %edx
+# INTEL: cmovb	edx, ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x6c,0x18,0x42,0x4c,0x80,0x7b
+
+# ATT:   cmovbq	123(%r8,%rax,4), %r9, %r15
+# INTEL: cmovb	r15, r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0x84,0x18,0x42,0x4c,0x80,0x7b
+
+# ATT:   cmovbew	%dx, %ax, %r9w
+# INTEL: cmovbe	r9w, ax, dx
+0x62,0xf4,0x35,0x18,0x46,0xc2
+
+# ATT:   cmovbel	%ecx, %edx, %r10d
+# INTEL: cmovbe	r10d, edx, ecx
+0x62,0xf4,0x2c,0x18,0x46,0xd1
+
+# ATT:   cmovbeq	%r9, %r15, %r11
+# INTEL: cmovbe	r11, r15, r9
+0x62,0x54,0xa4,0x18,0x46,0xf9
+
+# ATT:   cmovbew	123(%r8,%rax,4), %dx, %ax
+# INTEL: cmovbe	ax, dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x18,0x46,0x54,0x80,0x7b
+
+# ATT:   cmovbel	123(%r8,%rax,4), %ecx, %edx
+# INTEL: cmovbe	edx, ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x6c,0x18,0x46,0x4c,0x80,0x7b
+
+# ATT:   cmovbeq	123(%r8,%rax,4), %r9, %r15
+# INTEL: cmovbe	r15, r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0x84,0x18,0x46,0x4c,0x80,0x7b
+
+# ATT:   cmovlw	%dx, %ax, %r9w
+# INTEL: cmovl	r9w, ax, dx
+0x62,0xf4,0x35,0x18,0x4c,0xc2
+
+# ATT:   cmovll	%ecx, %edx, %r10d
+# INTEL: cmovl	r10d, edx, ecx
+0x62,0xf4,0x2c,0x18,0x4c,0xd1
+
+# ATT:   cmovlq	%r9, %r15, %r11
+# INTEL: cmovl	r11, r15, r9
+0x62,0x54,0xa4,0x18,0x4c,0xf9
+
+# ATT:   cmovlw	123(%r8,%rax,4), %dx, %ax
+# INTEL: cmovl	ax, dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x18,0x4c,0x54,0x80,0x7b
+
+# ATT:   cmovll	123(%r8,%rax,4), %ecx, %edx
+# INTEL: cmovl	edx, ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x6c,0x18,0x4c,0x4c,0x80,0x7b
+
+# ATT:   cmovlq	123(%r8,%rax,4), %r9, %r15
+# INTEL: cmovl	r15, r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0x84,0x18,0x4c,0x4c,0x80,0x7b
+
+# ATT:   cmovlew	%dx, %ax, %r9w
+# INTEL: cmovle	r9w, ax, dx
+0x62,0xf4,0x35,0x18,0x4e,0xc2
+
+# ATT:   cmovlel	%ecx, %edx, %r10d
+# INTEL: cmovle	r10d, edx, ecx
+0x62,0xf4,0x2c,0x18,0x4e,0xd1
+
+# ATT:   cmovleq	%r9, %r15, %r11
+# INTEL: cmovle	r11, r15, r9
+0x62,0x54,0xa4,0x18,0x4e,0xf9
+
+# ATT:   cmovlew	123(%r8,%rax,4), %dx, %ax
+# INTEL: cmovle	ax, dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x18,0x4e,0x54,0x80,0x7b
+
+# ATT:   cmovlel	123(%r8,%rax,4), %ecx, %edx
+# INTEL: cmovle	edx, ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x6c,0x18,0x4e,0x4c,0x80,0x7b
+
+# ATT:   cmovleq	123(%r8,%rax,4), %r9, %r15
+# INTEL: cmovle	r15, r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0x84,0x18,0x4e,0x4c,0x80,0x7b
+
+# ATT:   cmovaew	%dx, %ax, %r9w
+# INTEL: cmovae	r9w, ax, dx
+0x62,0xf4,0x35,0x18,0x43,0xc2
+
+# ATT:   cmovael	%ecx, %edx, %r10d
+# INTEL: cmovae	r10d, edx, ecx
+0x62,0xf4,0x2c,0x18,0x43,0xd1
+
+# ATT:   cmovaeq	%r9, %r15, %r11
+# INTEL: cmovae	r11, r15, r9
+0x62,0x54,0xa4,0x18,0x43,0xf9
+
+# ATT:   cmovaew	123(%r8,%rax,4), %dx, %ax
+# INTEL: cmovae	ax, dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x18,0x43,0x54,0x80,0x7b
+
+# ATT:   cmovael	123(%r8,%rax,4), %ecx, %edx
+# INTEL: cmovae	edx, ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x6c,0x18,0x43,0x4c,0x80,0x7b
+
+# ATT:   cmovaeq	123(%r8,%rax,4), %r9, %r15
+# INTEL: cmovae	r15, r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0x84,0x18,0x43,0x4c,0x80,0x7b
+
+# ATT:   cmovaw	%dx, %ax, %r9w
+# INTEL: cmova	r9w, ax, dx
+0x62,0xf4,0x35,0x18,0x47,0xc2
+
+# ATT:   cmoval	%ecx, %edx, %r10d
+# INTEL: cmova	r10d, edx, ecx
+0x62,0xf4,0x2c,0x18,0x47,0xd1
+
+# ATT:   cmovaq	%r9, %r15, %r11
+# INTEL: cmova	r11, r15, r9
+0x62,0x54,0xa4,0x18,0x47,0xf9
+
+# ATT:   cmovaw	123(%r8,%rax,4), %dx, %ax
+# INTEL: cmova	ax, dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x18,0x47,0x54,0x80,0x7b
+
+# ATT:   cmoval	123(%r8,%rax,4), %ecx, %edx
+# INTEL: cmova	edx, ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x6c,0x18,0x47,0x4c,0x80,0x7b
+
+# ATT:   cmovaq	123(%r8,%rax,4), %r9, %r15
+# INTEL: cmova	r15, r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0x84,0x18,0x47,0x4c,0x80,0x7b
+
+# ATT:   cmovgew	%dx, %ax, %r9w
+# INTEL: cmovge	r9w, ax, dx
+0x62,0xf4,0x35,0x18,0x4d,0xc2
+
+# ATT:   cmovgel	%ecx, %edx, %r10d
+# INTEL: cmovge	r10d, edx, ecx
+0x62,0xf4,0x2c,0x18,0x4d,0xd1
+
+# ATT:   cmovgeq	%r9, %r15, %r11
+# INTEL: cmovge	r11, r15, r9
+0x62,0x54,0xa4,0x18,0x4d,0xf9
+
+# ATT:   cmovgew	123(%r8,%rax,4), %dx, %ax
+# INTEL: cmovge	ax, dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x18,0x4d,0x54,0x80,0x7b
+
+# ATT:   cmovgel	123(%r8,%rax,4), %ecx, %edx
+# INTEL: cmovge	edx, ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x6c,0x18,0x4d,0x4c,0x80,0x7b
+
+# ATT:   cmovgeq	123(%r8,%rax,4), %r9, %r15
+# INTEL: cmovge	r15, r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0x84,0x18,0x4d,0x4c,0x80,0x7b
+
+# ATT:   cmovgw	%dx, %ax, %r9w
+# INTEL: cmovg	r9w, ax, dx
+0x62,0xf4,0x35,0x18,0x4f,0xc2
+
+# ATT:   cmovgl	%ecx, %edx, %r10d
+# INTEL: cmovg	r10d, edx, ecx
+0x62,0xf4,0x2c,0x18,0x4f,0xd1
+
+# ATT:   cmovgq	%r9, %r15, %r11
+# INTEL: cmovg	r11, r15, r9
+0x62,0x54,0xa4,0x18,0x4f,0xf9
+
+# ATT:   cmovgw	123(%r8,%rax,4), %dx, %ax
+# INTEL: cmovg	ax, dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x18,0x4f,0x54,0x80,0x7b
+
+# ATT:   cmovgl	123(%r8,%rax,4), %ecx, %edx
+# INTEL: cmovg	edx, ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x6c,0x18,0x4f,0x4c,0x80,0x7b
+
+# ATT:   cmovgq	123(%r8,%rax,4), %r9, %r15
+# INTEL: cmovg	r15, r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0x84,0x18,0x4f,0x4c,0x80,0x7b
+
+# ATT:   cmovnow	%dx, %ax, %r9w
+# INTEL: cmovno	r9w, ax, dx
+0x62,0xf4,0x35,0x18,0x41,0xc2
+
+# ATT:   cmovnol	%ecx, %edx, %r10d
+# INTEL: cmovno	r10d, edx, ecx
+0x62,0xf4,0x2c,0x18,0x41,0xd1
+
+# ATT:   cmovnoq	%r9, %r15, %r11
+# INTEL: cmovno	r11, r15, r9
+0x62,0x54,0xa4,0x18,0x41,0xf9
+
+# ATT:   cmovnow	123(%r8,%rax,4), %dx, %ax
+# INTEL: cmovno	ax, dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x18,0x41,0x54,0x80,0x7b
+
+# ATT:   cmovnol	123(%r8,%rax,4), %ecx, %edx
+# INTEL: cmovno	edx, ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x6c,0x18,0x41,0x4c,0x80,0x7b
+
+# ATT:   cmovnoq	123(%r8,%rax,4), %r9, %r15
+# INTEL: cmovno	r15, r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0x84,0x18,0x41,0x4c,0x80,0x7b
+
+# ATT:   cmovnpw	%dx, %ax, %r9w
+# INTEL: cmovnp	r9w, ax, dx
+0x62,0xf4,0x35,0x18,0x4b,0xc2
+
+# ATT:   cmovnpl	%ecx, %edx, %r10d
+# INTEL: cmovnp	r10d, edx, ecx
+0x62,0xf4,0x2c,0x18,0x4b,0xd1
+
+# ATT:   cmovnpq	%r9, %r15, %r11
+# INTEL: cmovnp	r11, r15, r9
+0x62,0x54,0xa4,0x18,0x4b,0xf9
+
+# ATT:   cmovnpw	123(%r8,%rax,4), %dx, %ax
+# INTEL: cmovnp	ax, dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x18,0x4b,0x54,0x80,0x7b
+
+# ATT:   cmovnpl	123(%r8,%rax,4), %ecx, %edx
+# INTEL: cmovnp	edx, ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x6c,0x18,0x4b,0x4c,0x80,0x7b
+
+# ATT:   cmovnpq	123(%r8,%rax,4), %r9, %r15
+# INTEL: cmovnp	r15, r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0x84,0x18,0x4b,0x4c,0x80,0x7b
+
+# ATT:   cmovnsw	%dx, %ax, %r9w
+# INTEL: cmovns	r9w, ax, dx
+0x62,0xf4,0x35,0x18,0x49,0xc2
+
+# ATT:   cmovnsl	%ecx, %edx, %r10d
+# INTEL: cmovns	r10d, edx, ecx
+0x62,0xf4,0x2c,0x18,0x49,0xd1
+
+# ATT:   cmovnsq	%r9, %r15, %r11
+# INTEL: cmovns	r11, r15, r9
+0x62,0x54,0xa4,0x18,0x49,0xf9
+
+# ATT:   cmovnsw	123(%r8,%rax,4), %dx, %ax
+# INTEL: cmovns	ax, dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x18,0x49,0x54,0x80,0x7b
+
+# ATT:   cmovnsl	123(%r8,%rax,4), %ecx, %edx
+# INTEL: cmovns	edx, ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x6c,0x18,0x49,0x4c,0x80,0x7b
+
+# ATT:   cmovnsq	123(%r8,%rax,4), %r9, %r15
+# INTEL: cmovns	r15, r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0x84,0x18,0x49,0x4c,0x80,0x7b
+
+# ATT:   cmovnew	%dx, %ax, %r9w
+# INTEL: cmovne	r9w, ax, dx
+0x62,0xf4,0x35,0x18,0x45,0xc2
+
+# ATT:   cmovnel	%ecx, %edx, %r10d
+# INTEL: cmovne	r10d, edx, ecx
+0x62,0xf4,0x2c,0x18,0x45,0xd1
+
+# ATT:   cmovneq	%r9, %r15, %r11
+# INTEL: cmovne	r11, r15, r9
+0x62,0x54,0xa4,0x18,0x45,0xf9
+
+# ATT:   cmovnew	123(%r8,%rax,4), %dx, %ax
+# INTEL: cmovne	ax, dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x18,0x45,0x54,0x80,0x7b
+
+# ATT:   cmovnel	123(%r8,%rax,4), %ecx, %edx
+# INTEL: cmovne	edx, ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x6c,0x18,0x45,0x4c,0x80,0x7b
+
+# ATT:   cmovneq	123(%r8,%rax,4), %r9, %r15
+# INTEL: cmovne	r15, r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0x84,0x18,0x45,0x4c,0x80,0x7b
+
+# ATT:   cmovow	%dx, %ax, %r9w
+# INTEL: cmovo	r9w, ax, dx
+0x62,0xf4,0x35,0x18,0x40,0xc2
+
+# ATT:   cmovol	%ecx, %edx, %r10d
+# INTEL: cmovo	r10d, edx, ecx
+0x62,0xf4,0x2c,0x18,0x40,0xd1
+
+# ATT:   cmovoq	%r9, %r15, %r11
+# INTEL: cmovo	r11, r15, r9
+0x62,0x54,0xa4,0x18,0x40,0xf9
+
+# ATT:   cmovow	123(%r8,%rax,4), %dx, %ax
+# INTEL: cmovo	ax, dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x18,0x40,0x54,0x80,0x7b
+
+# ATT:   cmovol	123(%r8,%rax,4), %ecx, %edx
+# INTEL: cmovo	edx, ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x6c,0x18,0x40,0x4c,0x80,0x7b
+
+# ATT:   cmovoq	123(%r8,%rax,4), %r9, %r15
+# INTEL: cmovo	r15, r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0x84,0x18,0x40,0x4c,0x80,0x7b
+
+# ATT:   cmovpw	%dx, %ax, %r9w
+# INTEL: cmovp	r9w, ax, dx
+0x62,0xf4,0x35,0x18,0x4a,0xc2
+
+# ATT:   cmovpl	%ecx, %edx, %r10d
+# INTEL: cmovp	r10d, edx, ecx
+0x62,0xf4,0x2c,0x18,0x4a,0xd1
+
+# ATT:   cmovpq	%r9, %r15, %r11
+# INTEL: cmovp	r11, r15, r9
+0x62,0x54,0xa4,0x18,0x4a,0xf9
+
+# ATT:   cmovpw	123(%r8,%rax,4), %dx, %ax
+# INTEL: cmovp	ax, dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x18,0x4a,0x54,0x80,0x7b
+
+# ATT:   cmovpl	123(%r8,%rax,4), %ecx, %edx
+# INTEL: cmovp	edx, ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x6c,0x18,0x4a,0x4c,0x80,0x7b
+
+# ATT:   cmovpq	123(%r8,%rax,4), %r9, %r15
+# INTEL: cmovp	r15, r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0x84,0x18,0x4a,0x4c,0x80,0x7b
+
+# ATT:   cmovsw	%dx, %ax, %r9w
+# INTEL: cmovs	r9w, ax, dx
+0x62,0xf4,0x35,0x18,0x48,0xc2
+
+# ATT:   cmovsl	%ecx, %edx, %r10d
+# INTEL: cmovs	r10d, edx, ecx
+0x62,0xf4,0x2c,0x18,0x48,0xd1
+
+# ATT:   cmovsq	%r9, %r15, %r11
+# INTEL: cmovs	r11, r15, r9
+0x62,0x54,0xa4,0x18,0x48,0xf9
+
+# ATT:   cmovsw	123(%r8,%rax,4), %dx, %ax
+# INTEL: cmovs	ax, dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x18,0x48,0x54,0x80,0x7b
+
+# ATT:   cmovsl	123(%r8,%rax,4), %ecx, %edx
+# INTEL: cmovs	edx, ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x6c,0x18,0x48,0x4c,0x80,0x7b
+
+# ATT:   cmovsq	123(%r8,%rax,4), %r9, %r15
+# INTEL: cmovs	r15, r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0x84,0x18,0x48,0x4c,0x80,0x7b
+
+# ATT:   cmovew	%dx, %ax, %r9w
+# INTEL: cmove	r9w, ax, dx
+0x62,0xf4,0x35,0x18,0x44,0xc2
+
+# ATT:   cmovel	%ecx, %edx, %r10d
+# INTEL: cmove	r10d, edx, ecx
+0x62,0xf4,0x2c,0x18,0x44,0xd1
+
+# ATT:   cmoveq	%r9, %r15, %r11
+# INTEL: cmove	r11, r15, r9
+0x62,0x54,0xa4,0x18,0x44,0xf9
+
+# ATT:   cmovew	123(%r8,%rax,4), %dx, %ax
+# INTEL: cmove	ax, dx, word ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x7d,0x18,0x44,0x54,0x80,0x7b
+
+# ATT:   cmovel	123(%r8,%rax,4), %ecx, %edx
+# INTEL: cmove	edx, ecx, dword ptr [r8 + 4*rax + 123]
+0x62,0xd4,0x6c,0x18,0x44,0x4c,0x80,0x7b
+
+# ATT:   cmoveq	123(%r8,%rax,4), %r9, %r15
+# INTEL: cmove	r15, r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0x84,0x18,0x44,0x4c,0x80,0x7b
diff --git a/llvm/test/MC/X86/apx/cfcmov-att.s b/llvm/test/MC/X86/apx/cfcmov-att.s
new file mode 100644
index 00000000000000..fd64559e472df1
--- /dev/null
+++ b/llvm/test/MC/X86/apx/cfcmov-att.s
@@ -0,0 +1,725 @@
+# RUN: llvm-mc -triple x86_64 -show-encoding %s | FileCheck %s
+# RUN: not llvm-mc -triple i386 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR
+
+# ERROR-COUNT-240: error:
+# ERROR-NOT: error:
+# CHECK: cfcmovbw	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x42,0xc2]
+         cfcmovbw	%dx, %ax, %r9w
+# CHECK: cfcmovbl	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x42,0xd1]
+         cfcmovbl	%ecx, %edx, %r10d
+# CHECK: cfcmovbq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x42,0xf9]
+         cfcmovbq	%r9, %r15, %r11
+# CHECK: cfcmovbw	123(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x42,0x54,0x80,0x7b]
+         cfcmovbw	123(%r8,%rax,4), %dx, %ax
+# CHECK: cfcmovbl	123(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x42,0x4c,0x80,0x7b]
+         cfcmovbl	123(%r8,%rax,4), %ecx, %edx
+# CHECK: cfcmovbq	123(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x42,0x4c,0x80,0x7b]
+         cfcmovbq	123(%r8,%rax,4), %r9, %r15
+# CHECK: cfcmovbw	%dx, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x42,0x54,0x80,0x7b]
+         cfcmovbw	%dx, 123(%r8,%rax,4)
+# CHECK: cfcmovbl	%ecx, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x42,0x4c,0x80,0x7b]
+         cfcmovbl	%ecx, 123(%r8,%rax,4)
+# CHECK: cfcmovbq	%r9, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x42,0x4c,0x80,0x7b]
+         cfcmovbq	%r9, 123(%r8,%rax,4)
+# CHECK: cfcmovbw	123(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x42,0x54,0x80,0x7b]
+         cfcmovbw	123(%r8,%rax,4), %dx
+# CHECK: cfcmovbl	123(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x42,0x4c,0x80,0x7b]
+         cfcmovbl	123(%r8,%rax,4), %ecx
+# CHECK: cfcmovbq	123(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x42,0x4c,0x80,0x7b]
+         cfcmovbq	123(%r8,%rax,4), %r9
+# CHECK: cfcmovbw	%dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x42,0xc2]
+         cfcmovbw	%dx, %ax
+# CHECK: cfcmovbl	%ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x42,0xd1]
+         cfcmovbl	%ecx, %edx
+# CHECK: cfcmovbq	%r9, %r15
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x42,0xf9]
+         cfcmovbq	%r9, %r15
+# CHECK: cfcmovbew	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x46,0xc2]
+         cfcmovbew	%dx, %ax, %r9w
+# CHECK: cfcmovbel	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x46,0xd1]
+         cfcmovbel	%ecx, %edx, %r10d
+# CHECK: cfcmovbeq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x46,0xf9]
+         cfcmovbeq	%r9, %r15, %r11
+# CHECK: cfcmovbew	123(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x46,0x54,0x80,0x7b]
+         cfcmovbew	123(%r8,%rax,4), %dx, %ax
+# CHECK: cfcmovbel	123(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x46,0x4c,0x80,0x7b]
+         cfcmovbel	123(%r8,%rax,4), %ecx, %edx
+# CHECK: cfcmovbeq	123(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x46,0x4c,0x80,0x7b]
+         cfcmovbeq	123(%r8,%rax,4), %r9, %r15
+# CHECK: cfcmovbew	%dx, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x46,0x54,0x80,0x7b]
+         cfcmovbew	%dx, 123(%r8,%rax,4)
+# CHECK: cfcmovbel	%ecx, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x46,0x4c,0x80,0x7b]
+         cfcmovbel	%ecx, 123(%r8,%rax,4)
+# CHECK: cfcmovbeq	%r9, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x46,0x4c,0x80,0x7b]
+         cfcmovbeq	%r9, 123(%r8,%rax,4)
+# CHECK: cfcmovbew	123(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x46,0x54,0x80,0x7b]
+         cfcmovbew	123(%r8,%rax,4), %dx
+# CHECK: cfcmovbel	123(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x46,0x4c,0x80,0x7b]
+         cfcmovbel	123(%r8,%rax,4), %ecx
+# CHECK: cfcmovbeq	123(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x46,0x4c,0x80,0x7b]
+         cfcmovbeq	123(%r8,%rax,4), %r9
+# CHECK: cfcmovbew	%dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x46,0xc2]
+         cfcmovbew	%dx, %ax
+# CHECK: cfcmovbel	%ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x46,0xd1]
+         cfcmovbel	%ecx, %edx
+# CHECK: cfcmovbeq	%r9, %r15
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x46,0xf9]
+         cfcmovbeq	%r9, %r15
+# CHECK: cfcmovlw	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x4c,0xc2]
+         cfcmovlw	%dx, %ax, %r9w
+# CHECK: cfcmovll	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x4c,0xd1]
+         cfcmovll	%ecx, %edx, %r10d
+# CHECK: cfcmovlq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x4c,0xf9]
+         cfcmovlq	%r9, %r15, %r11
+# CHECK: cfcmovlw	123(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x4c,0x54,0x80,0x7b]
+         cfcmovlw	123(%r8,%rax,4), %dx, %ax
+# CHECK: cfcmovll	123(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x4c,0x4c,0x80,0x7b]
+         cfcmovll	123(%r8,%rax,4), %ecx, %edx
+# CHECK: cfcmovlq	123(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x4c,0x4c,0x80,0x7b]
+         cfcmovlq	123(%r8,%rax,4), %r9, %r15
+# CHECK: cfcmovlw	%dx, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x4c,0x54,0x80,0x7b]
+         cfcmovlw	%dx, 123(%r8,%rax,4)
+# CHECK: cfcmovll	%ecx, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x4c,0x4c,0x80,0x7b]
+         cfcmovll	%ecx, 123(%r8,%rax,4)
+# CHECK: cfcmovlq	%r9, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x4c,0x4c,0x80,0x7b]
+         cfcmovlq	%r9, 123(%r8,%rax,4)
+# CHECK: cfcmovlw	123(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x4c,0x54,0x80,0x7b]
+         cfcmovlw	123(%r8,%rax,4), %dx
+# CHECK: cfcmovll	123(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x4c,0x4c,0x80,0x7b]
+         cfcmovll	123(%r8,%rax,4), %ecx
+# CHECK: cfcmovlq	123(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4c,0x4c,0x80,0x7b]
+         cfcmovlq	123(%r8,%rax,4), %r9
+# CHECK: cfcmovlw	%dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x4c,0xc2]
+         cfcmovlw	%dx, %ax
+# CHECK: cfcmovll	%ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x4c,0xd1]
+         cfcmovll	%ecx, %edx
+# CHECK: cfcmovlq	%r9, %r15
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4c,0xf9]
+         cfcmovlq	%r9, %r15
+# CHECK: cfcmovlew	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x4e,0xc2]
+         cfcmovlew	%dx, %ax, %r9w
+# CHECK: cfcmovlel	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x4e,0xd1]
+         cfcmovlel	%ecx, %edx, %r10d
+# CHECK: cfcmovleq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x4e,0xf9]
+         cfcmovleq	%r9, %r15, %r11
+# CHECK: cfcmovlew	123(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x4e,0x54,0x80,0x7b]
+         cfcmovlew	123(%r8,%rax,4), %dx, %ax
+# CHECK: cfcmovlel	123(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x4e,0x4c,0x80,0x7b]
+         cfcmovlel	123(%r8,%rax,4), %ecx, %edx
+# CHECK: cfcmovleq	123(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x4e,0x4c,0x80,0x7b]
+         cfcmovleq	123(%r8,%rax,4), %r9, %r15
+# CHECK: cfcmovlew	%dx, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x4e,0x54,0x80,0x7b]
+         cfcmovlew	%dx, 123(%r8,%rax,4)
+# CHECK: cfcmovlel	%ecx, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x4e,0x4c,0x80,0x7b]
+         cfcmovlel	%ecx, 123(%r8,%rax,4)
+# CHECK: cfcmovleq	%r9, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x4e,0x4c,0x80,0x7b]
+         cfcmovleq	%r9, 123(%r8,%rax,4)
+# CHECK: cfcmovlew	123(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x4e,0x54,0x80,0x7b]
+         cfcmovlew	123(%r8,%rax,4), %dx
+# CHECK: cfcmovlel	123(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x4e,0x4c,0x80,0x7b]
+         cfcmovlel	123(%r8,%rax,4), %ecx
+# CHECK: cfcmovleq	123(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4e,0x4c,0x80,0x7b]
+         cfcmovleq	123(%r8,%rax,4), %r9
+# CHECK: cfcmovlew	%dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x4e,0xc2]
+         cfcmovlew	%dx, %ax
+# CHECK: cfcmovlel	%ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x4e,0xd1]
+         cfcmovlel	%ecx, %edx
+# CHECK: cfcmovleq	%r9, %r15
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4e,0xf9]
+         cfcmovleq	%r9, %r15
+# CHECK: cfcmovaew	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x43,0xc2]
+         cfcmovaew	%dx, %ax, %r9w
+# CHECK: cfcmovael	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x43,0xd1]
+         cfcmovael	%ecx, %edx, %r10d
+# CHECK: cfcmovaeq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x43,0xf9]
+         cfcmovaeq	%r9, %r15, %r11
+# CHECK: cfcmovaew	123(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x43,0x54,0x80,0x7b]
+         cfcmovaew	123(%r8,%rax,4), %dx, %ax
+# CHECK: cfcmovael	123(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x43,0x4c,0x80,0x7b]
+         cfcmovael	123(%r8,%rax,4), %ecx, %edx
+# CHECK: cfcmovaeq	123(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x43,0x4c,0x80,0x7b]
+         cfcmovaeq	123(%r8,%rax,4), %r9, %r15
+# CHECK: cfcmovaew	%dx, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x43,0x54,0x80,0x7b]
+         cfcmovaew	%dx, 123(%r8,%rax,4)
+# CHECK: cfcmovael	%ecx, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x43,0x4c,0x80,0x7b]
+         cfcmovael	%ecx, 123(%r8,%rax,4)
+# CHECK: cfcmovaeq	%r9, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x43,0x4c,0x80,0x7b]
+         cfcmovaeq	%r9, 123(%r8,%rax,4)
+# CHECK: cfcmovaew	123(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x43,0x54,0x80,0x7b]
+         cfcmovaew	123(%r8,%rax,4), %dx
+# CHECK: cfcmovael	123(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x43,0x4c,0x80,0x7b]
+         cfcmovael	123(%r8,%rax,4), %ecx
+# CHECK: cfcmovaeq	123(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x43,0x4c,0x80,0x7b]
+         cfcmovaeq	123(%r8,%rax,4), %r9
+# CHECK: cfcmovaew	%dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x43,0xc2]
+         cfcmovaew	%dx, %ax
+# CHECK: cfcmovael	%ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x43,0xd1]
+         cfcmovael	%ecx, %edx
+# CHECK: cfcmovaeq	%r9, %r15
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x43,0xf9]
+         cfcmovaeq	%r9, %r15
+# CHECK: cfcmovaw	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x47,0xc2]
+         cfcmovaw	%dx, %ax, %r9w
+# CHECK: cfcmoval	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x47,0xd1]
+         cfcmoval	%ecx, %edx, %r10d
+# CHECK: cfcmovaq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x47,0xf9]
+         cfcmovaq	%r9, %r15, %r11
+# CHECK: cfcmovaw	123(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x47,0x54,0x80,0x7b]
+         cfcmovaw	123(%r8,%rax,4), %dx, %ax
+# CHECK: cfcmoval	123(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x47,0x4c,0x80,0x7b]
+         cfcmoval	123(%r8,%rax,4), %ecx, %edx
+# CHECK: cfcmovaq	123(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x47,0x4c,0x80,0x7b]
+         cfcmovaq	123(%r8,%rax,4), %r9, %r15
+# CHECK: cfcmovaw	%dx, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x47,0x54,0x80,0x7b]
+         cfcmovaw	%dx, 123(%r8,%rax,4)
+# CHECK: cfcmoval	%ecx, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x47,0x4c,0x80,0x7b]
+         cfcmoval	%ecx, 123(%r8,%rax,4)
+# CHECK: cfcmovaq	%r9, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x47,0x4c,0x80,0x7b]
+         cfcmovaq	%r9, 123(%r8,%rax,4)
+# CHECK: cfcmovaw	123(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x47,0x54,0x80,0x7b]
+         cfcmovaw	123(%r8,%rax,4), %dx
+# CHECK: cfcmoval	123(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x47,0x4c,0x80,0x7b]
+         cfcmoval	123(%r8,%rax,4), %ecx
+# CHECK: cfcmovaq	123(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x47,0x4c,0x80,0x7b]
+         cfcmovaq	123(%r8,%rax,4), %r9
+# CHECK: cfcmovaw	%dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x47,0xc2]
+         cfcmovaw	%dx, %ax
+# CHECK: cfcmoval	%ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x47,0xd1]
+         cfcmoval	%ecx, %edx
+# CHECK: cfcmovaq	%r9, %r15
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x47,0xf9]
+         cfcmovaq	%r9, %r15
+# CHECK: cfcmovgew	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x4d,0xc2]
+         cfcmovgew	%dx, %ax, %r9w
+# CHECK: cfcmovgel	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x4d,0xd1]
+         cfcmovgel	%ecx, %edx, %r10d
+# CHECK: cfcmovgeq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x4d,0xf9]
+         cfcmovgeq	%r9, %r15, %r11
+# CHECK: cfcmovgew	123(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x4d,0x54,0x80,0x7b]
+         cfcmovgew	123(%r8,%rax,4), %dx, %ax
+# CHECK: cfcmovgel	123(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x4d,0x4c,0x80,0x7b]
+         cfcmovgel	123(%r8,%rax,4), %ecx, %edx
+# CHECK: cfcmovgeq	123(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x4d,0x4c,0x80,0x7b]
+         cfcmovgeq	123(%r8,%rax,4), %r9, %r15
+# CHECK: cfcmovgew	%dx, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x4d,0x54,0x80,0x7b]
+         cfcmovgew	%dx, 123(%r8,%rax,4)
+# CHECK: cfcmovgel	%ecx, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x4d,0x4c,0x80,0x7b]
+         cfcmovgel	%ecx, 123(%r8,%rax,4)
+# CHECK: cfcmovgeq	%r9, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x4d,0x4c,0x80,0x7b]
+         cfcmovgeq	%r9, 123(%r8,%rax,4)
+# CHECK: cfcmovgew	123(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x4d,0x54,0x80,0x7b]
+         cfcmovgew	123(%r8,%rax,4), %dx
+# CHECK: cfcmovgel	123(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x4d,0x4c,0x80,0x7b]
+         cfcmovgel	123(%r8,%rax,4), %ecx
+# CHECK: cfcmovgeq	123(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4d,0x4c,0x80,0x7b]
+         cfcmovgeq	123(%r8,%rax,4), %r9
+# CHECK: cfcmovgew	%dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x4d,0xc2]
+         cfcmovgew	%dx, %ax
+# CHECK: cfcmovgel	%ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x4d,0xd1]
+         cfcmovgel	%ecx, %edx
+# CHECK: cfcmovgeq	%r9, %r15
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4d,0xf9]
+         cfcmovgeq	%r9, %r15
+# CHECK: cfcmovgw	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x4f,0xc2]
+         cfcmovgw	%dx, %ax, %r9w
+# CHECK: cfcmovgl	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x4f,0xd1]
+         cfcmovgl	%ecx, %edx, %r10d
+# CHECK: cfcmovgq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x4f,0xf9]
+         cfcmovgq	%r9, %r15, %r11
+# CHECK: cfcmovgw	123(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x4f,0x54,0x80,0x7b]
+         cfcmovgw	123(%r8,%rax,4), %dx, %ax
+# CHECK: cfcmovgl	123(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x4f,0x4c,0x80,0x7b]
+         cfcmovgl	123(%r8,%rax,4), %ecx, %edx
+# CHECK: cfcmovgq	123(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x4f,0x4c,0x80,0x7b]
+         cfcmovgq	123(%r8,%rax,4), %r9, %r15
+# CHECK: cfcmovgw	%dx, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x4f,0x54,0x80,0x7b]
+         cfcmovgw	%dx, 123(%r8,%rax,4)
+# CHECK: cfcmovgl	%ecx, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x4f,0x4c,0x80,0x7b]
+         cfcmovgl	%ecx, 123(%r8,%rax,4)
+# CHECK: cfcmovgq	%r9, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x4f,0x4c,0x80,0x7b]
+         cfcmovgq	%r9, 123(%r8,%rax,4)
+# CHECK: cfcmovgw	123(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x4f,0x54,0x80,0x7b]
+         cfcmovgw	123(%r8,%rax,4), %dx
+# CHECK: cfcmovgl	123(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x4f,0x4c,0x80,0x7b]
+         cfcmovgl	123(%r8,%rax,4), %ecx
+# CHECK: cfcmovgq	123(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4f,0x4c,0x80,0x7b]
+         cfcmovgq	123(%r8,%rax,4), %r9
+# CHECK: cfcmovgw	%dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x4f,0xc2]
+         cfcmovgw	%dx, %ax
+# CHECK: cfcmovgl	%ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x4f,0xd1]
+         cfcmovgl	%ecx, %edx
+# CHECK: cfcmovgq	%r9, %r15
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4f,0xf9]
+         cfcmovgq	%r9, %r15
+# CHECK: cfcmovnow	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x41,0xc2]
+         cfcmovnow	%dx, %ax, %r9w
+# CHECK: cfcmovnol	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x41,0xd1]
+         cfcmovnol	%ecx, %edx, %r10d
+# CHECK: cfcmovnoq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x41,0xf9]
+         cfcmovnoq	%r9, %r15, %r11
+# CHECK: cfcmovnow	123(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x41,0x54,0x80,0x7b]
+         cfcmovnow	123(%r8,%rax,4), %dx, %ax
+# CHECK: cfcmovnol	123(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x41,0x4c,0x80,0x7b]
+         cfcmovnol	123(%r8,%rax,4), %ecx, %edx
+# CHECK: cfcmovnoq	123(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x41,0x4c,0x80,0x7b]
+         cfcmovnoq	123(%r8,%rax,4), %r9, %r15
+# CHECK: cfcmovnow	%dx, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x41,0x54,0x80,0x7b]
+         cfcmovnow	%dx, 123(%r8,%rax,4)
+# CHECK: cfcmovnol	%ecx, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x41,0x4c,0x80,0x7b]
+         cfcmovnol	%ecx, 123(%r8,%rax,4)
+# CHECK: cfcmovnoq	%r9, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x41,0x4c,0x80,0x7b]
+         cfcmovnoq	%r9, 123(%r8,%rax,4)
+# CHECK: cfcmovnow	123(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x41,0x54,0x80,0x7b]
+         cfcmovnow	123(%r8,%rax,4), %dx
+# CHECK: cfcmovnol	123(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x41,0x4c,0x80,0x7b]
+         cfcmovnol	123(%r8,%rax,4), %ecx
+# CHECK: cfcmovnoq	123(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x41,0x4c,0x80,0x7b]
+         cfcmovnoq	123(%r8,%rax,4), %r9
+# CHECK: cfcmovnow	%dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x41,0xc2]
+         cfcmovnow	%dx, %ax
+# CHECK: cfcmovnol	%ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x41,0xd1]
+         cfcmovnol	%ecx, %edx
+# CHECK: cfcmovnoq	%r9, %r15
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x41,0xf9]
+         cfcmovnoq	%r9, %r15
+# CHECK: cfcmovnpw	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x4b,0xc2]
+         cfcmovnpw	%dx, %ax, %r9w
+# CHECK: cfcmovnpl	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x4b,0xd1]
+         cfcmovnpl	%ecx, %edx, %r10d
+# CHECK: cfcmovnpq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x4b,0xf9]
+         cfcmovnpq	%r9, %r15, %r11
+# CHECK: cfcmovnpw	123(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x4b,0x54,0x80,0x7b]
+         cfcmovnpw	123(%r8,%rax,4), %dx, %ax
+# CHECK: cfcmovnpl	123(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x4b,0x4c,0x80,0x7b]
+         cfcmovnpl	123(%r8,%rax,4), %ecx, %edx
+# CHECK: cfcmovnpq	123(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x4b,0x4c,0x80,0x7b]
+         cfcmovnpq	123(%r8,%rax,4), %r9, %r15
+# CHECK: cfcmovnpw	%dx, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x4b,0x54,0x80,0x7b]
+         cfcmovnpw	%dx, 123(%r8,%rax,4)
+# CHECK: cfcmovnpl	%ecx, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x4b,0x4c,0x80,0x7b]
+         cfcmovnpl	%ecx, 123(%r8,%rax,4)
+# CHECK: cfcmovnpq	%r9, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x4b,0x4c,0x80,0x7b]
+         cfcmovnpq	%r9, 123(%r8,%rax,4)
+# CHECK: cfcmovnpw	123(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x4b,0x54,0x80,0x7b]
+         cfcmovnpw	123(%r8,%rax,4), %dx
+# CHECK: cfcmovnpl	123(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x4b,0x4c,0x80,0x7b]
+         cfcmovnpl	123(%r8,%rax,4), %ecx
+# CHECK: cfcmovnpq	123(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4b,0x4c,0x80,0x7b]
+         cfcmovnpq	123(%r8,%rax,4), %r9
+# CHECK: cfcmovnpw	%dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x4b,0xc2]
+         cfcmovnpw	%dx, %ax
+# CHECK: cfcmovnpl	%ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x4b,0xd1]
+         cfcmovnpl	%ecx, %edx
+# CHECK: cfcmovnpq	%r9, %r15
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4b,0xf9]
+         cfcmovnpq	%r9, %r15
+# CHECK: cfcmovnsw	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x49,0xc2]
+         cfcmovnsw	%dx, %ax, %r9w
+# CHECK: cfcmovnsl	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x49,0xd1]
+         cfcmovnsl	%ecx, %edx, %r10d
+# CHECK: cfcmovnsq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x49,0xf9]
+         cfcmovnsq	%r9, %r15, %r11
+# CHECK: cfcmovnsw	123(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x49,0x54,0x80,0x7b]
+         cfcmovnsw	123(%r8,%rax,4), %dx, %ax
+# CHECK: cfcmovnsl	123(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x49,0x4c,0x80,0x7b]
+         cfcmovnsl	123(%r8,%rax,4), %ecx, %edx
+# CHECK: cfcmovnsq	123(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x49,0x4c,0x80,0x7b]
+         cfcmovnsq	123(%r8,%rax,4), %r9, %r15
+# CHECK: cfcmovnsw	%dx, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x49,0x54,0x80,0x7b]
+         cfcmovnsw	%dx, 123(%r8,%rax,4)
+# CHECK: cfcmovnsl	%ecx, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x49,0x4c,0x80,0x7b]
+         cfcmovnsl	%ecx, 123(%r8,%rax,4)
+# CHECK: cfcmovnsq	%r9, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x49,0x4c,0x80,0x7b]
+         cfcmovnsq	%r9, 123(%r8,%rax,4)
+# CHECK: cfcmovnsw	123(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x49,0x54,0x80,0x7b]
+         cfcmovnsw	123(%r8,%rax,4), %dx
+# CHECK: cfcmovnsl	123(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x49,0x4c,0x80,0x7b]
+         cfcmovnsl	123(%r8,%rax,4), %ecx
+# CHECK: cfcmovnsq	123(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x49,0x4c,0x80,0x7b]
+         cfcmovnsq	123(%r8,%rax,4), %r9
+# CHECK: cfcmovnsw	%dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x49,0xc2]
+         cfcmovnsw	%dx, %ax
+# CHECK: cfcmovnsl	%ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x49,0xd1]
+         cfcmovnsl	%ecx, %edx
+# CHECK: cfcmovnsq	%r9, %r15
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x49,0xf9]
+         cfcmovnsq	%r9, %r15
+# CHECK: cfcmovnew	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x45,0xc2]
+         cfcmovnew	%dx, %ax, %r9w
+# CHECK: cfcmovnel	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x45,0xd1]
+         cfcmovnel	%ecx, %edx, %r10d
+# CHECK: cfcmovneq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x45,0xf9]
+         cfcmovneq	%r9, %r15, %r11
+# CHECK: cfcmovnew	123(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x45,0x54,0x80,0x7b]
+         cfcmovnew	123(%r8,%rax,4), %dx, %ax
+# CHECK: cfcmovnel	123(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x45,0x4c,0x80,0x7b]
+         cfcmovnel	123(%r8,%rax,4), %ecx, %edx
+# CHECK: cfcmovneq	123(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x45,0x4c,0x80,0x7b]
+         cfcmovneq	123(%r8,%rax,4), %r9, %r15
+# CHECK: cfcmovnew	%dx, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x45,0x54,0x80,0x7b]
+         cfcmovnew	%dx, 123(%r8,%rax,4)
+# CHECK: cfcmovnel	%ecx, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x45,0x4c,0x80,0x7b]
+         cfcmovnel	%ecx, 123(%r8,%rax,4)
+# CHECK: cfcmovneq	%r9, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x45,0x4c,0x80,0x7b]
+         cfcmovneq	%r9, 123(%r8,%rax,4)
+# CHECK: cfcmovnew	123(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x45,0x54,0x80,0x7b]
+         cfcmovnew	123(%r8,%rax,4), %dx
+# CHECK: cfcmovnel	123(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x45,0x4c,0x80,0x7b]
+         cfcmovnel	123(%r8,%rax,4), %ecx
+# CHECK: cfcmovneq	123(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x45,0x4c,0x80,0x7b]
+         cfcmovneq	123(%r8,%rax,4), %r9
+# CHECK: cfcmovnew	%dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x45,0xc2]
+         cfcmovnew	%dx, %ax
+# CHECK: cfcmovnel	%ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x45,0xd1]
+         cfcmovnel	%ecx, %edx
+# CHECK: cfcmovneq	%r9, %r15
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x45,0xf9]
+         cfcmovneq	%r9, %r15
+# CHECK: cfcmovow	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x40,0xc2]
+         cfcmovow	%dx, %ax, %r9w
+# CHECK: cfcmovol	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x40,0xd1]
+         cfcmovol	%ecx, %edx, %r10d
+# CHECK: cfcmovoq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x40,0xf9]
+         cfcmovoq	%r9, %r15, %r11
+# CHECK: cfcmovow	123(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x40,0x54,0x80,0x7b]
+         cfcmovow	123(%r8,%rax,4), %dx, %ax
+# CHECK: cfcmovol	123(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x40,0x4c,0x80,0x7b]
+         cfcmovol	123(%r8,%rax,4), %ecx, %edx
+# CHECK: cfcmovoq	123(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x40,0x4c,0x80,0x7b]
+         cfcmovoq	123(%r8,%rax,4), %r9, %r15
+# CHECK: cfcmovow	%dx, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x40,0x54,0x80,0x7b]
+         cfcmovow	%dx, 123(%r8,%rax,4)
+# CHECK: cfcmovol	%ecx, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x40,0x4c,0x80,0x7b]
+         cfcmovol	%ecx, 123(%r8,%rax,4)
+# CHECK: cfcmovoq	%r9, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x40,0x4c,0x80,0x7b]
+         cfcmovoq	%r9, 123(%r8,%rax,4)
+# CHECK: cfcmovow	123(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x40,0x54,0x80,0x7b]
+         cfcmovow	123(%r8,%rax,4), %dx
+# CHECK: cfcmovol	123(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x40,0x4c,0x80,0x7b]
+         cfcmovol	123(%r8,%rax,4), %ecx
+# CHECK: cfcmovoq	123(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x40,0x4c,0x80,0x7b]
+         cfcmovoq	123(%r8,%rax,4), %r9
+# CHECK: cfcmovow	%dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x40,0xc2]
+         cfcmovow	%dx, %ax
+# CHECK: cfcmovol	%ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x40,0xd1]
+         cfcmovol	%ecx, %edx
+# CHECK: cfcmovoq	%r9, %r15
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x40,0xf9]
+         cfcmovoq	%r9, %r15
+# CHECK: cfcmovpw	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x4a,0xc2]
+         cfcmovpw	%dx, %ax, %r9w
+# CHECK: cfcmovpl	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x4a,0xd1]
+         cfcmovpl	%ecx, %edx, %r10d
+# CHECK: cfcmovpq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x4a,0xf9]
+         cfcmovpq	%r9, %r15, %r11
+# CHECK: cfcmovpw	123(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x4a,0x54,0x80,0x7b]
+         cfcmovpw	123(%r8,%rax,4), %dx, %ax
+# CHECK: cfcmovpl	123(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x4a,0x4c,0x80,0x7b]
+         cfcmovpl	123(%r8,%rax,4), %ecx, %edx
+# CHECK: cfcmovpq	123(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x4a,0x4c,0x80,0x7b]
+         cfcmovpq	123(%r8,%rax,4), %r9, %r15
+# CHECK: cfcmovpw	%dx, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x4a,0x54,0x80,0x7b]
+         cfcmovpw	%dx, 123(%r8,%rax,4)
+# CHECK: cfcmovpl	%ecx, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x4a,0x4c,0x80,0x7b]
+         cfcmovpl	%ecx, 123(%r8,%rax,4)
+# CHECK: cfcmovpq	%r9, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x4a,0x4c,0x80,0x7b]
+         cfcmovpq	%r9, 123(%r8,%rax,4)
+# CHECK: cfcmovpw	123(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x4a,0x54,0x80,0x7b]
+         cfcmovpw	123(%r8,%rax,4), %dx
+# CHECK: cfcmovpl	123(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x4a,0x4c,0x80,0x7b]
+         cfcmovpl	123(%r8,%rax,4), %ecx
+# CHECK: cfcmovpq	123(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4a,0x4c,0x80,0x7b]
+         cfcmovpq	123(%r8,%rax,4), %r9
+# CHECK: cfcmovpw	%dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x4a,0xc2]
+         cfcmovpw	%dx, %ax
+# CHECK: cfcmovpl	%ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x4a,0xd1]
+         cfcmovpl	%ecx, %edx
+# CHECK: cfcmovpq	%r9, %r15
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4a,0xf9]
+         cfcmovpq	%r9, %r15
+# CHECK: cfcmovsw	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x48,0xc2]
+         cfcmovsw	%dx, %ax, %r9w
+# CHECK: cfcmovsl	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x48,0xd1]
+         cfcmovsl	%ecx, %edx, %r10d
+# CHECK: cfcmovsq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x48,0xf9]
+         cfcmovsq	%r9, %r15, %r11
+# CHECK: cfcmovsw	123(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x48,0x54,0x80,0x7b]
+         cfcmovsw	123(%r8,%rax,4), %dx, %ax
+# CHECK: cfcmovsl	123(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x48,0x4c,0x80,0x7b]
+         cfcmovsl	123(%r8,%rax,4), %ecx, %edx
+# CHECK: cfcmovsq	123(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x48,0x4c,0x80,0x7b]
+         cfcmovsq	123(%r8,%rax,4), %r9, %r15
+# CHECK: cfcmovsw	%dx, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x48,0x54,0x80,0x7b]
+         cfcmovsw	%dx, 123(%r8,%rax,4)
+# CHECK: cfcmovsl	%ecx, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x48,0x4c,0x80,0x7b]
+         cfcmovsl	%ecx, 123(%r8,%rax,4)
+# CHECK: cfcmovsq	%r9, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x48,0x4c,0x80,0x7b]
+         cfcmovsq	%r9, 123(%r8,%rax,4)
+# CHECK: cfcmovsw	123(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x48,0x54,0x80,0x7b]
+         cfcmovsw	123(%r8,%rax,4), %dx
+# CHECK: cfcmovsl	123(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x48,0x4c,0x80,0x7b]
+         cfcmovsl	123(%r8,%rax,4), %ecx
+# CHECK: cfcmovsq	123(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x48,0x4c,0x80,0x7b]
+         cfcmovsq	123(%r8,%rax,4), %r9
+# CHECK: cfcmovsw	%dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x48,0xc2]
+         cfcmovsw	%dx, %ax
+# CHECK: cfcmovsl	%ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x48,0xd1]
+         cfcmovsl	%ecx, %edx
+# CHECK: cfcmovsq	%r9, %r15
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x48,0xf9]
+         cfcmovsq	%r9, %r15
+# CHECK: cfcmovew	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x44,0xc2]
+         cfcmovew	%dx, %ax, %r9w
+# CHECK: cfcmovel	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x44,0xd1]
+         cfcmovel	%ecx, %edx, %r10d
+# CHECK: cfcmoveq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x44,0xf9]
+         cfcmoveq	%r9, %r15, %r11
+# CHECK: cfcmovew	123(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x44,0x54,0x80,0x7b]
+         cfcmovew	123(%r8,%rax,4), %dx, %ax
+# CHECK: cfcmovel	123(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x44,0x4c,0x80,0x7b]
+         cfcmovel	123(%r8,%rax,4), %ecx, %edx
+# CHECK: cfcmoveq	123(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x44,0x4c,0x80,0x7b]
+         cfcmoveq	123(%r8,%rax,4), %r9, %r15
+# CHECK: cfcmovew	%dx, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x44,0x54,0x80,0x7b]
+         cfcmovew	%dx, 123(%r8,%rax,4)
+# CHECK: cfcmovel	%ecx, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x44,0x4c,0x80,0x7b]
+         cfcmovel	%ecx, 123(%r8,%rax,4)
+# CHECK: cfcmoveq	%r9, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x44,0x4c,0x80,0x7b]
+         cfcmoveq	%r9, 123(%r8,%rax,4)
+# CHECK: cfcmovew	123(%r8,%rax,4), %dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x44,0x54,0x80,0x7b]
+         cfcmovew	123(%r8,%rax,4), %dx
+# CHECK: cfcmovel	123(%r8,%rax,4), %ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x44,0x4c,0x80,0x7b]
+         cfcmovel	123(%r8,%rax,4), %ecx
+# CHECK: cfcmoveq	123(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x44,0x4c,0x80,0x7b]
+         cfcmoveq	123(%r8,%rax,4), %r9
+# CHECK: cfcmovew	%dx, %ax
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x44,0xc2]
+         cfcmovew	%dx, %ax
+# CHECK: cfcmovel	%ecx, %edx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x44,0xd1]
+         cfcmovel	%ecx, %edx
+# CHECK: cfcmoveq	%r9, %r15
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x44,0xf9]
+         cfcmoveq	%r9, %r15
diff --git a/llvm/test/MC/X86/apx/cfcmov-intel.s b/llvm/test/MC/X86/apx/cfcmov-intel.s
new file mode 100644
index 00000000000000..6f90f6db13fe93
--- /dev/null
+++ b/llvm/test/MC/X86/apx/cfcmov-intel.s
@@ -0,0 +1,722 @@
+# RUN: llvm-mc -triple x86_64 -show-encoding -x86-asm-syntax=intel -output-asm-variant=1 %s | FileCheck %s
+
+# CHECK: cfcmovb	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x42,0xc2]
+         cfcmovb	r9w, ax, dx
+# CHECK: cfcmovb	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x42,0xd1]
+         cfcmovb	r10d, edx, ecx
+# CHECK: cfcmovb	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x42,0xf9]
+         cfcmovb	r11, r15, r9
+# CHECK: cfcmovb	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x42,0x54,0x80,0x7b]
+         cfcmovb	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovb	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x42,0x4c,0x80,0x7b]
+         cfcmovb	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovb	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x42,0x4c,0x80,0x7b]
+         cfcmovb	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovb	word ptr [r8 + 4*rax + 123], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x42,0x54,0x80,0x7b]
+         cfcmovb	word ptr [r8 + 4*rax + 123], dx
+# CHECK: cfcmovb	dword ptr [r8 + 4*rax + 123], ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x42,0x4c,0x80,0x7b]
+         cfcmovb	dword ptr [r8 + 4*rax + 123], ecx
+# CHECK: cfcmovb	qword ptr [r8 + 4*rax + 123], r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x42,0x4c,0x80,0x7b]
+         cfcmovb	qword ptr [r8 + 4*rax + 123], r9
+# CHECK: cfcmovb	dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x42,0x54,0x80,0x7b]
+         cfcmovb	dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovb	ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x42,0x4c,0x80,0x7b]
+         cfcmovb	ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovb	r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x42,0x4c,0x80,0x7b]
+         cfcmovb	r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovb	ax, dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x42,0xc2]
+         cfcmovb	ax, dx
+# CHECK: cfcmovb	edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x42,0xd1]
+         cfcmovb	edx, ecx
+# CHECK: cfcmovb	r15, r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x42,0xf9]
+         cfcmovb	r15, r9
+# CHECK: cfcmovbe	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x46,0xc2]
+         cfcmovbe	r9w, ax, dx
+# CHECK: cfcmovbe	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x46,0xd1]
+         cfcmovbe	r10d, edx, ecx
+# CHECK: cfcmovbe	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x46,0xf9]
+         cfcmovbe	r11, r15, r9
+# CHECK: cfcmovbe	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x46,0x54,0x80,0x7b]
+         cfcmovbe	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovbe	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x46,0x4c,0x80,0x7b]
+         cfcmovbe	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovbe	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x46,0x4c,0x80,0x7b]
+         cfcmovbe	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovbe	word ptr [r8 + 4*rax + 123], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x46,0x54,0x80,0x7b]
+         cfcmovbe	word ptr [r8 + 4*rax + 123], dx
+# CHECK: cfcmovbe	dword ptr [r8 + 4*rax + 123], ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x46,0x4c,0x80,0x7b]
+         cfcmovbe	dword ptr [r8 + 4*rax + 123], ecx
+# CHECK: cfcmovbe	qword ptr [r8 + 4*rax + 123], r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x46,0x4c,0x80,0x7b]
+         cfcmovbe	qword ptr [r8 + 4*rax + 123], r9
+# CHECK: cfcmovbe	dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x46,0x54,0x80,0x7b]
+         cfcmovbe	dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovbe	ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x46,0x4c,0x80,0x7b]
+         cfcmovbe	ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovbe	r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x46,0x4c,0x80,0x7b]
+         cfcmovbe	r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovbe	ax, dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x46,0xc2]
+         cfcmovbe	ax, dx
+# CHECK: cfcmovbe	edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x46,0xd1]
+         cfcmovbe	edx, ecx
+# CHECK: cfcmovbe	r15, r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x46,0xf9]
+         cfcmovbe	r15, r9
+# CHECK: cfcmovl	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x4c,0xc2]
+         cfcmovl	r9w, ax, dx
+# CHECK: cfcmovl	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x4c,0xd1]
+         cfcmovl	r10d, edx, ecx
+# CHECK: cfcmovl	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x4c,0xf9]
+         cfcmovl	r11, r15, r9
+# CHECK: cfcmovl	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x4c,0x54,0x80,0x7b]
+         cfcmovl	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovl	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x4c,0x4c,0x80,0x7b]
+         cfcmovl	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovl	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x4c,0x4c,0x80,0x7b]
+         cfcmovl	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovl	word ptr [r8 + 4*rax + 123], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x4c,0x54,0x80,0x7b]
+         cfcmovl	word ptr [r8 + 4*rax + 123], dx
+# CHECK: cfcmovl	dword ptr [r8 + 4*rax + 123], ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x4c,0x4c,0x80,0x7b]
+         cfcmovl	dword ptr [r8 + 4*rax + 123], ecx
+# CHECK: cfcmovl	qword ptr [r8 + 4*rax + 123], r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x4c,0x4c,0x80,0x7b]
+         cfcmovl	qword ptr [r8 + 4*rax + 123], r9
+# CHECK: cfcmovl	dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x4c,0x54,0x80,0x7b]
+         cfcmovl	dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovl	ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x4c,0x4c,0x80,0x7b]
+         cfcmovl	ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovl	r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4c,0x4c,0x80,0x7b]
+         cfcmovl	r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovl	ax, dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x4c,0xc2]
+         cfcmovl	ax, dx
+# CHECK: cfcmovl	edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x4c,0xd1]
+         cfcmovl	edx, ecx
+# CHECK: cfcmovl	r15, r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4c,0xf9]
+         cfcmovl	r15, r9
+# CHECK: cfcmovle	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x4e,0xc2]
+         cfcmovle	r9w, ax, dx
+# CHECK: cfcmovle	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x4e,0xd1]
+         cfcmovle	r10d, edx, ecx
+# CHECK: cfcmovle	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x4e,0xf9]
+         cfcmovle	r11, r15, r9
+# CHECK: cfcmovle	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x4e,0x54,0x80,0x7b]
+         cfcmovle	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovle	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x4e,0x4c,0x80,0x7b]
+         cfcmovle	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovle	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x4e,0x4c,0x80,0x7b]
+         cfcmovle	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovle	word ptr [r8 + 4*rax + 123], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x4e,0x54,0x80,0x7b]
+         cfcmovle	word ptr [r8 + 4*rax + 123], dx
+# CHECK: cfcmovle	dword ptr [r8 + 4*rax + 123], ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x4e,0x4c,0x80,0x7b]
+         cfcmovle	dword ptr [r8 + 4*rax + 123], ecx
+# CHECK: cfcmovle	qword ptr [r8 + 4*rax + 123], r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x4e,0x4c,0x80,0x7b]
+         cfcmovle	qword ptr [r8 + 4*rax + 123], r9
+# CHECK: cfcmovle	dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x4e,0x54,0x80,0x7b]
+         cfcmovle	dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovle	ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x4e,0x4c,0x80,0x7b]
+         cfcmovle	ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovle	r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4e,0x4c,0x80,0x7b]
+         cfcmovle	r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovle	ax, dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x4e,0xc2]
+         cfcmovle	ax, dx
+# CHECK: cfcmovle	edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x4e,0xd1]
+         cfcmovle	edx, ecx
+# CHECK: cfcmovle	r15, r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4e,0xf9]
+         cfcmovle	r15, r9
+# CHECK: cfcmovae	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x43,0xc2]
+         cfcmovae	r9w, ax, dx
+# CHECK: cfcmovae	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x43,0xd1]
+         cfcmovae	r10d, edx, ecx
+# CHECK: cfcmovae	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x43,0xf9]
+         cfcmovae	r11, r15, r9
+# CHECK: cfcmovae	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x43,0x54,0x80,0x7b]
+         cfcmovae	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovae	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x43,0x4c,0x80,0x7b]
+         cfcmovae	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovae	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x43,0x4c,0x80,0x7b]
+         cfcmovae	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovae	word ptr [r8 + 4*rax + 123], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x43,0x54,0x80,0x7b]
+         cfcmovae	word ptr [r8 + 4*rax + 123], dx
+# CHECK: cfcmovae	dword ptr [r8 + 4*rax + 123], ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x43,0x4c,0x80,0x7b]
+         cfcmovae	dword ptr [r8 + 4*rax + 123], ecx
+# CHECK: cfcmovae	qword ptr [r8 + 4*rax + 123], r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x43,0x4c,0x80,0x7b]
+         cfcmovae	qword ptr [r8 + 4*rax + 123], r9
+# CHECK: cfcmovae	dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x43,0x54,0x80,0x7b]
+         cfcmovae	dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovae	ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x43,0x4c,0x80,0x7b]
+         cfcmovae	ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovae	r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x43,0x4c,0x80,0x7b]
+         cfcmovae	r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovae	ax, dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x43,0xc2]
+         cfcmovae	ax, dx
+# CHECK: cfcmovae	edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x43,0xd1]
+         cfcmovae	edx, ecx
+# CHECK: cfcmovae	r15, r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x43,0xf9]
+         cfcmovae	r15, r9
+# CHECK: cfcmova	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x47,0xc2]
+         cfcmova	r9w, ax, dx
+# CHECK: cfcmova	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x47,0xd1]
+         cfcmova	r10d, edx, ecx
+# CHECK: cfcmova	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x47,0xf9]
+         cfcmova	r11, r15, r9
+# CHECK: cfcmova	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x47,0x54,0x80,0x7b]
+         cfcmova	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cfcmova	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x47,0x4c,0x80,0x7b]
+         cfcmova	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmova	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x47,0x4c,0x80,0x7b]
+         cfcmova	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmova	word ptr [r8 + 4*rax + 123], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x47,0x54,0x80,0x7b]
+         cfcmova	word ptr [r8 + 4*rax + 123], dx
+# CHECK: cfcmova	dword ptr [r8 + 4*rax + 123], ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x47,0x4c,0x80,0x7b]
+         cfcmova	dword ptr [r8 + 4*rax + 123], ecx
+# CHECK: cfcmova	qword ptr [r8 + 4*rax + 123], r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x47,0x4c,0x80,0x7b]
+         cfcmova	qword ptr [r8 + 4*rax + 123], r9
+# CHECK: cfcmova	dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x47,0x54,0x80,0x7b]
+         cfcmova	dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cfcmova	ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x47,0x4c,0x80,0x7b]
+         cfcmova	ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmova	r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x47,0x4c,0x80,0x7b]
+         cfcmova	r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmova	ax, dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x47,0xc2]
+         cfcmova	ax, dx
+# CHECK: cfcmova	edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x47,0xd1]
+         cfcmova	edx, ecx
+# CHECK: cfcmova	r15, r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x47,0xf9]
+         cfcmova	r15, r9
+# CHECK: cfcmovge	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x4d,0xc2]
+         cfcmovge	r9w, ax, dx
+# CHECK: cfcmovge	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x4d,0xd1]
+         cfcmovge	r10d, edx, ecx
+# CHECK: cfcmovge	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x4d,0xf9]
+         cfcmovge	r11, r15, r9
+# CHECK: cfcmovge	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x4d,0x54,0x80,0x7b]
+         cfcmovge	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovge	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x4d,0x4c,0x80,0x7b]
+         cfcmovge	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovge	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x4d,0x4c,0x80,0x7b]
+         cfcmovge	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovge	word ptr [r8 + 4*rax + 123], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x4d,0x54,0x80,0x7b]
+         cfcmovge	word ptr [r8 + 4*rax + 123], dx
+# CHECK: cfcmovge	dword ptr [r8 + 4*rax + 123], ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x4d,0x4c,0x80,0x7b]
+         cfcmovge	dword ptr [r8 + 4*rax + 123], ecx
+# CHECK: cfcmovge	qword ptr [r8 + 4*rax + 123], r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x4d,0x4c,0x80,0x7b]
+         cfcmovge	qword ptr [r8 + 4*rax + 123], r9
+# CHECK: cfcmovge	dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x4d,0x54,0x80,0x7b]
+         cfcmovge	dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovge	ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x4d,0x4c,0x80,0x7b]
+         cfcmovge	ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovge	r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4d,0x4c,0x80,0x7b]
+         cfcmovge	r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovge	ax, dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x4d,0xc2]
+         cfcmovge	ax, dx
+# CHECK: cfcmovge	edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x4d,0xd1]
+         cfcmovge	edx, ecx
+# CHECK: cfcmovge	r15, r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4d,0xf9]
+         cfcmovge	r15, r9
+# CHECK: cfcmovg	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x4f,0xc2]
+         cfcmovg	r9w, ax, dx
+# CHECK: cfcmovg	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x4f,0xd1]
+         cfcmovg	r10d, edx, ecx
+# CHECK: cfcmovg	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x4f,0xf9]
+         cfcmovg	r11, r15, r9
+# CHECK: cfcmovg	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x4f,0x54,0x80,0x7b]
+         cfcmovg	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovg	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x4f,0x4c,0x80,0x7b]
+         cfcmovg	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovg	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x4f,0x4c,0x80,0x7b]
+         cfcmovg	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovg	word ptr [r8 + 4*rax + 123], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x4f,0x54,0x80,0x7b]
+         cfcmovg	word ptr [r8 + 4*rax + 123], dx
+# CHECK: cfcmovg	dword ptr [r8 + 4*rax + 123], ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x4f,0x4c,0x80,0x7b]
+         cfcmovg	dword ptr [r8 + 4*rax + 123], ecx
+# CHECK: cfcmovg	qword ptr [r8 + 4*rax + 123], r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x4f,0x4c,0x80,0x7b]
+         cfcmovg	qword ptr [r8 + 4*rax + 123], r9
+# CHECK: cfcmovg	dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x4f,0x54,0x80,0x7b]
+         cfcmovg	dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovg	ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x4f,0x4c,0x80,0x7b]
+         cfcmovg	ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovg	r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4f,0x4c,0x80,0x7b]
+         cfcmovg	r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovg	ax, dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x4f,0xc2]
+         cfcmovg	ax, dx
+# CHECK: cfcmovg	edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x4f,0xd1]
+         cfcmovg	edx, ecx
+# CHECK: cfcmovg	r15, r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4f,0xf9]
+         cfcmovg	r15, r9
+# CHECK: cfcmovno	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x41,0xc2]
+         cfcmovno	r9w, ax, dx
+# CHECK: cfcmovno	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x41,0xd1]
+         cfcmovno	r10d, edx, ecx
+# CHECK: cfcmovno	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x41,0xf9]
+         cfcmovno	r11, r15, r9
+# CHECK: cfcmovno	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x41,0x54,0x80,0x7b]
+         cfcmovno	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovno	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x41,0x4c,0x80,0x7b]
+         cfcmovno	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovno	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x41,0x4c,0x80,0x7b]
+         cfcmovno	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovno	word ptr [r8 + 4*rax + 123], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x41,0x54,0x80,0x7b]
+         cfcmovno	word ptr [r8 + 4*rax + 123], dx
+# CHECK: cfcmovno	dword ptr [r8 + 4*rax + 123], ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x41,0x4c,0x80,0x7b]
+         cfcmovno	dword ptr [r8 + 4*rax + 123], ecx
+# CHECK: cfcmovno	qword ptr [r8 + 4*rax + 123], r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x41,0x4c,0x80,0x7b]
+         cfcmovno	qword ptr [r8 + 4*rax + 123], r9
+# CHECK: cfcmovno	dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x41,0x54,0x80,0x7b]
+         cfcmovno	dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovno	ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x41,0x4c,0x80,0x7b]
+         cfcmovno	ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovno	r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x41,0x4c,0x80,0x7b]
+         cfcmovno	r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovno	ax, dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x41,0xc2]
+         cfcmovno	ax, dx
+# CHECK: cfcmovno	edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x41,0xd1]
+         cfcmovno	edx, ecx
+# CHECK: cfcmovno	r15, r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x41,0xf9]
+         cfcmovno	r15, r9
+# CHECK: cfcmovnp	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x4b,0xc2]
+         cfcmovnp	r9w, ax, dx
+# CHECK: cfcmovnp	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x4b,0xd1]
+         cfcmovnp	r10d, edx, ecx
+# CHECK: cfcmovnp	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x4b,0xf9]
+         cfcmovnp	r11, r15, r9
+# CHECK: cfcmovnp	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x4b,0x54,0x80,0x7b]
+         cfcmovnp	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovnp	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x4b,0x4c,0x80,0x7b]
+         cfcmovnp	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovnp	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x4b,0x4c,0x80,0x7b]
+         cfcmovnp	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovnp	word ptr [r8 + 4*rax + 123], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x4b,0x54,0x80,0x7b]
+         cfcmovnp	word ptr [r8 + 4*rax + 123], dx
+# CHECK: cfcmovnp	dword ptr [r8 + 4*rax + 123], ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x4b,0x4c,0x80,0x7b]
+         cfcmovnp	dword ptr [r8 + 4*rax + 123], ecx
+# CHECK: cfcmovnp	qword ptr [r8 + 4*rax + 123], r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x4b,0x4c,0x80,0x7b]
+         cfcmovnp	qword ptr [r8 + 4*rax + 123], r9
+# CHECK: cfcmovnp	dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x4b,0x54,0x80,0x7b]
+         cfcmovnp	dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovnp	ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x4b,0x4c,0x80,0x7b]
+         cfcmovnp	ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovnp	r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4b,0x4c,0x80,0x7b]
+         cfcmovnp	r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovnp	ax, dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x4b,0xc2]
+         cfcmovnp	ax, dx
+# CHECK: cfcmovnp	edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x4b,0xd1]
+         cfcmovnp	edx, ecx
+# CHECK: cfcmovnp	r15, r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4b,0xf9]
+         cfcmovnp	r15, r9
+# CHECK: cfcmovns	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x49,0xc2]
+         cfcmovns	r9w, ax, dx
+# CHECK: cfcmovns	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x49,0xd1]
+         cfcmovns	r10d, edx, ecx
+# CHECK: cfcmovns	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x49,0xf9]
+         cfcmovns	r11, r15, r9
+# CHECK: cfcmovns	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x49,0x54,0x80,0x7b]
+         cfcmovns	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovns	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x49,0x4c,0x80,0x7b]
+         cfcmovns	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovns	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x49,0x4c,0x80,0x7b]
+         cfcmovns	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovns	word ptr [r8 + 4*rax + 123], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x49,0x54,0x80,0x7b]
+         cfcmovns	word ptr [r8 + 4*rax + 123], dx
+# CHECK: cfcmovns	dword ptr [r8 + 4*rax + 123], ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x49,0x4c,0x80,0x7b]
+         cfcmovns	dword ptr [r8 + 4*rax + 123], ecx
+# CHECK: cfcmovns	qword ptr [r8 + 4*rax + 123], r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x49,0x4c,0x80,0x7b]
+         cfcmovns	qword ptr [r8 + 4*rax + 123], r9
+# CHECK: cfcmovns	dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x49,0x54,0x80,0x7b]
+         cfcmovns	dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovns	ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x49,0x4c,0x80,0x7b]
+         cfcmovns	ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovns	r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x49,0x4c,0x80,0x7b]
+         cfcmovns	r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovns	ax, dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x49,0xc2]
+         cfcmovns	ax, dx
+# CHECK: cfcmovns	edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x49,0xd1]
+         cfcmovns	edx, ecx
+# CHECK: cfcmovns	r15, r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x49,0xf9]
+         cfcmovns	r15, r9
+# CHECK: cfcmovne	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x45,0xc2]
+         cfcmovne	r9w, ax, dx
+# CHECK: cfcmovne	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x45,0xd1]
+         cfcmovne	r10d, edx, ecx
+# CHECK: cfcmovne	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x45,0xf9]
+         cfcmovne	r11, r15, r9
+# CHECK: cfcmovne	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x45,0x54,0x80,0x7b]
+         cfcmovne	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovne	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x45,0x4c,0x80,0x7b]
+         cfcmovne	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovne	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x45,0x4c,0x80,0x7b]
+         cfcmovne	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovne	word ptr [r8 + 4*rax + 123], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x45,0x54,0x80,0x7b]
+         cfcmovne	word ptr [r8 + 4*rax + 123], dx
+# CHECK: cfcmovne	dword ptr [r8 + 4*rax + 123], ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x45,0x4c,0x80,0x7b]
+         cfcmovne	dword ptr [r8 + 4*rax + 123], ecx
+# CHECK: cfcmovne	qword ptr [r8 + 4*rax + 123], r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x45,0x4c,0x80,0x7b]
+         cfcmovne	qword ptr [r8 + 4*rax + 123], r9
+# CHECK: cfcmovne	dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x45,0x54,0x80,0x7b]
+         cfcmovne	dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovne	ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x45,0x4c,0x80,0x7b]
+         cfcmovne	ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovne	r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x45,0x4c,0x80,0x7b]
+         cfcmovne	r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovne	ax, dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x45,0xc2]
+         cfcmovne	ax, dx
+# CHECK: cfcmovne	edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x45,0xd1]
+         cfcmovne	edx, ecx
+# CHECK: cfcmovne	r15, r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x45,0xf9]
+         cfcmovne	r15, r9
+# CHECK: cfcmovo	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x40,0xc2]
+         cfcmovo	r9w, ax, dx
+# CHECK: cfcmovo	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x40,0xd1]
+         cfcmovo	r10d, edx, ecx
+# CHECK: cfcmovo	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x40,0xf9]
+         cfcmovo	r11, r15, r9
+# CHECK: cfcmovo	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x40,0x54,0x80,0x7b]
+         cfcmovo	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovo	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x40,0x4c,0x80,0x7b]
+         cfcmovo	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovo	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x40,0x4c,0x80,0x7b]
+         cfcmovo	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovo	word ptr [r8 + 4*rax + 123], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x40,0x54,0x80,0x7b]
+         cfcmovo	word ptr [r8 + 4*rax + 123], dx
+# CHECK: cfcmovo	dword ptr [r8 + 4*rax + 123], ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x40,0x4c,0x80,0x7b]
+         cfcmovo	dword ptr [r8 + 4*rax + 123], ecx
+# CHECK: cfcmovo	qword ptr [r8 + 4*rax + 123], r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x40,0x4c,0x80,0x7b]
+         cfcmovo	qword ptr [r8 + 4*rax + 123], r9
+# CHECK: cfcmovo	dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x40,0x54,0x80,0x7b]
+         cfcmovo	dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovo	ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x40,0x4c,0x80,0x7b]
+         cfcmovo	ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovo	r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x40,0x4c,0x80,0x7b]
+         cfcmovo	r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovo	ax, dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x40,0xc2]
+         cfcmovo	ax, dx
+# CHECK: cfcmovo	edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x40,0xd1]
+         cfcmovo	edx, ecx
+# CHECK: cfcmovo	r15, r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x40,0xf9]
+         cfcmovo	r15, r9
+# CHECK: cfcmovp	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x4a,0xc2]
+         cfcmovp	r9w, ax, dx
+# CHECK: cfcmovp	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x4a,0xd1]
+         cfcmovp	r10d, edx, ecx
+# CHECK: cfcmovp	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x4a,0xf9]
+         cfcmovp	r11, r15, r9
+# CHECK: cfcmovp	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x4a,0x54,0x80,0x7b]
+         cfcmovp	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovp	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x4a,0x4c,0x80,0x7b]
+         cfcmovp	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovp	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x4a,0x4c,0x80,0x7b]
+         cfcmovp	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovp	word ptr [r8 + 4*rax + 123], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x4a,0x54,0x80,0x7b]
+         cfcmovp	word ptr [r8 + 4*rax + 123], dx
+# CHECK: cfcmovp	dword ptr [r8 + 4*rax + 123], ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x4a,0x4c,0x80,0x7b]
+         cfcmovp	dword ptr [r8 + 4*rax + 123], ecx
+# CHECK: cfcmovp	qword ptr [r8 + 4*rax + 123], r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x4a,0x4c,0x80,0x7b]
+         cfcmovp	qword ptr [r8 + 4*rax + 123], r9
+# CHECK: cfcmovp	dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x4a,0x54,0x80,0x7b]
+         cfcmovp	dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovp	ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x4a,0x4c,0x80,0x7b]
+         cfcmovp	ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovp	r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4a,0x4c,0x80,0x7b]
+         cfcmovp	r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovp	ax, dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x4a,0xc2]
+         cfcmovp	ax, dx
+# CHECK: cfcmovp	edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x4a,0xd1]
+         cfcmovp	edx, ecx
+# CHECK: cfcmovp	r15, r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4a,0xf9]
+         cfcmovp	r15, r9
+# CHECK: cfcmovs	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x48,0xc2]
+         cfcmovs	r9w, ax, dx
+# CHECK: cfcmovs	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x48,0xd1]
+         cfcmovs	r10d, edx, ecx
+# CHECK: cfcmovs	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x48,0xf9]
+         cfcmovs	r11, r15, r9
+# CHECK: cfcmovs	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x48,0x54,0x80,0x7b]
+         cfcmovs	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovs	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x48,0x4c,0x80,0x7b]
+         cfcmovs	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovs	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x48,0x4c,0x80,0x7b]
+         cfcmovs	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovs	word ptr [r8 + 4*rax + 123], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x48,0x54,0x80,0x7b]
+         cfcmovs	word ptr [r8 + 4*rax + 123], dx
+# CHECK: cfcmovs	dword ptr [r8 + 4*rax + 123], ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x48,0x4c,0x80,0x7b]
+         cfcmovs	dword ptr [r8 + 4*rax + 123], ecx
+# CHECK: cfcmovs	qword ptr [r8 + 4*rax + 123], r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x48,0x4c,0x80,0x7b]
+         cfcmovs	qword ptr [r8 + 4*rax + 123], r9
+# CHECK: cfcmovs	dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x48,0x54,0x80,0x7b]
+         cfcmovs	dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovs	ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x48,0x4c,0x80,0x7b]
+         cfcmovs	ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovs	r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x48,0x4c,0x80,0x7b]
+         cfcmovs	r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmovs	ax, dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x48,0xc2]
+         cfcmovs	ax, dx
+# CHECK: cfcmovs	edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x48,0xd1]
+         cfcmovs	edx, ecx
+# CHECK: cfcmovs	r15, r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x48,0xf9]
+         cfcmovs	r15, r9
+# CHECK: cfcmove	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x44,0xc2]
+         cfcmove	r9w, ax, dx
+# CHECK: cfcmove	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x44,0xd1]
+         cfcmove	r10d, edx, ecx
+# CHECK: cfcmove	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x44,0xf9]
+         cfcmove	r11, r15, r9
+# CHECK: cfcmove	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x44,0x54,0x80,0x7b]
+         cfcmove	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cfcmove	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x44,0x4c,0x80,0x7b]
+         cfcmove	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmove	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x44,0x4c,0x80,0x7b]
+         cfcmove	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmove	word ptr [r8 + 4*rax + 123], dx
+# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x44,0x54,0x80,0x7b]
+         cfcmove	word ptr [r8 + 4*rax + 123], dx
+# CHECK: cfcmove	dword ptr [r8 + 4*rax + 123], ecx
+# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x44,0x4c,0x80,0x7b]
+         cfcmove	dword ptr [r8 + 4*rax + 123], ecx
+# CHECK: cfcmove	qword ptr [r8 + 4*rax + 123], r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x44,0x4c,0x80,0x7b]
+         cfcmove	qword ptr [r8 + 4*rax + 123], r9
+# CHECK: cfcmove	dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x44,0x54,0x80,0x7b]
+         cfcmove	dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cfcmove	ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x44,0x4c,0x80,0x7b]
+         cfcmove	ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmove	r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x44,0x4c,0x80,0x7b]
+         cfcmove	r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cfcmove	ax, dx
+# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x44,0xc2]
+         cfcmove	ax, dx
+# CHECK: cfcmove	edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x44,0xd1]
+         cfcmove	edx, ecx
+# CHECK: cfcmove	r15, r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x44,0xf9]
+         cfcmove	r15, r9
diff --git a/llvm/test/MC/X86/apx/cmov-att.s b/llvm/test/MC/X86/apx/cmov-att.s
new file mode 100644
index 00000000000000..4b8e6786d80159
--- /dev/null
+++ b/llvm/test/MC/X86/apx/cmov-att.s
@@ -0,0 +1,293 @@
+# RUN: llvm-mc -triple x86_64 -show-encoding %s | FileCheck %s
+# RUN: not llvm-mc -triple i386 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR
+
+# ERROR-COUNT-96: error:
+# ERROR-NOT: error:
+# CHECK: cmovbw	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x42,0xc2]
+         cmovbw	%dx, %ax, %r9w
+# CHECK: cmovbl	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x42,0xd1]
+         cmovbl	%ecx, %edx, %r10d
+# CHECK: cmovbq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x42,0xf9]
+         cmovbq	%r9, %r15, %r11
+# CHECK: cmovbw	123(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x42,0x54,0x80,0x7b]
+         cmovbw	123(%r8,%rax,4), %dx, %ax
+# CHECK: cmovbl	123(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x42,0x4c,0x80,0x7b]
+         cmovbl	123(%r8,%rax,4), %ecx, %edx
+# CHECK: cmovbq	123(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x42,0x4c,0x80,0x7b]
+         cmovbq	123(%r8,%rax,4), %r9, %r15
+# CHECK: cmovbew	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x46,0xc2]
+         cmovbew	%dx, %ax, %r9w
+# CHECK: cmovbel	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x46,0xd1]
+         cmovbel	%ecx, %edx, %r10d
+# CHECK: cmovbeq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x46,0xf9]
+         cmovbeq	%r9, %r15, %r11
+# CHECK: cmovbew	123(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x46,0x54,0x80,0x7b]
+         cmovbew	123(%r8,%rax,4), %dx, %ax
+# CHECK: cmovbel	123(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x46,0x4c,0x80,0x7b]
+         cmovbel	123(%r8,%rax,4), %ecx, %edx
+# CHECK: cmovbeq	123(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x46,0x4c,0x80,0x7b]
+         cmovbeq	123(%r8,%rax,4), %r9, %r15
+# CHECK: cmovlw	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x4c,0xc2]
+         cmovlw	%dx, %ax, %r9w
+# CHECK: cmovll	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x4c,0xd1]
+         cmovll	%ecx, %edx, %r10d
+# CHECK: cmovlq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x4c,0xf9]
+         cmovlq	%r9, %r15, %r11
+# CHECK: cmovlw	123(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x4c,0x54,0x80,0x7b]
+         cmovlw	123(%r8,%rax,4), %dx, %ax
+# CHECK: cmovll	123(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x4c,0x4c,0x80,0x7b]
+         cmovll	123(%r8,%rax,4), %ecx, %edx
+# CHECK: cmovlq	123(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x4c,0x4c,0x80,0x7b]
+         cmovlq	123(%r8,%rax,4), %r9, %r15
+# CHECK: cmovlew	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x4e,0xc2]
+         cmovlew	%dx, %ax, %r9w
+# CHECK: cmovlel	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x4e,0xd1]
+         cmovlel	%ecx, %edx, %r10d
+# CHECK: cmovleq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x4e,0xf9]
+         cmovleq	%r9, %r15, %r11
+# CHECK: cmovlew	123(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x4e,0x54,0x80,0x7b]
+         cmovlew	123(%r8,%rax,4), %dx, %ax
+# CHECK: cmovlel	123(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x4e,0x4c,0x80,0x7b]
+         cmovlel	123(%r8,%rax,4), %ecx, %edx
+# CHECK: cmovleq	123(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x4e,0x4c,0x80,0x7b]
+         cmovleq	123(%r8,%rax,4), %r9, %r15
+# CHECK: cmovaew	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x43,0xc2]
+         cmovaew	%dx, %ax, %r9w
+# CHECK: cmovael	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x43,0xd1]
+         cmovael	%ecx, %edx, %r10d
+# CHECK: cmovaeq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x43,0xf9]
+         cmovaeq	%r9, %r15, %r11
+# CHECK: cmovaew	123(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x43,0x54,0x80,0x7b]
+         cmovaew	123(%r8,%rax,4), %dx, %ax
+# CHECK: cmovael	123(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x43,0x4c,0x80,0x7b]
+         cmovael	123(%r8,%rax,4), %ecx, %edx
+# CHECK: cmovaeq	123(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x43,0x4c,0x80,0x7b]
+         cmovaeq	123(%r8,%rax,4), %r9, %r15
+# CHECK: cmovaw	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x47,0xc2]
+         cmovaw	%dx, %ax, %r9w
+# CHECK: cmoval	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x47,0xd1]
+         cmoval	%ecx, %edx, %r10d
+# CHECK: cmovaq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x47,0xf9]
+         cmovaq	%r9, %r15, %r11
+# CHECK: cmovaw	123(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x47,0x54,0x80,0x7b]
+         cmovaw	123(%r8,%rax,4), %dx, %ax
+# CHECK: cmoval	123(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x47,0x4c,0x80,0x7b]
+         cmoval	123(%r8,%rax,4), %ecx, %edx
+# CHECK: cmovaq	123(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x47,0x4c,0x80,0x7b]
+         cmovaq	123(%r8,%rax,4), %r9, %r15
+# CHECK: cmovgew	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x4d,0xc2]
+         cmovgew	%dx, %ax, %r9w
+# CHECK: cmovgel	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x4d,0xd1]
+         cmovgel	%ecx, %edx, %r10d
+# CHECK: cmovgeq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x4d,0xf9]
+         cmovgeq	%r9, %r15, %r11
+# CHECK: cmovgew	123(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x4d,0x54,0x80,0x7b]
+         cmovgew	123(%r8,%rax,4), %dx, %ax
+# CHECK: cmovgel	123(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x4d,0x4c,0x80,0x7b]
+         cmovgel	123(%r8,%rax,4), %ecx, %edx
+# CHECK: cmovgeq	123(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x4d,0x4c,0x80,0x7b]
+         cmovgeq	123(%r8,%rax,4), %r9, %r15
+# CHECK: cmovgw	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x4f,0xc2]
+         cmovgw	%dx, %ax, %r9w
+# CHECK: cmovgl	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x4f,0xd1]
+         cmovgl	%ecx, %edx, %r10d
+# CHECK: cmovgq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x4f,0xf9]
+         cmovgq	%r9, %r15, %r11
+# CHECK: cmovgw	123(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x4f,0x54,0x80,0x7b]
+         cmovgw	123(%r8,%rax,4), %dx, %ax
+# CHECK: cmovgl	123(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x4f,0x4c,0x80,0x7b]
+         cmovgl	123(%r8,%rax,4), %ecx, %edx
+# CHECK: cmovgq	123(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x4f,0x4c,0x80,0x7b]
+         cmovgq	123(%r8,%rax,4), %r9, %r15
+# CHECK: cmovnow	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x41,0xc2]
+         cmovnow	%dx, %ax, %r9w
+# CHECK: cmovnol	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x41,0xd1]
+         cmovnol	%ecx, %edx, %r10d
+# CHECK: cmovnoq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x41,0xf9]
+         cmovnoq	%r9, %r15, %r11
+# CHECK: cmovnow	123(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x41,0x54,0x80,0x7b]
+         cmovnow	123(%r8,%rax,4), %dx, %ax
+# CHECK: cmovnol	123(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x41,0x4c,0x80,0x7b]
+         cmovnol	123(%r8,%rax,4), %ecx, %edx
+# CHECK: cmovnoq	123(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x41,0x4c,0x80,0x7b]
+         cmovnoq	123(%r8,%rax,4), %r9, %r15
+# CHECK: cmovnpw	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x4b,0xc2]
+         cmovnpw	%dx, %ax, %r9w
+# CHECK: cmovnpl	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x4b,0xd1]
+         cmovnpl	%ecx, %edx, %r10d
+# CHECK: cmovnpq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x4b,0xf9]
+         cmovnpq	%r9, %r15, %r11
+# CHECK: cmovnpw	123(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x4b,0x54,0x80,0x7b]
+         cmovnpw	123(%r8,%rax,4), %dx, %ax
+# CHECK: cmovnpl	123(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x4b,0x4c,0x80,0x7b]
+         cmovnpl	123(%r8,%rax,4), %ecx, %edx
+# CHECK: cmovnpq	123(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x4b,0x4c,0x80,0x7b]
+         cmovnpq	123(%r8,%rax,4), %r9, %r15
+# CHECK: cmovnsw	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x49,0xc2]
+         cmovnsw	%dx, %ax, %r9w
+# CHECK: cmovnsl	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x49,0xd1]
+         cmovnsl	%ecx, %edx, %r10d
+# CHECK: cmovnsq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x49,0xf9]
+         cmovnsq	%r9, %r15, %r11
+# CHECK: cmovnsw	123(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x49,0x54,0x80,0x7b]
+         cmovnsw	123(%r8,%rax,4), %dx, %ax
+# CHECK: cmovnsl	123(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x49,0x4c,0x80,0x7b]
+         cmovnsl	123(%r8,%rax,4), %ecx, %edx
+# CHECK: cmovnsq	123(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x49,0x4c,0x80,0x7b]
+         cmovnsq	123(%r8,%rax,4), %r9, %r15
+# CHECK: cmovnew	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x45,0xc2]
+         cmovnew	%dx, %ax, %r9w
+# CHECK: cmovnel	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x45,0xd1]
+         cmovnel	%ecx, %edx, %r10d
+# CHECK: cmovneq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x45,0xf9]
+         cmovneq	%r9, %r15, %r11
+# CHECK: cmovnew	123(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x45,0x54,0x80,0x7b]
+         cmovnew	123(%r8,%rax,4), %dx, %ax
+# CHECK: cmovnel	123(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x45,0x4c,0x80,0x7b]
+         cmovnel	123(%r8,%rax,4), %ecx, %edx
+# CHECK: cmovneq	123(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x45,0x4c,0x80,0x7b]
+         cmovneq	123(%r8,%rax,4), %r9, %r15
+# CHECK: cmovow	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x40,0xc2]
+         cmovow	%dx, %ax, %r9w
+# CHECK: cmovol	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x40,0xd1]
+         cmovol	%ecx, %edx, %r10d
+# CHECK: cmovoq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x40,0xf9]
+         cmovoq	%r9, %r15, %r11
+# CHECK: cmovow	123(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x40,0x54,0x80,0x7b]
+         cmovow	123(%r8,%rax,4), %dx, %ax
+# CHECK: cmovol	123(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x40,0x4c,0x80,0x7b]
+         cmovol	123(%r8,%rax,4), %ecx, %edx
+# CHECK: cmovoq	123(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x40,0x4c,0x80,0x7b]
+         cmovoq	123(%r8,%rax,4), %r9, %r15
+# CHECK: cmovpw	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x4a,0xc2]
+         cmovpw	%dx, %ax, %r9w
+# CHECK: cmovpl	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x4a,0xd1]
+         cmovpl	%ecx, %edx, %r10d
+# CHECK: cmovpq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x4a,0xf9]
+         cmovpq	%r9, %r15, %r11
+# CHECK: cmovpw	123(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x4a,0x54,0x80,0x7b]
+         cmovpw	123(%r8,%rax,4), %dx, %ax
+# CHECK: cmovpl	123(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x4a,0x4c,0x80,0x7b]
+         cmovpl	123(%r8,%rax,4), %ecx, %edx
+# CHECK: cmovpq	123(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x4a,0x4c,0x80,0x7b]
+         cmovpq	123(%r8,%rax,4), %r9, %r15
+# CHECK: cmovsw	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x48,0xc2]
+         cmovsw	%dx, %ax, %r9w
+# CHECK: cmovsl	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x48,0xd1]
+         cmovsl	%ecx, %edx, %r10d
+# CHECK: cmovsq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x48,0xf9]
+         cmovsq	%r9, %r15, %r11
+# CHECK: cmovsw	123(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x48,0x54,0x80,0x7b]
+         cmovsw	123(%r8,%rax,4), %dx, %ax
+# CHECK: cmovsl	123(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x48,0x4c,0x80,0x7b]
+         cmovsl	123(%r8,%rax,4), %ecx, %edx
+# CHECK: cmovsq	123(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x48,0x4c,0x80,0x7b]
+         cmovsq	123(%r8,%rax,4), %r9, %r15
+# CHECK: cmovew	%dx, %ax, %r9w
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x44,0xc2]
+         cmovew	%dx, %ax, %r9w
+# CHECK: cmovel	%ecx, %edx, %r10d
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x44,0xd1]
+         cmovel	%ecx, %edx, %r10d
+# CHECK: cmoveq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x44,0xf9]
+         cmoveq	%r9, %r15, %r11
+# CHECK: cmovew	123(%r8,%rax,4), %dx, %ax
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x44,0x54,0x80,0x7b]
+         cmovew	123(%r8,%rax,4), %dx, %ax
+# CHECK: cmovel	123(%r8,%rax,4), %ecx, %edx
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x44,0x4c,0x80,0x7b]
+         cmovel	123(%r8,%rax,4), %ecx, %edx
+# CHECK: cmoveq	123(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x44,0x4c,0x80,0x7b]
+         cmoveq	123(%r8,%rax,4), %r9, %r15
diff --git a/llvm/test/MC/X86/apx/cmov-intel.s b/llvm/test/MC/X86/apx/cmov-intel.s
new file mode 100644
index 00000000000000..f481346bc34708
--- /dev/null
+++ b/llvm/test/MC/X86/apx/cmov-intel.s
@@ -0,0 +1,290 @@
+# RUN: llvm-mc -triple x86_64 -show-encoding -x86-asm-syntax=intel -output-asm-variant=1 %s | FileCheck %s
+
+# CHECK: cmovb	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x42,0xc2]
+         cmovb	r9w, ax, dx
+# CHECK: cmovb	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x42,0xd1]
+         cmovb	r10d, edx, ecx
+# CHECK: cmovb	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x42,0xf9]
+         cmovb	r11, r15, r9
+# CHECK: cmovb	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x42,0x54,0x80,0x7b]
+         cmovb	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cmovb	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x42,0x4c,0x80,0x7b]
+         cmovb	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cmovb	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x42,0x4c,0x80,0x7b]
+         cmovb	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cmovbe	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x46,0xc2]
+         cmovbe	r9w, ax, dx
+# CHECK: cmovbe	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x46,0xd1]
+         cmovbe	r10d, edx, ecx
+# CHECK: cmovbe	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x46,0xf9]
+         cmovbe	r11, r15, r9
+# CHECK: cmovbe	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x46,0x54,0x80,0x7b]
+         cmovbe	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cmovbe	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x46,0x4c,0x80,0x7b]
+         cmovbe	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cmovbe	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x46,0x4c,0x80,0x7b]
+         cmovbe	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cmovl	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x4c,0xc2]
+         cmovl	r9w, ax, dx
+# CHECK: cmovl	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x4c,0xd1]
+         cmovl	r10d, edx, ecx
+# CHECK: cmovl	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x4c,0xf9]
+         cmovl	r11, r15, r9
+# CHECK: cmovl	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x4c,0x54,0x80,0x7b]
+         cmovl	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cmovl	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x4c,0x4c,0x80,0x7b]
+         cmovl	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cmovl	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x4c,0x4c,0x80,0x7b]
+         cmovl	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cmovle	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x4e,0xc2]
+         cmovle	r9w, ax, dx
+# CHECK: cmovle	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x4e,0xd1]
+         cmovle	r10d, edx, ecx
+# CHECK: cmovle	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x4e,0xf9]
+         cmovle	r11, r15, r9
+# CHECK: cmovle	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x4e,0x54,0x80,0x7b]
+         cmovle	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cmovle	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x4e,0x4c,0x80,0x7b]
+         cmovle	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cmovle	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x4e,0x4c,0x80,0x7b]
+         cmovle	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cmovae	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x43,0xc2]
+         cmovae	r9w, ax, dx
+# CHECK: cmovae	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x43,0xd1]
+         cmovae	r10d, edx, ecx
+# CHECK: cmovae	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x43,0xf9]
+         cmovae	r11, r15, r9
+# CHECK: cmovae	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x43,0x54,0x80,0x7b]
+         cmovae	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cmovae	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x43,0x4c,0x80,0x7b]
+         cmovae	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cmovae	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x43,0x4c,0x80,0x7b]
+         cmovae	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cmova	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x47,0xc2]
+         cmova	r9w, ax, dx
+# CHECK: cmova	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x47,0xd1]
+         cmova	r10d, edx, ecx
+# CHECK: cmova	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x47,0xf9]
+         cmova	r11, r15, r9
+# CHECK: cmova	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x47,0x54,0x80,0x7b]
+         cmova	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cmova	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x47,0x4c,0x80,0x7b]
+         cmova	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cmova	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x47,0x4c,0x80,0x7b]
+         cmova	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cmovge	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x4d,0xc2]
+         cmovge	r9w, ax, dx
+# CHECK: cmovge	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x4d,0xd1]
+         cmovge	r10d, edx, ecx
+# CHECK: cmovge	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x4d,0xf9]
+         cmovge	r11, r15, r9
+# CHECK: cmovge	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x4d,0x54,0x80,0x7b]
+         cmovge	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cmovge	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x4d,0x4c,0x80,0x7b]
+         cmovge	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cmovge	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x4d,0x4c,0x80,0x7b]
+         cmovge	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cmovg	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x4f,0xc2]
+         cmovg	r9w, ax, dx
+# CHECK: cmovg	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x4f,0xd1]
+         cmovg	r10d, edx, ecx
+# CHECK: cmovg	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x4f,0xf9]
+         cmovg	r11, r15, r9
+# CHECK: cmovg	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x4f,0x54,0x80,0x7b]
+         cmovg	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cmovg	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x4f,0x4c,0x80,0x7b]
+         cmovg	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cmovg	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x4f,0x4c,0x80,0x7b]
+         cmovg	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cmovno	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x41,0xc2]
+         cmovno	r9w, ax, dx
+# CHECK: cmovno	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x41,0xd1]
+         cmovno	r10d, edx, ecx
+# CHECK: cmovno	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x41,0xf9]
+         cmovno	r11, r15, r9
+# CHECK: cmovno	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x41,0x54,0x80,0x7b]
+         cmovno	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cmovno	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x41,0x4c,0x80,0x7b]
+         cmovno	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cmovno	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x41,0x4c,0x80,0x7b]
+         cmovno	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cmovnp	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x4b,0xc2]
+         cmovnp	r9w, ax, dx
+# CHECK: cmovnp	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x4b,0xd1]
+         cmovnp	r10d, edx, ecx
+# CHECK: cmovnp	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x4b,0xf9]
+         cmovnp	r11, r15, r9
+# CHECK: cmovnp	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x4b,0x54,0x80,0x7b]
+         cmovnp	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cmovnp	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x4b,0x4c,0x80,0x7b]
+         cmovnp	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cmovnp	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x4b,0x4c,0x80,0x7b]
+         cmovnp	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cmovns	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x49,0xc2]
+         cmovns	r9w, ax, dx
+# CHECK: cmovns	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x49,0xd1]
+         cmovns	r10d, edx, ecx
+# CHECK: cmovns	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x49,0xf9]
+         cmovns	r11, r15, r9
+# CHECK: cmovns	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x49,0x54,0x80,0x7b]
+         cmovns	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cmovns	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x49,0x4c,0x80,0x7b]
+         cmovns	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cmovns	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x49,0x4c,0x80,0x7b]
+         cmovns	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cmovne	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x45,0xc2]
+         cmovne	r9w, ax, dx
+# CHECK: cmovne	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x45,0xd1]
+         cmovne	r10d, edx, ecx
+# CHECK: cmovne	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x45,0xf9]
+         cmovne	r11, r15, r9
+# CHECK: cmovne	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x45,0x54,0x80,0x7b]
+         cmovne	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cmovne	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x45,0x4c,0x80,0x7b]
+         cmovne	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cmovne	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x45,0x4c,0x80,0x7b]
+         cmovne	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cmovo	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x40,0xc2]
+         cmovo	r9w, ax, dx
+# CHECK: cmovo	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x40,0xd1]
+         cmovo	r10d, edx, ecx
+# CHECK: cmovo	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x40,0xf9]
+         cmovo	r11, r15, r9
+# CHECK: cmovo	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x40,0x54,0x80,0x7b]
+         cmovo	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cmovo	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x40,0x4c,0x80,0x7b]
+         cmovo	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cmovo	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x40,0x4c,0x80,0x7b]
+         cmovo	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cmovp	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x4a,0xc2]
+         cmovp	r9w, ax, dx
+# CHECK: cmovp	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x4a,0xd1]
+         cmovp	r10d, edx, ecx
+# CHECK: cmovp	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x4a,0xf9]
+         cmovp	r11, r15, r9
+# CHECK: cmovp	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x4a,0x54,0x80,0x7b]
+         cmovp	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cmovp	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x4a,0x4c,0x80,0x7b]
+         cmovp	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cmovp	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x4a,0x4c,0x80,0x7b]
+         cmovp	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cmovs	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x48,0xc2]
+         cmovs	r9w, ax, dx
+# CHECK: cmovs	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x48,0xd1]
+         cmovs	r10d, edx, ecx
+# CHECK: cmovs	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x48,0xf9]
+         cmovs	r11, r15, r9
+# CHECK: cmovs	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x48,0x54,0x80,0x7b]
+         cmovs	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cmovs	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x48,0x4c,0x80,0x7b]
+         cmovs	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cmovs	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x48,0x4c,0x80,0x7b]
+         cmovs	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: cmove	r9w, ax, dx
+# CHECK: encoding: [0x62,0xf4,0x35,0x18,0x44,0xc2]
+         cmove	r9w, ax, dx
+# CHECK: cmove	r10d, edx, ecx
+# CHECK: encoding: [0x62,0xf4,0x2c,0x18,0x44,0xd1]
+         cmove	r10d, edx, ecx
+# CHECK: cmove	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x18,0x44,0xf9]
+         cmove	r11, r15, r9
+# CHECK: cmove	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x7d,0x18,0x44,0x54,0x80,0x7b]
+         cmove	ax, dx, word ptr [r8 + 4*rax + 123]
+# CHECK: cmove	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0xd4,0x6c,0x18,0x44,0x4c,0x80,0x7b]
+         cmove	edx, ecx, dword ptr [r8 + 4*rax + 123]
+# CHECK: cmove	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0x84,0x18,0x44,0x4c,0x80,0x7b]
+         cmove	r15, r9, qword ptr [r8 + 4*rax + 123]
diff --git a/llvm/test/TableGen/x86-fold-tables.inc b/llvm/test/TableGen/x86-fold-tables.inc
index eea4f87cae9cec..7b65e483c39d0d 100644
--- a/llvm/test/TableGen/x86-fold-tables.inc
+++ b/llvm/test/TableGen/x86-fold-tables.inc
@@ -1937,8 +1937,11 @@ static const X86FoldTableEntry Table2[] = {
   {X86::BLENDVPDrr0, X86::BLENDVPDrm0, TB_ALIGN_16},
   {X86::BLENDVPSrr0, X86::BLENDVPSrm0, TB_ALIGN_16},
   {X86::CMOV16rr, X86::CMOV16rm, 0},
+  {X86::CMOV16rr_ND, X86::CMOV16rm_ND, 0},
   {X86::CMOV32rr, X86::CMOV32rm, 0},
+  {X86::CMOV32rr_ND, X86::CMOV32rm_ND, 0},
   {X86::CMOV64rr, X86::CMOV64rm, 0},
+  {X86::CMOV64rr_ND, X86::CMOV64rm_ND, 0},
   {X86::CMPPDrri, X86::CMPPDrmi, TB_ALIGN_16},
   {X86::CMPPSrri, X86::CMPPSrmi, TB_ALIGN_16},
   {X86::CMPSDrri, X86::CMPSDrmi, 0},
diff --git a/llvm/utils/TableGen/X86ManualFoldTables.def b/llvm/utils/TableGen/X86ManualFoldTables.def
index 8e6cb4a7bd8798..06ddb759ff3f43 100644
--- a/llvm/utils/TableGen/X86ManualFoldTables.def
+++ b/llvm/utils/TableGen/X86ManualFoldTables.def
@@ -227,6 +227,13 @@ NOFOLD(MMX_MOVQ64rr_REV)
 NOFOLD(INSERTPSrr)
 NOFOLD(VINSERTPSZrr)
 NOFOLD(VINSERTPSrr)
+// CFCMOV instructions have different semantics between rr and rm.
+NOFOLD(CFCMOV16rr)
+NOFOLD(CFCMOV32rr)
+NOFOLD(CFCMOV64rr)
+NOFOLD(CFCMOV16rr_ND)
+NOFOLD(CFCMOV32rr_ND)
+NOFOLD(CFCMOV64rr_ND)
 #undef NOFOLD
 
 #ifndef ENTRY
diff --git a/llvm/utils/TableGen/X86RecognizableInstr.cpp b/llvm/utils/TableGen/X86RecognizableInstr.cpp
index 39006a40daeb6a..73454003fd8baa 100644
--- a/llvm/utils/TableGen/X86RecognizableInstr.cpp
+++ b/llvm/utils/TableGen/X86RecognizableInstr.cpp
@@ -540,6 +540,13 @@ void RecognizableInstr::emitInstructionSpecifier() {
     HANDLE_OPERAND(relocation)
     HANDLE_OPERAND(opcodeModifier)
     break;
+  case X86Local::MRMDestRegCC:
+    assert(numPhysicalOperands == 3 &&
+           "Unexpected number of operands for MRMDestRegCC");
+    HANDLE_OPERAND(rmRegister)
+    HANDLE_OPERAND(roRegister)
+    HANDLE_OPERAND(opcodeModifier)
+    break;
   case X86Local::MRMDestReg:
     // Operand 1 is a register operand in the R/M field.
     // - In AVX512 there may be a mask operand here -
@@ -566,6 +573,13 @@ void RecognizableInstr::emitInstructionSpecifier() {
     HANDLE_OPTIONAL(immediate)
     HANDLE_OPTIONAL(immediate)
     break;
+  case X86Local::MRMDestMemCC:
+    assert(numPhysicalOperands == 3 &&
+           "Unexpected number of operands for MRMDestMemCC");
+    HANDLE_OPERAND(memory)
+    HANDLE_OPERAND(roRegister)
+    HANDLE_OPERAND(opcodeModifier)
+    break;
   case X86Local::MRMDestMem4VOp3CC:
     // Operand 1 is a register operand in the Reg/Opcode field.
     // Operand 2 is a register operand in the R/M field.
@@ -650,8 +664,10 @@ void RecognizableInstr::emitInstructionSpecifier() {
     HANDLE_OPTIONAL(immediate)
     break;
   case X86Local::MRMSrcRegCC:
-    assert(numPhysicalOperands == 3 &&
+    assert(numPhysicalOperands >= 3 && numPhysicalOperands <= 4 &&
            "Unexpected number of operands for MRMSrcRegCC");
+    if (IsND)
+      HANDLE_OPERAND(vvvvRegister)
     HANDLE_OPERAND(roRegister)
     HANDLE_OPERAND(rmRegister)
     HANDLE_OPERAND(opcodeModifier)
@@ -700,8 +716,10 @@ void RecognizableInstr::emitInstructionSpecifier() {
     HANDLE_OPTIONAL(immediate)
     break;
   case X86Local::MRMSrcMemCC:
-    assert(numPhysicalOperands == 3 &&
+    assert(numPhysicalOperands >= 3 && numPhysicalOperands <= 4 &&
            "Unexpected number of operands for MRMSrcMemCC");
+    if (IsND)
+      HANDLE_OPERAND(vvvvRegister)
     HANDLE_OPERAND(roRegister)
     HANDLE_OPERAND(memory)
     HANDLE_OPERAND(opcodeModifier)
@@ -870,6 +888,7 @@ void RecognizableInstr::emitDecodePath(DisassemblerTables &tables) const {
   case X86Local::PrefixByte:
     filter = std::make_unique<DumbFilter>();
     break;
+  case X86Local::MRMDestRegCC:
   case X86Local::MRMDestReg:
   case X86Local::MRMSrcReg:
   case X86Local::MRMSrcReg4VOp3:
@@ -879,6 +898,7 @@ void RecognizableInstr::emitDecodePath(DisassemblerTables &tables) const {
   case X86Local::MRMXr:
     filter = std::make_unique<ModFilter>(true);
     break;
+  case X86Local::MRMDestMemCC:
   case X86Local::MRMDestMem:
   case X86Local::MRMDestMem4VOp3CC:
   case X86Local::MRMDestMemFSIB:
@@ -950,6 +970,7 @@ void RecognizableInstr::emitDecodePath(DisassemblerTables &tables) const {
   if (Form == X86Local::AddRegFrm || Form == X86Local::MRMSrcRegCC ||
       Form == X86Local::MRMSrcMemCC || Form == X86Local::MRMXrCC ||
       Form == X86Local::MRMXmCC || Form == X86Local::AddCCFrm ||
+      Form == X86Local::MRMDestRegCC || Form == X86Local::MRMDestMemCC ||
       Form == X86Local::MRMDestMem4VOp3CC) {
     uint8_t Count = Form == X86Local::AddRegFrm ? 8 : 16;
     assert(((opcodeToSet % Count) == 0) && "ADDREG_FRM opcode not aligned");
diff --git a/llvm/utils/TableGen/X86RecognizableInstr.h b/llvm/utils/TableGen/X86RecognizableInstr.h
index ad319b3f28b723..68af68fb5aa033 100644
--- a/llvm/utils/TableGen/X86RecognizableInstr.h
+++ b/llvm/utils/TableGen/X86RecognizableInstr.h
@@ -106,6 +106,8 @@ enum {
   RawFrmImm16 = 8,
   AddCCFrm = 9,
   PrefixByte = 10,
+  MRMDestRegCC = 18,
+  MRMDestMemCC = 19,
   MRMDestMem4VOp3CC = 20,
   MRMr0 = 21,
   MRMSrcMemFSIB = 22,

>From feb65296b589dcf014f950b48a2f61b035bb38fe Mon Sep 17 00:00:00 2001
From: "Wang, Xin10" <xin10.wang at intel.com>
Date: Tue, 20 Feb 2024 23:31:21 -0800
Subject: [PATCH 02/10] support fast isel

---
 llvm/lib/Target/X86/X86FastISel.cpp       |  3 +-
 llvm/lib/Target/X86/X86InstrCMovSetCC.td  |  3 +-
 llvm/test/CodeGen/X86/isel-select-cmov.ll | 50 +++++++++++++++++++++++
 3 files changed, 54 insertions(+), 2 deletions(-)

diff --git a/llvm/lib/Target/X86/X86FastISel.cpp b/llvm/lib/Target/X86/X86FastISel.cpp
index 48d3b68b1823a5..2eae155956368f 100644
--- a/llvm/lib/Target/X86/X86FastISel.cpp
+++ b/llvm/lib/Target/X86/X86FastISel.cpp
@@ -2133,7 +2133,8 @@ bool X86FastISel::X86FastEmitCMoveSelect(MVT RetVT, const Instruction *I) {
     return false;
 
   const TargetRegisterInfo &TRI = *Subtarget->getRegisterInfo();
-  unsigned Opc = X86::getCMovOpcode(TRI.getRegSizeInBits(*RC)/8);
+  unsigned Opc = X86::getCMovOpcode(TRI.getRegSizeInBits(*RC) / 8, false,
+                                    Subtarget->hasNDD());
   Register ResultReg = fastEmitInst_rri(Opc, RC, RHSReg, LHSReg, CC);
   updateValueMap(I, ResultReg);
   return true;
diff --git a/llvm/lib/Target/X86/X86InstrCMovSetCC.td b/llvm/lib/Target/X86/X86InstrCMovSetCC.td
index 699014b29bae44..125c1d53c2845e 100644
--- a/llvm/lib/Target/X86/X86InstrCMovSetCC.td
+++ b/llvm/lib/Target/X86/X86InstrCMovSetCC.td
@@ -11,6 +11,7 @@
 //
 //===----------------------------------------------------------------------===//
 
+
 // CMOV instructions.
 multiclass Cmov<X86TypeInfo t, string args, bit ndd = 0, string suffix = ""> {
 let isCommutable = 1, SchedRW = [WriteCMOV] in
@@ -42,7 +43,7 @@ let Predicates = [HasCMOV, HasCF, In64BitMode] in {
 let Predicates = [HasCMOV, HasCF, HasNDD, In64BitMode] in
   def rr_ND : ITy<0x40, MRMSrcRegCC, t, (outs t.RegClass:$dst),
                   (ins t.RegClass:$src1, t.RegClass:$src2, ccode:$cond),
-                  "cfcmov${cond}", binop_ndd_args, []>, UseEFLAGS, NDD<1>, NF;  
+                  "cfcmov${cond}", binop_ndd_args, []>, UseEFLAGS, NDD<1>, NF;
 }
 let SchedRW = [WriteCMOV.Folded, WriteCMOV.ReadAfterFold] in {
 let Predicates = [HasCMOV, HasCF, In64BitMode] in {
diff --git a/llvm/test/CodeGen/X86/isel-select-cmov.ll b/llvm/test/CodeGen/X86/isel-select-cmov.ll
index 0e5293c9000f04..39a20bf6637bb8 100644
--- a/llvm/test/CodeGen/X86/isel-select-cmov.ll
+++ b/llvm/test/CodeGen/X86/isel-select-cmov.ll
@@ -13,6 +13,8 @@
 ; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=i686-apple-darwin10 -verify-machineinstrs              | FileCheck %s --check-prefix=GISEL-X86
 ; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=i686-apple-darwin10 -verify-machineinstrs -mattr=+cmov | FileCheck %s --check-prefix=GISEL-X86-CMOV
 
+; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 -verify-machineinstrs -mattr=+ndd    | FileCheck %s --check-prefix=NDD
+
 ; Test conditional move for the supported types (i16, i32, and i32) and
 ; conditon input (argument or cmp).
 ; When cmov is not available (i8 type or X86), the branch is expected.
@@ -114,6 +116,16 @@ define zeroext i8 @select_cmov_i8(i1 zeroext %cond, i8 zeroext %a, i8 zeroext %b
 ; GISEL-X86-CMOV-NEXT:    cmovnew %dx, %ax
 ; GISEL-X86-CMOV-NEXT:    ## kill: def $al killed $al killed $eax
 ; GISEL-X86-CMOV-NEXT:    retl
+;
+; NDD-LABEL: select_cmov_i8:
+; NDD:       ## %bb.0:
+; NDD-NEXT:    testb $1, %dil
+; NDD-NEXT:    jne LBB0_2
+; NDD-NEXT:  ## %bb.1:
+; NDD-NEXT:    movl %edx, %esi
+; NDD-NEXT:  LBB0_2:
+; NDD-NEXT:    movzbl %sil, %eax
+; NDD-NEXT:    retq
   %1 = select i1 %cond, i8 %a, i8 %b
   ret i8 %1
 }
@@ -207,6 +219,13 @@ define zeroext i16 @select_cmov_i16(i1 zeroext %cond, i16 zeroext %a, i16 zeroex
 ; GISEL-X86-CMOV-NEXT:    cmovnew %dx, %ax
 ; GISEL-X86-CMOV-NEXT:    ## kill: def $ax killed $ax killed $eax
 ; GISEL-X86-CMOV-NEXT:    retl
+;
+; NDD-LABEL: select_cmov_i16:
+; NDD:       ## %bb.0:
+; NDD-NEXT:    testb $1, %dil
+; NDD-NEXT:    cmovnew %si, %dx, %ax
+; NDD-NEXT:    movzwl %ax, %eax
+; NDD-NEXT:    retq
   %1 = select i1 %cond, i16 %a, i16 %b
   ret i16 %1
 }
@@ -305,6 +324,13 @@ define zeroext i16 @select_cmp_cmov_i16(i16 zeroext %a, i16 zeroext %b) {
 ; GISEL-X86-CMOV-NEXT:    cmovew %cx, %ax
 ; GISEL-X86-CMOV-NEXT:    ## kill: def $ax killed $ax killed $eax
 ; GISEL-X86-CMOV-NEXT:    retl
+;
+; NDD-LABEL: select_cmp_cmov_i16:
+; NDD:       ## %bb.0:
+; NDD-NEXT:    cmpw %si, %di
+; NDD-NEXT:    cmovbw %di, %si, %ax
+; NDD-NEXT:    movzwl %ax, %eax
+; NDD-NEXT:    retq
   %1 = icmp ult i16 %a, %b
   %2 = select i1 %1, i16 %a, i16 %b
   ret i16 %2
@@ -391,6 +417,12 @@ define i32 @select_cmov_i32(i1 zeroext %cond, i32 %a, i32 %b) {
 ; GISEL-X86-CMOV-NEXT:    testl %ecx, %ecx
 ; GISEL-X86-CMOV-NEXT:    cmovnel {{[0-9]+}}(%esp), %eax
 ; GISEL-X86-CMOV-NEXT:    retl
+;
+; NDD-LABEL: select_cmov_i32:
+; NDD:       ## %bb.0:
+; NDD-NEXT:    testb $1, %dil
+; NDD-NEXT:    cmovnel %esi, %edx, %eax
+; NDD-NEXT:    retq
   %1 = select i1 %cond, i32 %a, i32 %b
   ret i32 %1
 }
@@ -482,6 +514,12 @@ define i32 @select_cmp_cmov_i32(i32 %a, i32 %b) {
 ; GISEL-X86-CMOV-NEXT:    andl $1, %edx
 ; GISEL-X86-CMOV-NEXT:    cmovel %ecx, %eax
 ; GISEL-X86-CMOV-NEXT:    retl
+;
+; NDD-LABEL: select_cmp_cmov_i32:
+; NDD:       ## %bb.0:
+; NDD-NEXT:    cmpl %esi, %edi
+; NDD-NEXT:    cmovbl %edi, %esi, %eax
+; NDD-NEXT:    retq
   %1 = icmp ult i32 %a, %b
   %2 = select i1 %1, i32 %a, i32 %b
   ret i32 %2
@@ -584,6 +622,12 @@ define i64 @select_cmov_i64(i1 zeroext %cond, i64 %a, i64 %b) {
 ; GISEL-X86-CMOV-NEXT:    cmovnel {{[0-9]+}}(%esp), %eax
 ; GISEL-X86-CMOV-NEXT:    cmovnel {{[0-9]+}}(%esp), %edx
 ; GISEL-X86-CMOV-NEXT:    retl
+;
+; NDD-LABEL: select_cmov_i64:
+; NDD:       ## %bb.0:
+; NDD-NEXT:    testb $1, %dil
+; NDD-NEXT:    cmovneq %rsi, %rdx, %rax
+; NDD-NEXT:    retq
   %1 = select i1 %cond, i64 %a, i64 %b
   ret i64 %1
 }
@@ -754,6 +798,12 @@ define i64 @select_cmp_cmov_i64(i64 %a, i64 %b) nounwind {
 ; GISEL-X86-CMOV-NEXT:    popl %ebx
 ; GISEL-X86-CMOV-NEXT:    popl %ebp
 ; GISEL-X86-CMOV-NEXT:    retl
+;
+; NDD-LABEL: select_cmp_cmov_i64:
+; NDD:       ## %bb.0:
+; NDD-NEXT:    cmpq %rsi, %rdi
+; NDD-NEXT:    cmovbq %rdi, %rsi, %rax
+; NDD-NEXT:    retq
   %1 = icmp ult i64 %a, %b
   %2 = select i1 %1, i64 %a, i64 %b
   ret i64 %2

>From 2ef4f7a9f03cb250451b2b857f7bc97122858de4 Mon Sep 17 00:00:00 2001
From: "Wang, Xin10" <xin10.wang at intel.com>
Date: Tue, 20 Feb 2024 23:53:12 -0800
Subject: [PATCH 03/10] add test for evex-format

---
 .../MC/Disassembler/X86/apx/evex-format.txt   | 32 +++++++++++++++++++
 .../Disassembler/X86/apx/reverse-encoding.txt |  6 ++++
 llvm/test/MC/X86/apx/evex-format-att.s        | 26 +++++++++++++++
 llvm/test/MC/X86/apx/evex-format-intel.s      | 26 +++++++++++++++
 4 files changed, 90 insertions(+)

diff --git a/llvm/test/MC/Disassembler/X86/apx/evex-format.txt b/llvm/test/MC/Disassembler/X86/apx/evex-format.txt
index 1c1f70b096bed9..55c60cedd031f1 100644
--- a/llvm/test/MC/Disassembler/X86/apx/evex-format.txt
+++ b/llvm/test/MC/Disassembler/X86/apx/evex-format.txt
@@ -11,6 +11,12 @@
 # INTEL: add	r18, qword ptr [r17 + 123], r16
 0x62,0xec,0xec,0x10,0x01,0x41,0x7b
 
+## MRMDestMemCC
+
+# ATT:   cfcmovbq	%r9, 123(%r8,%rax,4)
+# INTEL: cfcmovb	qword ptr [r8 + 4*rax + 123], r9
+0x62,0x54,0xfc,0x0c,0x42,0x4c,0x80,0x7b
+
 ## MRMSrcMem
 
 # ATT:   vbroadcasti32x4	(%r16,%r17), %zmm0
@@ -21,6 +27,16 @@
 # INTEL: sub	r18, r17, qword ptr [r16 + 123]
 0x62,0xec,0xec,0x10,0x2b,0x48,0x7b
 
+## MRMSrcMemCC
+
+# ATT:   cfcmovbq	123(%r8,%rax,4), %r9, %r15
+# INTEL: cfcmovb	r15, r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0x84,0x1c,0x42,0x4c,0x80,0x7b
+
+# ATT:   cfcmovbeq	123(%r8,%rax,4), %r9, %r15
+# INTEL: cfcmovbe	r15, r9, qword ptr [r8 + 4*rax + 123]
+0x62,0x54,0x84,0x1c,0x46,0x4c,0x80,0x7b
+
 ## MRM0m
 
 # ATT:   vprorq	$0, (%r16,%r17), %zmm0
@@ -123,12 +139,28 @@
 # INTEL: {nf}	add	r17, r16
 0x62,0xec,0xfc,0x0c,0x01,0xc1
 
+## MRMDestRegCC
+
+# ATT:   cfcmovbeq	%r15, %r9
+# INTEL: cfcmovbe	r9, r15
+0x62,0x54,0xfc,0x0c,0x46,0xf9
+
 ## MRMSrcReg
 
 # ATT:   mulxq	%r16, %r17, %r18
 # INTEL: mulx	r18, r17, r16
 0x62,0xea,0xf7,0x00,0xf6,0xd0
 
+## MRMSrcRegCC
+
+# ATT:   cfcmovbeq	%r9, %r15
+# INTEL: cfcmovbe	r15, r9
+0x62,0x54,0xfc,0x08,0x46,0xf9
+
+# ATT:   cfcmovlq	%r9, %r15, %r11
+# INTEL: cfcmovl	r11, r15, r9
+0x62,0x54,0xa4,0x1c,0x4c,0xf9
+
 ## MRMSrcReg4VOp3
 
 # ATT:   bzhiq	%r19, %r23, %r27
diff --git a/llvm/test/MC/Disassembler/X86/apx/reverse-encoding.txt b/llvm/test/MC/Disassembler/X86/apx/reverse-encoding.txt
index 9e812e370146ba..a3494ea04464c8 100644
--- a/llvm/test/MC/Disassembler/X86/apx/reverse-encoding.txt
+++ b/llvm/test/MC/Disassembler/X86/apx/reverse-encoding.txt
@@ -430,3 +430,9 @@
 # ATT:   ccmpoq {dfv=}	%r16, %r17
 # INTEL: ccmpo {dfv=}	r17, r16
 0x62,0xec,0x84,0x00,0x3b,0xc8
+
+## cfcmov
+
+# ATT:   cfcmovbeq	%r15, %r9
+# INTEL: cfcmovbe	r9, r15
+0x62,0x54,0xfc,0x0c,0x46,0xf9
diff --git a/llvm/test/MC/X86/apx/evex-format-att.s b/llvm/test/MC/X86/apx/evex-format-att.s
index 055a29fe00f32c..99823a2fb88d31 100644
--- a/llvm/test/MC/X86/apx/evex-format-att.s
+++ b/llvm/test/MC/X86/apx/evex-format-att.s
@@ -10,6 +10,12 @@
 # CHECK: encoding: [0x62,0xec,0xec,0x10,0x01,0x41,0x7b]
          addq	%r16, 123(%r17), %r18
 
+## MRMDestMemCC
+
+# CHECK: cfcmovbq	%r9, 123(%r8,%rax,4)
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x42,0x4c,0x80,0x7b]
+         cfcmovbq	%r9, 123(%r8,%rax,4)
+
 ## MRMSrcMem
 
 # CHECK: vbroadcasti32x4	(%r16,%r17), %zmm0
@@ -20,6 +26,16 @@
 # CHECK: encoding: [0x62,0xec,0xec,0x10,0x2b,0x48,0x7b]
          subq	123(%r16), %r17, %r18
 
+## MRMSrcMemCC
+
+# CHECK: cfcmovbq	123(%r8,%rax,4), %r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x42,0x4c,0x80,0x7b]
+         cfcmovbq	123(%r8,%rax,4), %r9
+
+# CHECK: cfcmovbq	123(%r8,%rax,4), %r9, %r15
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x42,0x4c,0x80,0x7b]
+         cfcmovbq	123(%r8,%rax,4), %r9, %r15
+
 ## MRM0m
 
 # CHECK: vprorq	$0, (%r16,%r17), %zmm0
@@ -128,6 +144,16 @@
 # CHECK: encoding: [0x62,0xea,0xf7,0x00,0xf6,0xd0]
          mulxq	%r16, %r17, %r18
 
+## MRMSrcRegCC
+
+# CHECK: cfcmovbq	%r9, %r15
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x42,0xf9]
+         cfcmovbq	%r9, %r15
+
+# CHECK: cfcmovbeq	%r9, %r15, %r11
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x46,0xf9]
+         cfcmovbeq	%r9, %r15, %r11
+
 ## MRMSrcReg4VOp3
 
 # CHECK: bzhiq	%r19, %r23, %r27
diff --git a/llvm/test/MC/X86/apx/evex-format-intel.s b/llvm/test/MC/X86/apx/evex-format-intel.s
index 06b56078aab904..3722c03894620d 100644
--- a/llvm/test/MC/X86/apx/evex-format-intel.s
+++ b/llvm/test/MC/X86/apx/evex-format-intel.s
@@ -10,6 +10,12 @@
 # CHECK: encoding: [0x62,0xec,0xec,0x10,0x01,0x41,0x7b]
          add	r18, qword ptr [r17 + 123], r16
 
+## MRMDestMemCC
+
+# CHECK: cfcmovb	qword ptr [r8 + 4*rax + 123], r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x42,0x4c,0x80,0x7b]
+         cfcmovb	qword ptr [r8 + 4*rax + 123], r9
+
 ## MRMSrcMem
 
 # CHECK: vbroadcasti32x4	zmm0, xmmword ptr [r16 + r17]
@@ -20,6 +26,16 @@
 # CHECK: encoding: [0x62,0xec,0xec,0x10,0x2b,0x48,0x7b]
          sub	r18, r17, qword ptr [r16 + 123]
 
+## MRMSrcMemCC
+
+# CHECK: cfcmovb	r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x42,0x4c,0x80,0x7b]
+         cfcmovb	r9, qword ptr [r8 + 4*rax + 123]
+
+# CHECK: cfcmovbe	r15, r9, qword ptr [r8 + 4*rax + 123]
+# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x46,0x4c,0x80,0x7b]
+         cfcmovbe	r15, r9, qword ptr [r8 + 4*rax + 123]
+
 ## MRM0m
 
 # CHECK: vprorq	zmm0, zmmword ptr [r16 + r17], 0
@@ -128,6 +144,16 @@
 # CHECK: encoding: [0x62,0xea,0xf7,0x00,0xf6,0xd0]
          mulx	r18, r17, r16
 
+## MRMSrcRegCC
+
+# CHECK: cfcmovb	r15, r9
+# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x42,0xf9]
+         cfcmovb	r15, r9
+
+# CHECK: cfcmovbe	r11, r15, r9
+# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x46,0xf9]
+         cfcmovbe	r11, r15, r9
+
 ## MRMSrcReg4VOp3
 
 # CHECK: bzhi	r27, r23, r19

>From 90844e29bebf0dd11fe3484e0e9958bb0571d1e1 Mon Sep 17 00:00:00 2001
From: "Wang, Xin10" <xin10.wang at intel.com>
Date: Wed, 21 Feb 2024 22:52:12 -0800
Subject: [PATCH 04/10] clang format

---
 llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp        | 3 ++-
 llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp | 4 ++--
 llvm/lib/Target/X86/X86InstrInfo.cpp                  | 5 +++--
 3 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
index 777b188288472a..c27881889a02ad 100644
--- a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -4068,7 +4068,8 @@ unsigned X86AsmParser::checkTargetMatchPredicate(MCInst &Inst) {
 
   if (UseApxExtendedReg && !X86II::canUseApxExtendedReg(MCID))
     return Match_Unsupported;
-  if (ForcedNoFlag != !!(MCID.TSFlags & X86II::EVEX_NF) && !X86::isCFCMOVCC(Opc))
+  if (ForcedNoFlag != !!(MCID.TSFlags & X86II::EVEX_NF) &&
+      !X86::isCFCMOVCC(Opc))
     return Match_Unsupported;
 
   if (ForcedVEXEncoding == VEXEncoding_EVEX &&
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
index 9820f071029be9..a09c5778b2c1dd 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
@@ -1686,8 +1686,8 @@ void X86MCCodeEmitter::encodeInstruction(const MCInst &MI,
     unsigned RegOp = CurOp++;
     unsigned CC = MI.getOperand(CurOp++).getImm();
     emitByte(BaseOpcode + CC, CB);
-    emitMemModRMByte(MI, MemOp, getX86RegNum(MI.getOperand(RegOp)),
-                     TSFlags, Kind, StartByte, CB, Fixups, STI);
+    emitMemModRMByte(MI, MemOp, getX86RegNum(MI.getOperand(RegOp)), TSFlags,
+                     Kind, StartByte, CB, Fixups, STI);
     break;
   }
   case X86II::MRMSrcReg: {
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index 7ec35f7f526c3f..a300108cbb4442 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -4056,8 +4056,9 @@ void X86InstrInfo::insertSelect(MachineBasicBlock &MBB,
   const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();
   const TargetRegisterClass &RC = *MRI.getRegClass(DstReg);
   assert(Cond.size() == 1 && "Invalid Cond array");
-  unsigned Opc = X86::getCMovOpcode(TRI.getRegSizeInBits(RC) / 8,
-                                    false /*HasMemoryOperand*/, Subtarget.hasNDD());
+  unsigned Opc =
+      X86::getCMovOpcode(TRI.getRegSizeInBits(RC) / 8,
+                         false /*HasMemoryOperand*/, Subtarget.hasNDD());
   BuildMI(MBB, I, DL, get(Opc), DstReg)
       .addReg(FalseReg)
       .addReg(TrueReg)

>From 3cbc9ebd3669722ef7efa08649ecabeeccbea143 Mon Sep 17 00:00:00 2001
From: "Wang, Xin10" <xin10.wang at intel.com>
Date: Fri, 23 Feb 2024 00:09:56 -0800
Subject: [PATCH 05/10] resolve comments

---
 .../lib/Target/X86/MCTargetDesc/X86BaseInfo.h |   2 +-
 .../X86/MCTargetDesc/X86MCCodeEmitter.cpp     |   4 +-
 llvm/lib/Target/X86/X86InstrInfo.cpp          |  14 ++-
 llvm/test/CodeGen/X86/apx/cfcmov.ll           |   1 +
 .../CodeGen/X86/apx/flags-copy-lowering.mir   | 102 ++++++++++++++++++
 llvm/utils/TableGen/X86ManualFoldTables.def   |   2 +-
 llvm/utils/TableGen/X86RecognizableInstr.cpp  |   4 +-
 7 files changed, 115 insertions(+), 14 deletions(-)

diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
index f8fa05eb9642d0..c0a75e215a40b5 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
@@ -1054,7 +1054,7 @@ inline int getMemoryOperandNo(uint64_t TSFlags) {
     // Skip registers encoded in reg, VEX_VVVV, and I8IMM.
     return 3;
   case X86II::MRMSrcMemCC:
-    return 1 + HasVEX_4V;
+    return 1 + hasNewDataDest(TSFlags);
   case X86II::MRMDestMem4VOp3CC:
     // Start from 1, skip any registers encoded in VEX_VVVV or I8IMM, or a
     // mask register.
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
index a09c5778b2c1dd..92a14226a0dc05 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
@@ -1740,7 +1740,7 @@ void X86MCCodeEmitter::encodeInstruction(const MCInst &MI,
     break;
   }
   case X86II::MRMSrcRegCC: {
-    if (IsND)
+    if (IsND) // Skip new data destination
       ++CurOp;
     unsigned FirstOp = CurOp++;
     unsigned SecondOp = CurOp++;
@@ -1803,7 +1803,7 @@ void X86MCCodeEmitter::encodeInstruction(const MCInst &MI,
     break;
   }
   case X86II::MRMSrcMemCC: {
-    if (IsND)
+    if (IsND) // Skip new data destination
       ++CurOp;
     unsigned RegOp = CurOp++;
     unsigned FirstMemOp = CurOp;
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index a300108cbb4442..9d739adbcd5bb9 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -2637,12 +2637,9 @@ MachineInstr *X86InstrInfo::commuteInstructionImpl(MachineInstr &MI, bool NewMI,
     WorkingMI = CloneIfNew(MI);
     WorkingMI->setDesc(get(Opc));
     break;
-  case X86::CMOV16rr:
-  case X86::CMOV32rr:
-  case X86::CMOV64rr:
-  case X86::CMOV16rr_ND:
-  case X86::CMOV32rr_ND:
-  case X86::CMOV64rr_ND: {
+  CASE_ND(CMOV16rr)
+  CASE_ND(CMOV32rr)
+  CASE_ND(CMOV64rr) {
     WorkingMI = CloneIfNew(MI);
     unsigned OpNo = MI.getDesc().getNumOperands() - 1;
     X86::CondCode CC = static_cast<X86::CondCode>(MI.getOperand(OpNo).getImm());
@@ -3151,8 +3148,9 @@ X86::CondCode X86::getCondFromSETCC(const MachineInstr &MI) {
 }
 
 X86::CondCode X86::getCondFromCMov(const MachineInstr &MI) {
-  return X86::isCMOVCC(MI.getOpcode()) ? X86::getCondFromMI(MI)
-                                       : X86::COND_INVALID;
+  return X86::isCMOVCC(MI.getOpcode()) || X86::isCFCMOVCC(MI.getOpcode())
+             ? X86::getCondFromMI(MI)
+             : X86::COND_INVALID;
 }
 
 /// Return the inverse of the specified condition,
diff --git a/llvm/test/CodeGen/X86/apx/cfcmov.ll b/llvm/test/CodeGen/X86/apx/cfcmov.ll
index 97758203f85ce8..f643120c9b50ff 100644
--- a/llvm/test/CodeGen/X86/apx/cfcmov.ll
+++ b/llvm/test/CodeGen/X86/apx/cfcmov.ll
@@ -1,4 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+cf -verify-machineinstrs | FileCheck %s
 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+cf -x86-cmov-converter=false -verify-machineinstrs | FileCheck %s
 
 define i8 @cfcmov8rr(i8 %0) {
diff --git a/llvm/test/CodeGen/X86/apx/flags-copy-lowering.mir b/llvm/test/CodeGen/X86/apx/flags-copy-lowering.mir
index d6a9cda1dc8162..e81a4480ba44cb 100644
--- a/llvm/test/CodeGen/X86/apx/flags-copy-lowering.mir
+++ b/llvm/test/CodeGen/X86/apx/flags-copy-lowering.mir
@@ -29,6 +29,18 @@
     call void @foo()
     ret void
   }
+
+  define void @test_cmov(i64 %a, i64 %b) {
+  entry:
+    call void @foo()
+    ret void
+  }
+
+  define void @test_cfcmov(i64 %a, i64 %b) {
+  entry:
+    call void @foo()
+    ret void
+  }
 ...
 ---
 name:            test_adc
@@ -166,3 +178,93 @@ body:             |
     RET 0
 
 ...
+---
+name:            test_cmov
+# CHECK-LABEL: name: test_cmov
+liveins:
+  - { reg: '$rdi', virtual-reg: '%0' }
+  - { reg: '$rsi', virtual-reg: '%1' }
+body:             |
+  bb.0:
+    liveins: $rdi, $rsi
+
+    %0:gr64 = COPY $rdi
+    %1:gr64 = COPY $rsi
+    CMP64rr %0, %1, implicit-def $eflags
+    %2:gr64 = COPY $eflags
+  ; CHECK-NOT:  COPY{{( killed)?}} $eflags
+  ; CHECK:      %[[A_REG:[^:]*]]:gr8 = SETCCr 7, implicit $eflags
+  ; CHECK-NEXT: %[[B_REG:[^:]*]]:gr8 = SETCCr 2, implicit $eflags
+  ; CHECK-NEXT: %[[E_REG:[^:]*]]:gr8 = SETCCr 4, implicit $eflags
+  ; CHECK-NOT:  COPY{{( killed)?}} $eflags
+
+    ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+    CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, implicit-def $rsp, implicit-def $ssp, implicit-def $eax
+    ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+
+    $eflags = COPY %2
+    %3:gr64 = CMOV64rr_ND %0, %1, 7, implicit $eflags
+    %4:gr64 = CMOV64rr_ND %0, %1, 2, implicit $eflags
+    %5:gr64 = CMOV64rr_ND %0, %1, 4, implicit $eflags
+    %6:gr64 = CMOV64rr_ND %0, %1, 5, implicit killed $eflags
+  ; CHECK-NOT:     $eflags =
+  ; CHECK:         TEST8rr %[[A_REG]], %[[A_REG]], implicit-def $eflags
+  ; CHECK-NEXT:    %3:gr64 = CMOV64rr_ND %0, %1, 5, implicit killed $eflags
+  ; CHECK-NEXT:    TEST8rr %[[B_REG]], %[[B_REG]], implicit-def $eflags
+  ; CHECK-NEXT:    %4:gr64 = CMOV64rr_ND %0, %1, 5, implicit killed $eflags
+  ; CHECK-NEXT:    TEST8rr %[[E_REG]], %[[E_REG]], implicit-def $eflags
+  ; CHECK-NEXT:    %5:gr64 = CMOV64rr_ND %0, %1, 5, implicit killed $eflags
+  ; CHECK-NEXT:    TEST8rr %[[E_REG]], %[[E_REG]], implicit-def $eflags
+  ; CHECK-NEXT:    %6:gr64 = CMOV64rr_ND %0, %1, 4, implicit killed $eflags
+    MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %3
+    MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %4
+    MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %5
+    MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %6
+
+    RET 0
+...
+---
+name:            test_cfcmov
+# CHECK-LABEL: name: test_cfcmov
+liveins:
+  - { reg: '$rdi', virtual-reg: '%0' }
+  - { reg: '$rsi', virtual-reg: '%1' }
+body:             |
+  bb.0:
+    liveins: $rdi, $rsi
+
+    %0:gr64 = COPY $rdi
+    %1:gr64 = COPY $rsi
+    CMP64rr %0, %1, implicit-def $eflags
+    %2:gr64 = COPY $eflags
+  ; CHECK-NOT:  COPY{{( killed)?}} $eflags
+  ; CHECK:      %[[A_REG:[^:]*]]:gr8 = SETCCr 7, implicit $eflags
+  ; CHECK-NEXT: %[[B_REG:[^:]*]]:gr8 = SETCCr 2, implicit $eflags
+  ; CHECK-NEXT: %[[E_REG:[^:]*]]:gr8 = SETCCr 4, implicit $eflags
+  ; CHECK-NOT:  COPY{{( killed)?}} $eflags
+
+    ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+    CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, implicit-def $rsp, implicit-def $ssp, implicit-def $eax
+    ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
+
+    $eflags = COPY %2
+    %3:gr64 = CFCMOV64rr %1, 7, implicit $eflags
+    %4:gr64 = CFCMOV64rr %1, 2, implicit $eflags
+    %5:gr64 = CFCMOV64rr_ND %0, %1, 4, implicit $eflags
+    %6:gr64 = CFCMOV64rr_ND %0, %1, 5, implicit killed $eflags
+  ; CHECK-NOT:     $eflags =
+  ; CHECK:         TEST8rr %[[A_REG]], %[[A_REG]], implicit-def $eflags
+  ; CHECK-NEXT:    %3:gr64 = CFCMOV64rr %1, 5, implicit killed $eflags
+  ; CHECK-NEXT:    TEST8rr %[[B_REG]], %[[B_REG]], implicit-def $eflags
+  ; CHECK-NEXT:    %4:gr64 = CFCMOV64rr %1, 5, implicit killed $eflags
+  ; CHECK-NEXT:    TEST8rr %[[E_REG]], %[[E_REG]], implicit-def $eflags
+  ; CHECK-NEXT:    %5:gr64 = CFCMOV64rr_ND %0, %1, 5, implicit killed $eflags
+  ; CHECK-NEXT:    TEST8rr %[[E_REG]], %[[E_REG]], implicit-def $eflags
+  ; CHECK-NEXT:    %6:gr64 = CFCMOV64rr_ND %0, %1, 4, implicit killed $eflags
+    MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %3
+    MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %4
+    MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %5
+    MOV64mr $rsp, 1, $noreg, -16, $noreg, killed %6
+
+    RET 0
+...
diff --git a/llvm/utils/TableGen/X86ManualFoldTables.def b/llvm/utils/TableGen/X86ManualFoldTables.def
index 06ddb759ff3f43..678fa4fc4bcc38 100644
--- a/llvm/utils/TableGen/X86ManualFoldTables.def
+++ b/llvm/utils/TableGen/X86ManualFoldTables.def
@@ -227,7 +227,7 @@ NOFOLD(MMX_MOVQ64rr_REV)
 NOFOLD(INSERTPSrr)
 NOFOLD(VINSERTPSZrr)
 NOFOLD(VINSERTPSrr)
-// CFCMOV instructions have different semantics between rr and rm.
+// Memory faults are suppressed for CFCMOV with memory operand.
 NOFOLD(CFCMOV16rr)
 NOFOLD(CFCMOV32rr)
 NOFOLD(CFCMOV64rr)
diff --git a/llvm/utils/TableGen/X86RecognizableInstr.cpp b/llvm/utils/TableGen/X86RecognizableInstr.cpp
index 73454003fd8baa..a2bc037b690c6f 100644
--- a/llvm/utils/TableGen/X86RecognizableInstr.cpp
+++ b/llvm/utils/TableGen/X86RecognizableInstr.cpp
@@ -888,8 +888,8 @@ void RecognizableInstr::emitDecodePath(DisassemblerTables &tables) const {
   case X86Local::PrefixByte:
     filter = std::make_unique<DumbFilter>();
     break;
-  case X86Local::MRMDestRegCC:
   case X86Local::MRMDestReg:
+  case X86Local::MRMDestRegCC:
   case X86Local::MRMSrcReg:
   case X86Local::MRMSrcReg4VOp3:
   case X86Local::MRMSrcRegOp4:
@@ -898,8 +898,8 @@ void RecognizableInstr::emitDecodePath(DisassemblerTables &tables) const {
   case X86Local::MRMXr:
     filter = std::make_unique<ModFilter>(true);
     break;
-  case X86Local::MRMDestMemCC:
   case X86Local::MRMDestMem:
+  case X86Local::MRMDestMemCC:
   case X86Local::MRMDestMem4VOp3CC:
   case X86Local::MRMDestMemFSIB:
   case X86Local::MRMSrcMem:

>From d1ca593cdce3717c2557113a830c03dc2035d169 Mon Sep 17 00:00:00 2001
From: "Wang, Xin10" <xin10.wang at intel.com>
Date: Wed, 28 Feb 2024 19:43:44 -0800
Subject: [PATCH 06/10] add getCondFromCFCMov

---
 llvm/lib/Target/X86/X86FlagsCopyLowering.cpp |  7 +++++--
 llvm/lib/Target/X86/X86InstrInfo.cpp         | 10 +++++++---
 llvm/lib/Target/X86/X86InstrInfo.h           |  3 +++
 3 files changed, 15 insertions(+), 5 deletions(-)

diff --git a/llvm/lib/Target/X86/X86FlagsCopyLowering.cpp b/llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
index af25b34fbab995..d96613d7bb7efc 100644
--- a/llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
+++ b/llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
@@ -604,7 +604,8 @@ bool X86FlagsCopyLoweringPass::runOnMachineFunction(MachineFunction &MF) {
         }
 
         // Otherwise we can just rewrite in-place.
-        if (X86::getCondFromCMov(MI) != X86::COND_INVALID) {
+        if (X86::getCondFromCMov(MI) != X86::COND_INVALID ||
+            X86::getCondFromCFCMov(MI) != X86::COND_INVALID) {
           rewriteCMov(*TestMBB, TestPos, TestLoc, MI, *FlagUse, CondRegs);
         } else if (getCondFromFCMOV(MI.getOpcode()) != X86::COND_INVALID) {
           rewriteFCMov(*TestMBB, TestPos, TestLoc, MI, *FlagUse, CondRegs);
@@ -829,7 +830,9 @@ void X86FlagsCopyLoweringPass::rewriteCMov(MachineBasicBlock &TestMBB,
                                            MachineOperand &FlagUse,
                                            CondRegArray &CondRegs) {
   // First get the register containing this specific condition.
-  X86::CondCode Cond = X86::getCondFromCMov(CMovI);
+  X86::CondCode Cond = X86::getCondFromCMov(CMovI) == X86::COND_INVALID
+                           ? X86::getCondFromCFCMov(CMovI)
+                           : X86::getCondFromCMov(CMovI);
   unsigned CondReg;
   bool Inverted;
   std::tie(CondReg, Inverted) =
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index 9d739adbcd5bb9..460b44675a145a 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -3148,9 +3148,13 @@ X86::CondCode X86::getCondFromSETCC(const MachineInstr &MI) {
 }
 
 X86::CondCode X86::getCondFromCMov(const MachineInstr &MI) {
-  return X86::isCMOVCC(MI.getOpcode()) || X86::isCFCMOVCC(MI.getOpcode())
-             ? X86::getCondFromMI(MI)
-             : X86::COND_INVALID;
+  return X86::isCMOVCC(MI.getOpcode()) ? X86::getCondFromMI(MI)
+                                       : X86::COND_INVALID;
+}
+
+X86::CondCode X86::getCondFromCFCMov(const MachineInstr &MI) {
+  return X86::isCFCMOVCC(MI.getOpcode()) ? X86::getCondFromMI(MI)
+                                         : X86::COND_INVALID;
 }
 
 /// Return the inverse of the specified condition,
diff --git a/llvm/lib/Target/X86/X86InstrInfo.h b/llvm/lib/Target/X86/X86InstrInfo.h
index 30f40264064d5b..e719be0caf3ee1 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.h
+++ b/llvm/lib/Target/X86/X86InstrInfo.h
@@ -62,6 +62,9 @@ CondCode getCondFromSETCC(const MachineInstr &MI);
 // Turn CMOV instruction into condition code.
 CondCode getCondFromCMov(const MachineInstr &MI);
 
+// Turn CFCMOV instruction into condition code.
+CondCode getCondFromCFCMov(const MachineInstr &MI);
+
 /// GetOppositeBranchCondition - Return the inverse of the specified cond,
 /// e.g. turning COND_E to COND_NE.
 CondCode GetOppositeBranchCondition(CondCode CC);

>From dcdf591fedc7fe3bdcf06ff53e54ca71806df6a7 Mon Sep 17 00:00:00 2001
From: "Wang, Xin10" <xin10.wang at intel.com>
Date: Wed, 6 Mar 2024 01:11:15 -0800
Subject: [PATCH 07/10] resolve some comments

---
 llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp         | 3 +--
 llvm/test/MC/Disassembler/X86/apx/reverse-encoding.txt | 6 +++---
 2 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
index c27881889a02ad..6401df9f49f033 100644
--- a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -4068,8 +4068,7 @@ unsigned X86AsmParser::checkTargetMatchPredicate(MCInst &Inst) {
 
   if (UseApxExtendedReg && !X86II::canUseApxExtendedReg(MCID))
     return Match_Unsupported;
-  if (ForcedNoFlag != !!(MCID.TSFlags & X86II::EVEX_NF) &&
-      !X86::isCFCMOVCC(Opc))
+  if (ForcedNoFlag == !(MCID.TSFlags & X86II::EVEX_NF) && !X86::isCFCMOVCC(Opc))
     return Match_Unsupported;
 
   if (ForcedVEXEncoding == VEXEncoding_EVEX &&
diff --git a/llvm/test/MC/Disassembler/X86/apx/reverse-encoding.txt b/llvm/test/MC/Disassembler/X86/apx/reverse-encoding.txt
index a3494ea04464c8..5bd355ba3f6198 100644
--- a/llvm/test/MC/Disassembler/X86/apx/reverse-encoding.txt
+++ b/llvm/test/MC/Disassembler/X86/apx/reverse-encoding.txt
@@ -433,6 +433,6 @@
 
 ## cfcmov
 
-# ATT:   cfcmovbeq	%r15, %r9
-# INTEL: cfcmovbe	r9, r15
-0x62,0x54,0xfc,0x0c,0x46,0xf9
+# ATT:   cfcmovbeq	%r16, %r17
+# INTEL: cfcmovbe	r17, r16
+0x62,0xec,0xfc,0x0c,0x46,0xc1

>From dd2c775e4f0a818dbb48e33b236165e5755ca9e4 Mon Sep 17 00:00:00 2001
From: "Wang, Xin10" <xin10.wang at intel.com>
Date: Mon, 11 Mar 2024 07:21:07 -0700
Subject: [PATCH 08/10] resolve comments

---
 llvm/lib/Target/X86/X86InstrCMovSetCC.td      | 23 +++++++++----------
 .../Disassembler/X86/apx/reverse-encoding.txt |  8 +++++++
 2 files changed, 19 insertions(+), 12 deletions(-)

diff --git a/llvm/lib/Target/X86/X86InstrCMovSetCC.td b/llvm/lib/Target/X86/X86InstrCMovSetCC.td
index 125c1d53c2845e..2f2efb2df59583 100644
--- a/llvm/lib/Target/X86/X86InstrCMovSetCC.td
+++ b/llvm/lib/Target/X86/X86InstrCMovSetCC.td
@@ -45,22 +45,21 @@ let Predicates = [HasCMOV, HasCF, HasNDD, In64BitMode] in
                   (ins t.RegClass:$src1, t.RegClass:$src2, ccode:$cond),
                   "cfcmov${cond}", binop_ndd_args, []>, UseEFLAGS, NDD<1>, NF;
 }
-let SchedRW = [WriteCMOV.Folded, WriteCMOV.ReadAfterFold] in {
-let Predicates = [HasCMOV, HasCF, In64BitMode] in {
-  let mayLoad = 1 in
+let SchedRW = [WriteCMOV, ReadDefault, ReadDefault, ReadDefault, ReadDefault, ReadDefault] in {
+  let Predicates = [HasCMOV, HasCF, In64BitMode], mayLoad = 1 in
     def rm : ITy<0x40, MRMSrcMemCC, t, (outs t.RegClass:$dst),
                  (ins t.MemOperand:$src1, ccode:$cond),
                  "cfcmov${cond}", unaryop_ndd_args, []>, UseEFLAGS, EVEX, T_MAP4;
-  let mayStore = 1 in
-    def mr : ITy<0x40, MRMDestMemCC, t, (outs t.MemOperand:$dst),
-                 (ins t.RegClass:$src1, ccode:$cond),
-                 "cfcmov${cond}", unaryop_ndd_args, []>, UseEFLAGS, NF;
-}
-let Predicates = [HasCMOV, HasCF, HasNDD, In64BitMode], mayLoad = 1 in
-  def rm_ND : ITy<0x40, MRMSrcMemCC, t, (outs t.RegClass:$dst),
-                  (ins t.RegClass:$src1, t.MemOperand:$src2, ccode:$cond),
-                  "cfcmov${cond}", binop_ndd_args, []>, UseEFLAGS, NDD<1>, NF;
+  let Predicates = [HasCMOV, HasCF, HasNDD, In64BitMode], mayLoad = 1 in
+    def rm_ND : ITy<0x40, MRMSrcMemCC, t, (outs t.RegClass:$dst),
+                    (ins t.RegClass:$src1, t.MemOperand:$src2, ccode:$cond),
+                    "cfcmov${cond}", binop_ndd_args, []>, UseEFLAGS, NDD<1>, NF;
 }
+let SchedRW = [ReadDefault, ReadDefault, ReadDefault, ReadDefault, ReadDefault, WriteCMOV],
+    Predicates = [HasCMOV, HasCF, In64BitMode], mayStore = 1 in
+  def mr : ITy<0x40, MRMDestMemCC, t, (outs t.MemOperand:$dst),
+                (ins t.RegClass:$src1, ccode:$cond),
+                "cfcmov${cond}", unaryop_ndd_args, []>, UseEFLAGS, NF;
 }
 
 let isCodeGenOnly = 1, ForceDisassemble = 1 in {
diff --git a/llvm/test/MC/Disassembler/X86/apx/reverse-encoding.txt b/llvm/test/MC/Disassembler/X86/apx/reverse-encoding.txt
index 5bd355ba3f6198..af78b76c09de36 100644
--- a/llvm/test/MC/Disassembler/X86/apx/reverse-encoding.txt
+++ b/llvm/test/MC/Disassembler/X86/apx/reverse-encoding.txt
@@ -433,6 +433,14 @@
 
 ## cfcmov
 
+# ATT:   cfcmovbew	%r16w, %r17w
+# INTEL: cfcmovbe	r17w, r16w
+0x62,0xec,0x7d,0x0c,0x46,0xc1
+
+# ATT:   cfcmovbel	%r16d, %r17d
+# INTEL: cfcmovbe	r17d, r16d
+0x62,0xec,0x7c,0x0c,0x46,0xc1
+
 # ATT:   cfcmovbeq	%r16, %r17
 # INTEL: cfcmovbe	r17, r16
 0x62,0xec,0xfc,0x0c,0x46,0xc1

>From a25ede127e06ca8a19c07b09abc287f3cb71cbd1 Mon Sep 17 00:00:00 2001
From: "Wang, Xin10" <xin10.wang at intel.com>
Date: Tue, 12 Mar 2024 20:18:47 -0700
Subject: [PATCH 09/10] update _REV and tests

---
 llvm/lib/Target/X86/X86InstrCMovSetCC.td      |   11 +-
 llvm/test/MC/Disassembler/X86/apx/cfcmov.txt  | 1384 +++++++--------
 .../Disassembler/X86/apx/reverse-encoding.txt |    6 +-
 llvm/test/MC/X86/apx/cfcmov-att.s             | 1566 +++++++++--------
 llvm/test/MC/X86/apx/cfcmov-intel.s           | 1563 ++++++++--------
 llvm/test/MC/X86/apx/evex-format-att.s        |   10 -
 llvm/test/MC/X86/apx/evex-format-intel.s      |   10 -
 llvm/test/TableGen/x86-fold-tables.inc        |    3 +
 8 files changed, 2326 insertions(+), 2227 deletions(-)

diff --git a/llvm/lib/Target/X86/X86InstrCMovSetCC.td b/llvm/lib/Target/X86/X86InstrCMovSetCC.td
index 2f2efb2df59583..e77926d29b260b 100644
--- a/llvm/lib/Target/X86/X86InstrCMovSetCC.td
+++ b/llvm/lib/Target/X86/X86InstrCMovSetCC.td
@@ -31,14 +31,15 @@ let SchedRW = [WriteCMOV.Folded, WriteCMOV.ReadAfterFold] in
 multiclass Cfcmov<X86TypeInfo t> {
 let isCommutable = 1, SchedRW = [WriteCMOV] in {
 let Predicates = [HasCMOV, HasCF, In64BitMode] in {
-  def rr : ITy<0x40, MRMSrcRegCC, t, (outs t.RegClass:$dst),
+  def rr : ITy<0x40, MRMDestRegCC, t, (outs t.RegClass:$dst),
                (ins t.RegClass:$src1, ccode:$cond),
                "cfcmov${cond}", unaryop_ndd_args,
-               [(set t.RegClass:$dst, (X86cmov 0,
-                                 t.RegClass:$src1, timm:$cond, EFLAGS))]>, UseEFLAGS, EVEX, T_MAP4;
-  def rr_REV : ITy<0x40, MRMDestRegCC, t, (outs t.RegClass:$dst),
+               [(set t.RegClass:$dst,
+                 (X86cmov 0, t.RegClass:$src1, timm:$cond, EFLAGS))]>, UseEFLAGS, NF;
+  def rr_REV : ITy<0x40, MRMSrcRegCC, t, (outs t.RegClass:$dst),
                    (ins t.RegClass:$src1, ccode:$cond),
-                   "cfcmov${cond}", unaryop_ndd_args, []>, UseEFLAGS, NF;
+                   "cfcmov${cond}", unaryop_ndd_args,
+                   []>, UseEFLAGS, EVEX, T_MAP4;
 }
 let Predicates = [HasCMOV, HasCF, HasNDD, In64BitMode] in
   def rr_ND : ITy<0x40, MRMSrcRegCC, t, (outs t.RegClass:$dst),
diff --git a/llvm/test/MC/Disassembler/X86/apx/cfcmov.txt b/llvm/test/MC/Disassembler/X86/apx/cfcmov.txt
index 378d890e08fcc4..4ecaa4b6a14a91 100644
--- a/llvm/test/MC/Disassembler/X86/apx/cfcmov.txt
+++ b/llvm/test/MC/Disassembler/X86/apx/cfcmov.txt
@@ -1,962 +1,842 @@
-# RUN: llvm-mc -triple x86_64 -disassemble %s | FileCheck %s --check-prefix=ATT
-# RUN: llvm-mc -triple x86_64 -disassemble -output-asm-variant=1 %s | FileCheck %s --check-prefix=INTEL
+# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
+# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
 
-# ATT:   cfcmovbw	%dx, %ax, %r9w
-# INTEL: cfcmovb	r9w, ax, dx
-0x62,0xf4,0x35,0x1c,0x42,0xc2
+# ATT:   cfcmovbw	%r17w, %r21w, %r25w
+# INTEL: cfcmovb	r25w, r21w, r17w
+0x62,0xec,0x35,0x14,0x42,0xe9
 
-# ATT:   cfcmovbl	%ecx, %edx, %r10d
-# INTEL: cfcmovb	r10d, edx, ecx
-0x62,0xf4,0x2c,0x1c,0x42,0xd1
+# ATT:   cfcmovbw	%r17w, %r21w
+# INTEL: cfcmovb	r21w, r17w
+0x62,0xec,0x7d,0x0c,0x42,0xcd
 
-# ATT:   cfcmovbq	%r9, %r15, %r11
-# INTEL: cfcmovb	r11, r15, r9
-0x62,0x54,0xa4,0x1c,0x42,0xf9
+# ATT:   cfcmovbw	%r17w, 291(%r28,%r29,4)
+# INTEL: cfcmovb	word ptr [r28 + 4*r29 + 291], r17w
+0x62,0x8c,0x79,0x0c,0x42,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovbw	123(%r8,%rax,4), %dx, %ax
-# INTEL: cfcmovb	ax, dx, word ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7d,0x1c,0x42,0x54,0x80,0x7b
+# ATT:   cfcmovbl	%r18d, %r22d, %r26d
+# INTEL: cfcmovb	r26d, r22d, r18d
+0x62,0xec,0x2c,0x14,0x42,0xf2
 
-# ATT:   cfcmovbl	123(%r8,%rax,4), %ecx, %edx
-# INTEL: cfcmovb	edx, ecx, dword ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x6c,0x1c,0x42,0x4c,0x80,0x7b
+# ATT:   cfcmovbl	%r18d, %r22d
+# INTEL: cfcmovb	r22d, r18d
+0x62,0xec,0x7c,0x0c,0x42,0xd6
 
-# ATT:   cfcmovbq	123(%r8,%rax,4), %r9, %r15
-# INTEL: cfcmovb	r15, r9, qword ptr [r8 + 4*rax + 123]
-0x62,0x54,0x84,0x1c,0x42,0x4c,0x80,0x7b
+# ATT:   cfcmovbl	%r18d, 291(%r28,%r29,4)
+# INTEL: cfcmovb	dword ptr [r28 + 4*r29 + 291], r18d
+0x62,0x8c,0x78,0x0c,0x42,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovbw	%dx, 123(%r8,%rax,4)
-# INTEL: cfcmovb	word ptr [r8 + 4*rax + 123], dx
-0x62,0xd4,0x7d,0x0c,0x42,0x54,0x80,0x7b
+# ATT:   cfcmovbq	%r19, %r23, %r27
+# INTEL: cfcmovb	r27, r23, r19
+0x62,0xec,0xa4,0x14,0x42,0xfb
 
-# ATT:   cfcmovbl	%ecx, 123(%r8,%rax,4)
-# INTEL: cfcmovb	dword ptr [r8 + 4*rax + 123], ecx
-0x62,0xd4,0x7c,0x0c,0x42,0x4c,0x80,0x7b
+# ATT:   cfcmovbq	%r19, %r23
+# INTEL: cfcmovb	r23, r19
+0x62,0xec,0xfc,0x0c,0x42,0xdf
 
-# ATT:   cfcmovbq	%r9, 123(%r8,%rax,4)
-# INTEL: cfcmovb	qword ptr [r8 + 4*rax + 123], r9
-0x62,0x54,0xfc,0x0c,0x42,0x4c,0x80,0x7b
+# ATT:   cfcmovbq	%r19, 291(%r28,%r29,4)
+# INTEL: cfcmovb	qword ptr [r28 + 4*r29 + 291], r19
+0x62,0x8c,0xf8,0x0c,0x42,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovbw	123(%r8,%rax,4), %dx
-# INTEL: cfcmovb	dx, word ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7d,0x08,0x42,0x54,0x80,0x7b
+# ATT:   cfcmovbw	291(%r28,%r29,4), %r17w, %r21w
+# INTEL: cfcmovb	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x51,0x14,0x42,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovbl	123(%r8,%rax,4), %ecx
-# INTEL: cfcmovb	ecx, dword ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7c,0x08,0x42,0x4c,0x80,0x7b
+# ATT:   cfcmovbw	291(%r28,%r29,4), %r17w
+# INTEL: cfcmovb	r17w, word ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x79,0x08,0x42,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovbq	123(%r8,%rax,4), %r9
-# INTEL: cfcmovb	r9, qword ptr [r8 + 4*rax + 123]
-0x62,0x54,0xfc,0x08,0x42,0x4c,0x80,0x7b
+# ATT:   cfcmovbl	291(%r28,%r29,4), %r18d, %r22d
+# INTEL: cfcmovb	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x48,0x14,0x42,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovbw	%dx, %ax
-# INTEL: cfcmovb	ax, dx
-0x62,0xf4,0x7d,0x08,0x42,0xc2
+# ATT:   cfcmovbl	291(%r28,%r29,4), %r18d
+# INTEL: cfcmovb	r18d, dword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x78,0x08,0x42,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovbl	%ecx, %edx
-# INTEL: cfcmovb	edx, ecx
-0x62,0xf4,0x7c,0x08,0x42,0xd1
+# ATT:   cfcmovbq	291(%r28,%r29,4), %r19, %r23
+# INTEL: cfcmovb	r23, r19, qword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0xc0,0x14,0x42,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovbq	%r9, %r15
-# INTEL: cfcmovb	r15, r9
-0x62,0x54,0xfc,0x08,0x42,0xf9
+# ATT:   cfcmovbq	291(%r28,%r29,4), %r19
+# INTEL: cfcmovb	r19, qword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0xf8,0x08,0x42,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovbew	%dx, %ax, %r9w
-# INTEL: cfcmovbe	r9w, ax, dx
-0x62,0xf4,0x35,0x1c,0x46,0xc2
+# ATT:   cfcmovbew	%r17w, %r21w, %r25w
+# INTEL: cfcmovbe	r25w, r21w, r17w
+0x62,0xec,0x35,0x14,0x46,0xe9
 
-# ATT:   cfcmovbel	%ecx, %edx, %r10d
-# INTEL: cfcmovbe	r10d, edx, ecx
-0x62,0xf4,0x2c,0x1c,0x46,0xd1
+# ATT:   cfcmovbew	%r17w, %r21w
+# INTEL: cfcmovbe	r21w, r17w
+0x62,0xec,0x7d,0x0c,0x46,0xcd
 
-# ATT:   cfcmovbeq	%r9, %r15, %r11
-# INTEL: cfcmovbe	r11, r15, r9
-0x62,0x54,0xa4,0x1c,0x46,0xf9
+# ATT:   cfcmovbew	%r17w, 291(%r28,%r29,4)
+# INTEL: cfcmovbe	word ptr [r28 + 4*r29 + 291], r17w
+0x62,0x8c,0x79,0x0c,0x46,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovbew	123(%r8,%rax,4), %dx, %ax
-# INTEL: cfcmovbe	ax, dx, word ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7d,0x1c,0x46,0x54,0x80,0x7b
+# ATT:   cfcmovbel	%r18d, %r22d, %r26d
+# INTEL: cfcmovbe	r26d, r22d, r18d
+0x62,0xec,0x2c,0x14,0x46,0xf2
 
-# ATT:   cfcmovbel	123(%r8,%rax,4), %ecx, %edx
-# INTEL: cfcmovbe	edx, ecx, dword ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x6c,0x1c,0x46,0x4c,0x80,0x7b
+# ATT:   cfcmovbel	%r18d, %r22d
+# INTEL: cfcmovbe	r22d, r18d
+0x62,0xec,0x7c,0x0c,0x46,0xd6
 
-# ATT:   cfcmovbeq	123(%r8,%rax,4), %r9, %r15
-# INTEL: cfcmovbe	r15, r9, qword ptr [r8 + 4*rax + 123]
-0x62,0x54,0x84,0x1c,0x46,0x4c,0x80,0x7b
+# ATT:   cfcmovbel	%r18d, 291(%r28,%r29,4)
+# INTEL: cfcmovbe	dword ptr [r28 + 4*r29 + 291], r18d
+0x62,0x8c,0x78,0x0c,0x46,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovbew	%dx, 123(%r8,%rax,4)
-# INTEL: cfcmovbe	word ptr [r8 + 4*rax + 123], dx
-0x62,0xd4,0x7d,0x0c,0x46,0x54,0x80,0x7b
+# ATT:   cfcmovbeq	%r19, %r23, %r27
+# INTEL: cfcmovbe	r27, r23, r19
+0x62,0xec,0xa4,0x14,0x46,0xfb
 
-# ATT:   cfcmovbel	%ecx, 123(%r8,%rax,4)
-# INTEL: cfcmovbe	dword ptr [r8 + 4*rax + 123], ecx
-0x62,0xd4,0x7c,0x0c,0x46,0x4c,0x80,0x7b
+# ATT:   cfcmovbeq	%r19, %r23
+# INTEL: cfcmovbe	r23, r19
+0x62,0xec,0xfc,0x0c,0x46,0xdf
 
-# ATT:   cfcmovbeq	%r9, 123(%r8,%rax,4)
-# INTEL: cfcmovbe	qword ptr [r8 + 4*rax + 123], r9
-0x62,0x54,0xfc,0x0c,0x46,0x4c,0x80,0x7b
+# ATT:   cfcmovbeq	%r19, 291(%r28,%r29,4)
+# INTEL: cfcmovbe	qword ptr [r28 + 4*r29 + 291], r19
+0x62,0x8c,0xf8,0x0c,0x46,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovbew	123(%r8,%rax,4), %dx
-# INTEL: cfcmovbe	dx, word ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7d,0x08,0x46,0x54,0x80,0x7b
+# ATT:   cfcmovbew	291(%r28,%r29,4), %r17w, %r21w
+# INTEL: cfcmovbe	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x51,0x14,0x46,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovbel	123(%r8,%rax,4), %ecx
-# INTEL: cfcmovbe	ecx, dword ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7c,0x08,0x46,0x4c,0x80,0x7b
+# ATT:   cfcmovbew	291(%r28,%r29,4), %r17w
+# INTEL: cfcmovbe	r17w, word ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x79,0x08,0x46,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovbeq	123(%r8,%rax,4), %r9
-# INTEL: cfcmovbe	r9, qword ptr [r8 + 4*rax + 123]
-0x62,0x54,0xfc,0x08,0x46,0x4c,0x80,0x7b
+# ATT:   cfcmovbel	291(%r28,%r29,4), %r18d, %r22d
+# INTEL: cfcmovbe	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x48,0x14,0x46,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovbew	%dx, %ax
-# INTEL: cfcmovbe	ax, dx
-0x62,0xf4,0x7d,0x08,0x46,0xc2
+# ATT:   cfcmovbel	291(%r28,%r29,4), %r18d
+# INTEL: cfcmovbe	r18d, dword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x78,0x08,0x46,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovbel	%ecx, %edx
-# INTEL: cfcmovbe	edx, ecx
-0x62,0xf4,0x7c,0x08,0x46,0xd1
+# ATT:   cfcmovbeq	291(%r28,%r29,4), %r19, %r23
+# INTEL: cfcmovbe	r23, r19, qword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0xc0,0x14,0x46,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovbeq	%r9, %r15
-# INTEL: cfcmovbe	r15, r9
-0x62,0x54,0xfc,0x08,0x46,0xf9
+# ATT:   cfcmovbeq	291(%r28,%r29,4), %r19
+# INTEL: cfcmovbe	r19, qword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0xf8,0x08,0x46,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovlw	%dx, %ax, %r9w
-# INTEL: cfcmovl	r9w, ax, dx
-0x62,0xf4,0x35,0x1c,0x4c,0xc2
+# ATT:   cfcmovlw	%r17w, %r21w, %r25w
+# INTEL: cfcmovl	r25w, r21w, r17w
+0x62,0xec,0x35,0x14,0x4c,0xe9
 
-# ATT:   cfcmovll	%ecx, %edx, %r10d
-# INTEL: cfcmovl	r10d, edx, ecx
-0x62,0xf4,0x2c,0x1c,0x4c,0xd1
+# ATT:   cfcmovlw	%r17w, %r21w
+# INTEL: cfcmovl	r21w, r17w
+0x62,0xec,0x7d,0x0c,0x4c,0xcd
 
-# ATT:   cfcmovlq	%r9, %r15, %r11
-# INTEL: cfcmovl	r11, r15, r9
-0x62,0x54,0xa4,0x1c,0x4c,0xf9
+# ATT:   cfcmovlw	%r17w, 291(%r28,%r29,4)
+# INTEL: cfcmovl	word ptr [r28 + 4*r29 + 291], r17w
+0x62,0x8c,0x79,0x0c,0x4c,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovlw	123(%r8,%rax,4), %dx, %ax
-# INTEL: cfcmovl	ax, dx, word ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7d,0x1c,0x4c,0x54,0x80,0x7b
+# ATT:   cfcmovll	%r18d, %r22d, %r26d
+# INTEL: cfcmovl	r26d, r22d, r18d
+0x62,0xec,0x2c,0x14,0x4c,0xf2
 
-# ATT:   cfcmovll	123(%r8,%rax,4), %ecx, %edx
-# INTEL: cfcmovl	edx, ecx, dword ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x6c,0x1c,0x4c,0x4c,0x80,0x7b
+# ATT:   cfcmovll	%r18d, %r22d
+# INTEL: cfcmovl	r22d, r18d
+0x62,0xec,0x7c,0x0c,0x4c,0xd6
 
-# ATT:   cfcmovlq	123(%r8,%rax,4), %r9, %r15
-# INTEL: cfcmovl	r15, r9, qword ptr [r8 + 4*rax + 123]
-0x62,0x54,0x84,0x1c,0x4c,0x4c,0x80,0x7b
+# ATT:   cfcmovll	%r18d, 291(%r28,%r29,4)
+# INTEL: cfcmovl	dword ptr [r28 + 4*r29 + 291], r18d
+0x62,0x8c,0x78,0x0c,0x4c,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovlw	%dx, 123(%r8,%rax,4)
-# INTEL: cfcmovl	word ptr [r8 + 4*rax + 123], dx
-0x62,0xd4,0x7d,0x0c,0x4c,0x54,0x80,0x7b
+# ATT:   cfcmovlq	%r19, %r23, %r27
+# INTEL: cfcmovl	r27, r23, r19
+0x62,0xec,0xa4,0x14,0x4c,0xfb
 
-# ATT:   cfcmovll	%ecx, 123(%r8,%rax,4)
-# INTEL: cfcmovl	dword ptr [r8 + 4*rax + 123], ecx
-0x62,0xd4,0x7c,0x0c,0x4c,0x4c,0x80,0x7b
+# ATT:   cfcmovlq	%r19, %r23
+# INTEL: cfcmovl	r23, r19
+0x62,0xec,0xfc,0x0c,0x4c,0xdf
 
-# ATT:   cfcmovlq	%r9, 123(%r8,%rax,4)
-# INTEL: cfcmovl	qword ptr [r8 + 4*rax + 123], r9
-0x62,0x54,0xfc,0x0c,0x4c,0x4c,0x80,0x7b
+# ATT:   cfcmovlq	%r19, 291(%r28,%r29,4)
+# INTEL: cfcmovl	qword ptr [r28 + 4*r29 + 291], r19
+0x62,0x8c,0xf8,0x0c,0x4c,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovlw	123(%r8,%rax,4), %dx
-# INTEL: cfcmovl	dx, word ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7d,0x08,0x4c,0x54,0x80,0x7b
+# ATT:   cfcmovlw	291(%r28,%r29,4), %r17w, %r21w
+# INTEL: cfcmovl	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x51,0x14,0x4c,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovll	123(%r8,%rax,4), %ecx
-# INTEL: cfcmovl	ecx, dword ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7c,0x08,0x4c,0x4c,0x80,0x7b
+# ATT:   cfcmovlw	291(%r28,%r29,4), %r17w
+# INTEL: cfcmovl	r17w, word ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x79,0x08,0x4c,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovlq	123(%r8,%rax,4), %r9
-# INTEL: cfcmovl	r9, qword ptr [r8 + 4*rax + 123]
-0x62,0x54,0xfc,0x08,0x4c,0x4c,0x80,0x7b
+# ATT:   cfcmovll	291(%r28,%r29,4), %r18d, %r22d
+# INTEL: cfcmovl	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x48,0x14,0x4c,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovlw	%dx, %ax
-# INTEL: cfcmovl	ax, dx
-0x62,0xf4,0x7d,0x08,0x4c,0xc2
+# ATT:   cfcmovll	291(%r28,%r29,4), %r18d
+# INTEL: cfcmovl	r18d, dword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x78,0x08,0x4c,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovll	%ecx, %edx
-# INTEL: cfcmovl	edx, ecx
-0x62,0xf4,0x7c,0x08,0x4c,0xd1
+# ATT:   cfcmovlq	291(%r28,%r29,4), %r19, %r23
+# INTEL: cfcmovl	r23, r19, qword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0xc0,0x14,0x4c,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovlq	%r9, %r15
-# INTEL: cfcmovl	r15, r9
-0x62,0x54,0xfc,0x08,0x4c,0xf9
+# ATT:   cfcmovlq	291(%r28,%r29,4), %r19
+# INTEL: cfcmovl	r19, qword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0xf8,0x08,0x4c,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovlew	%dx, %ax, %r9w
-# INTEL: cfcmovle	r9w, ax, dx
-0x62,0xf4,0x35,0x1c,0x4e,0xc2
+# ATT:   cfcmovlew	%r17w, %r21w, %r25w
+# INTEL: cfcmovle	r25w, r21w, r17w
+0x62,0xec,0x35,0x14,0x4e,0xe9
 
-# ATT:   cfcmovlel	%ecx, %edx, %r10d
-# INTEL: cfcmovle	r10d, edx, ecx
-0x62,0xf4,0x2c,0x1c,0x4e,0xd1
+# ATT:   cfcmovlew	%r17w, %r21w
+# INTEL: cfcmovle	r21w, r17w
+0x62,0xec,0x7d,0x0c,0x4e,0xcd
 
-# ATT:   cfcmovleq	%r9, %r15, %r11
-# INTEL: cfcmovle	r11, r15, r9
-0x62,0x54,0xa4,0x1c,0x4e,0xf9
+# ATT:   cfcmovlew	%r17w, 291(%r28,%r29,4)
+# INTEL: cfcmovle	word ptr [r28 + 4*r29 + 291], r17w
+0x62,0x8c,0x79,0x0c,0x4e,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovlew	123(%r8,%rax,4), %dx, %ax
-# INTEL: cfcmovle	ax, dx, word ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7d,0x1c,0x4e,0x54,0x80,0x7b
+# ATT:   cfcmovlel	%r18d, %r22d, %r26d
+# INTEL: cfcmovle	r26d, r22d, r18d
+0x62,0xec,0x2c,0x14,0x4e,0xf2
 
-# ATT:   cfcmovlel	123(%r8,%rax,4), %ecx, %edx
-# INTEL: cfcmovle	edx, ecx, dword ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x6c,0x1c,0x4e,0x4c,0x80,0x7b
+# ATT:   cfcmovlel	%r18d, %r22d
+# INTEL: cfcmovle	r22d, r18d
+0x62,0xec,0x7c,0x0c,0x4e,0xd6
 
-# ATT:   cfcmovleq	123(%r8,%rax,4), %r9, %r15
-# INTEL: cfcmovle	r15, r9, qword ptr [r8 + 4*rax + 123]
-0x62,0x54,0x84,0x1c,0x4e,0x4c,0x80,0x7b
+# ATT:   cfcmovlel	%r18d, 291(%r28,%r29,4)
+# INTEL: cfcmovle	dword ptr [r28 + 4*r29 + 291], r18d
+0x62,0x8c,0x78,0x0c,0x4e,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovlew	%dx, 123(%r8,%rax,4)
-# INTEL: cfcmovle	word ptr [r8 + 4*rax + 123], dx
-0x62,0xd4,0x7d,0x0c,0x4e,0x54,0x80,0x7b
+# ATT:   cfcmovleq	%r19, %r23, %r27
+# INTEL: cfcmovle	r27, r23, r19
+0x62,0xec,0xa4,0x14,0x4e,0xfb
 
-# ATT:   cfcmovlel	%ecx, 123(%r8,%rax,4)
-# INTEL: cfcmovle	dword ptr [r8 + 4*rax + 123], ecx
-0x62,0xd4,0x7c,0x0c,0x4e,0x4c,0x80,0x7b
+# ATT:   cfcmovleq	%r19, %r23
+# INTEL: cfcmovle	r23, r19
+0x62,0xec,0xfc,0x0c,0x4e,0xdf
 
-# ATT:   cfcmovleq	%r9, 123(%r8,%rax,4)
-# INTEL: cfcmovle	qword ptr [r8 + 4*rax + 123], r9
-0x62,0x54,0xfc,0x0c,0x4e,0x4c,0x80,0x7b
+# ATT:   cfcmovleq	%r19, 291(%r28,%r29,4)
+# INTEL: cfcmovle	qword ptr [r28 + 4*r29 + 291], r19
+0x62,0x8c,0xf8,0x0c,0x4e,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovlew	123(%r8,%rax,4), %dx
-# INTEL: cfcmovle	dx, word ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7d,0x08,0x4e,0x54,0x80,0x7b
+# ATT:   cfcmovlew	291(%r28,%r29,4), %r17w, %r21w
+# INTEL: cfcmovle	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x51,0x14,0x4e,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovlel	123(%r8,%rax,4), %ecx
-# INTEL: cfcmovle	ecx, dword ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7c,0x08,0x4e,0x4c,0x80,0x7b
+# ATT:   cfcmovlew	291(%r28,%r29,4), %r17w
+# INTEL: cfcmovle	r17w, word ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x79,0x08,0x4e,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovleq	123(%r8,%rax,4), %r9
-# INTEL: cfcmovle	r9, qword ptr [r8 + 4*rax + 123]
-0x62,0x54,0xfc,0x08,0x4e,0x4c,0x80,0x7b
+# ATT:   cfcmovlel	291(%r28,%r29,4), %r18d, %r22d
+# INTEL: cfcmovle	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x48,0x14,0x4e,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovlew	%dx, %ax
-# INTEL: cfcmovle	ax, dx
-0x62,0xf4,0x7d,0x08,0x4e,0xc2
+# ATT:   cfcmovlel	291(%r28,%r29,4), %r18d
+# INTEL: cfcmovle	r18d, dword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x78,0x08,0x4e,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovlel	%ecx, %edx
-# INTEL: cfcmovle	edx, ecx
-0x62,0xf4,0x7c,0x08,0x4e,0xd1
+# ATT:   cfcmovleq	291(%r28,%r29,4), %r19, %r23
+# INTEL: cfcmovle	r23, r19, qword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0xc0,0x14,0x4e,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovleq	%r9, %r15
-# INTEL: cfcmovle	r15, r9
-0x62,0x54,0xfc,0x08,0x4e,0xf9
+# ATT:   cfcmovleq	291(%r28,%r29,4), %r19
+# INTEL: cfcmovle	r19, qword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0xf8,0x08,0x4e,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovaew	%dx, %ax, %r9w
-# INTEL: cfcmovae	r9w, ax, dx
-0x62,0xf4,0x35,0x1c,0x43,0xc2
+# ATT:   cfcmovaew	%r17w, %r21w, %r25w
+# INTEL: cfcmovae	r25w, r21w, r17w
+0x62,0xec,0x35,0x14,0x43,0xe9
 
-# ATT:   cfcmovael	%ecx, %edx, %r10d
-# INTEL: cfcmovae	r10d, edx, ecx
-0x62,0xf4,0x2c,0x1c,0x43,0xd1
+# ATT:   cfcmovaew	%r17w, %r21w
+# INTEL: cfcmovae	r21w, r17w
+0x62,0xec,0x7d,0x0c,0x43,0xcd
 
-# ATT:   cfcmovaeq	%r9, %r15, %r11
-# INTEL: cfcmovae	r11, r15, r9
-0x62,0x54,0xa4,0x1c,0x43,0xf9
+# ATT:   cfcmovaew	%r17w, 291(%r28,%r29,4)
+# INTEL: cfcmovae	word ptr [r28 + 4*r29 + 291], r17w
+0x62,0x8c,0x79,0x0c,0x43,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovaew	123(%r8,%rax,4), %dx, %ax
-# INTEL: cfcmovae	ax, dx, word ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7d,0x1c,0x43,0x54,0x80,0x7b
+# ATT:   cfcmovael	%r18d, %r22d, %r26d
+# INTEL: cfcmovae	r26d, r22d, r18d
+0x62,0xec,0x2c,0x14,0x43,0xf2
 
-# ATT:   cfcmovael	123(%r8,%rax,4), %ecx, %edx
-# INTEL: cfcmovae	edx, ecx, dword ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x6c,0x1c,0x43,0x4c,0x80,0x7b
+# ATT:   cfcmovael	%r18d, %r22d
+# INTEL: cfcmovae	r22d, r18d
+0x62,0xec,0x7c,0x0c,0x43,0xd6
 
-# ATT:   cfcmovaeq	123(%r8,%rax,4), %r9, %r15
-# INTEL: cfcmovae	r15, r9, qword ptr [r8 + 4*rax + 123]
-0x62,0x54,0x84,0x1c,0x43,0x4c,0x80,0x7b
+# ATT:   cfcmovael	%r18d, 291(%r28,%r29,4)
+# INTEL: cfcmovae	dword ptr [r28 + 4*r29 + 291], r18d
+0x62,0x8c,0x78,0x0c,0x43,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovaew	%dx, 123(%r8,%rax,4)
-# INTEL: cfcmovae	word ptr [r8 + 4*rax + 123], dx
-0x62,0xd4,0x7d,0x0c,0x43,0x54,0x80,0x7b
+# ATT:   cfcmovaeq	%r19, %r23, %r27
+# INTEL: cfcmovae	r27, r23, r19
+0x62,0xec,0xa4,0x14,0x43,0xfb
 
-# ATT:   cfcmovael	%ecx, 123(%r8,%rax,4)
-# INTEL: cfcmovae	dword ptr [r8 + 4*rax + 123], ecx
-0x62,0xd4,0x7c,0x0c,0x43,0x4c,0x80,0x7b
+# ATT:   cfcmovaeq	%r19, %r23
+# INTEL: cfcmovae	r23, r19
+0x62,0xec,0xfc,0x0c,0x43,0xdf
 
-# ATT:   cfcmovaeq	%r9, 123(%r8,%rax,4)
-# INTEL: cfcmovae	qword ptr [r8 + 4*rax + 123], r9
-0x62,0x54,0xfc,0x0c,0x43,0x4c,0x80,0x7b
+# ATT:   cfcmovaeq	%r19, 291(%r28,%r29,4)
+# INTEL: cfcmovae	qword ptr [r28 + 4*r29 + 291], r19
+0x62,0x8c,0xf8,0x0c,0x43,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovaew	123(%r8,%rax,4), %dx
-# INTEL: cfcmovae	dx, word ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7d,0x08,0x43,0x54,0x80,0x7b
+# ATT:   cfcmovaew	291(%r28,%r29,4), %r17w, %r21w
+# INTEL: cfcmovae	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x51,0x14,0x43,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovael	123(%r8,%rax,4), %ecx
-# INTEL: cfcmovae	ecx, dword ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7c,0x08,0x43,0x4c,0x80,0x7b
+# ATT:   cfcmovaew	291(%r28,%r29,4), %r17w
+# INTEL: cfcmovae	r17w, word ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x79,0x08,0x43,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovaeq	123(%r8,%rax,4), %r9
-# INTEL: cfcmovae	r9, qword ptr [r8 + 4*rax + 123]
-0x62,0x54,0xfc,0x08,0x43,0x4c,0x80,0x7b
+# ATT:   cfcmovael	291(%r28,%r29,4), %r18d, %r22d
+# INTEL: cfcmovae	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x48,0x14,0x43,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovaew	%dx, %ax
-# INTEL: cfcmovae	ax, dx
-0x62,0xf4,0x7d,0x08,0x43,0xc2
+# ATT:   cfcmovael	291(%r28,%r29,4), %r18d
+# INTEL: cfcmovae	r18d, dword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x78,0x08,0x43,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovael	%ecx, %edx
-# INTEL: cfcmovae	edx, ecx
-0x62,0xf4,0x7c,0x08,0x43,0xd1
+# ATT:   cfcmovaeq	291(%r28,%r29,4), %r19, %r23
+# INTEL: cfcmovae	r23, r19, qword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0xc0,0x14,0x43,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovaeq	%r9, %r15
-# INTEL: cfcmovae	r15, r9
-0x62,0x54,0xfc,0x08,0x43,0xf9
+# ATT:   cfcmovaeq	291(%r28,%r29,4), %r19
+# INTEL: cfcmovae	r19, qword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0xf8,0x08,0x43,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovaw	%dx, %ax, %r9w
-# INTEL: cfcmova	r9w, ax, dx
-0x62,0xf4,0x35,0x1c,0x47,0xc2
+# ATT:   cfcmovaw	%r17w, %r21w, %r25w
+# INTEL: cfcmova	r25w, r21w, r17w
+0x62,0xec,0x35,0x14,0x47,0xe9
 
-# ATT:   cfcmoval	%ecx, %edx, %r10d
-# INTEL: cfcmova	r10d, edx, ecx
-0x62,0xf4,0x2c,0x1c,0x47,0xd1
+# ATT:   cfcmovaw	%r17w, %r21w
+# INTEL: cfcmova	r21w, r17w
+0x62,0xec,0x7d,0x0c,0x47,0xcd
 
-# ATT:   cfcmovaq	%r9, %r15, %r11
-# INTEL: cfcmova	r11, r15, r9
-0x62,0x54,0xa4,0x1c,0x47,0xf9
+# ATT:   cfcmovaw	%r17w, 291(%r28,%r29,4)
+# INTEL: cfcmova	word ptr [r28 + 4*r29 + 291], r17w
+0x62,0x8c,0x79,0x0c,0x47,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovaw	123(%r8,%rax,4), %dx, %ax
-# INTEL: cfcmova	ax, dx, word ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7d,0x1c,0x47,0x54,0x80,0x7b
+# ATT:   cfcmoval	%r18d, %r22d, %r26d
+# INTEL: cfcmova	r26d, r22d, r18d
+0x62,0xec,0x2c,0x14,0x47,0xf2
 
-# ATT:   cfcmoval	123(%r8,%rax,4), %ecx, %edx
-# INTEL: cfcmova	edx, ecx, dword ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x6c,0x1c,0x47,0x4c,0x80,0x7b
+# ATT:   cfcmoval	%r18d, %r22d
+# INTEL: cfcmova	r22d, r18d
+0x62,0xec,0x7c,0x0c,0x47,0xd6
 
-# ATT:   cfcmovaq	123(%r8,%rax,4), %r9, %r15
-# INTEL: cfcmova	r15, r9, qword ptr [r8 + 4*rax + 123]
-0x62,0x54,0x84,0x1c,0x47,0x4c,0x80,0x7b
+# ATT:   cfcmoval	%r18d, 291(%r28,%r29,4)
+# INTEL: cfcmova	dword ptr [r28 + 4*r29 + 291], r18d
+0x62,0x8c,0x78,0x0c,0x47,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovaw	%dx, 123(%r8,%rax,4)
-# INTEL: cfcmova	word ptr [r8 + 4*rax + 123], dx
-0x62,0xd4,0x7d,0x0c,0x47,0x54,0x80,0x7b
+# ATT:   cfcmovaq	%r19, %r23, %r27
+# INTEL: cfcmova	r27, r23, r19
+0x62,0xec,0xa4,0x14,0x47,0xfb
 
-# ATT:   cfcmoval	%ecx, 123(%r8,%rax,4)
-# INTEL: cfcmova	dword ptr [r8 + 4*rax + 123], ecx
-0x62,0xd4,0x7c,0x0c,0x47,0x4c,0x80,0x7b
+# ATT:   cfcmovaq	%r19, %r23
+# INTEL: cfcmova	r23, r19
+0x62,0xec,0xfc,0x0c,0x47,0xdf
 
-# ATT:   cfcmovaq	%r9, 123(%r8,%rax,4)
-# INTEL: cfcmova	qword ptr [r8 + 4*rax + 123], r9
-0x62,0x54,0xfc,0x0c,0x47,0x4c,0x80,0x7b
+# ATT:   cfcmovaq	%r19, 291(%r28,%r29,4)
+# INTEL: cfcmova	qword ptr [r28 + 4*r29 + 291], r19
+0x62,0x8c,0xf8,0x0c,0x47,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovaw	123(%r8,%rax,4), %dx
-# INTEL: cfcmova	dx, word ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7d,0x08,0x47,0x54,0x80,0x7b
+# ATT:   cfcmovaw	291(%r28,%r29,4), %r17w, %r21w
+# INTEL: cfcmova	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x51,0x14,0x47,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmoval	123(%r8,%rax,4), %ecx
-# INTEL: cfcmova	ecx, dword ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7c,0x08,0x47,0x4c,0x80,0x7b
+# ATT:   cfcmovaw	291(%r28,%r29,4), %r17w
+# INTEL: cfcmova	r17w, word ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x79,0x08,0x47,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovaq	123(%r8,%rax,4), %r9
-# INTEL: cfcmova	r9, qword ptr [r8 + 4*rax + 123]
-0x62,0x54,0xfc,0x08,0x47,0x4c,0x80,0x7b
+# ATT:   cfcmoval	291(%r28,%r29,4), %r18d, %r22d
+# INTEL: cfcmova	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x48,0x14,0x47,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovaw	%dx, %ax
-# INTEL: cfcmova	ax, dx
-0x62,0xf4,0x7d,0x08,0x47,0xc2
+# ATT:   cfcmoval	291(%r28,%r29,4), %r18d
+# INTEL: cfcmova	r18d, dword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x78,0x08,0x47,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmoval	%ecx, %edx
-# INTEL: cfcmova	edx, ecx
-0x62,0xf4,0x7c,0x08,0x47,0xd1
+# ATT:   cfcmovaq	291(%r28,%r29,4), %r19, %r23
+# INTEL: cfcmova	r23, r19, qword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0xc0,0x14,0x47,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovaq	%r9, %r15
-# INTEL: cfcmova	r15, r9
-0x62,0x54,0xfc,0x08,0x47,0xf9
+# ATT:   cfcmovaq	291(%r28,%r29,4), %r19
+# INTEL: cfcmova	r19, qword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0xf8,0x08,0x47,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovgew	%dx, %ax, %r9w
-# INTEL: cfcmovge	r9w, ax, dx
-0x62,0xf4,0x35,0x1c,0x4d,0xc2
+# ATT:   cfcmovgew	%r17w, %r21w, %r25w
+# INTEL: cfcmovge	r25w, r21w, r17w
+0x62,0xec,0x35,0x14,0x4d,0xe9
 
-# ATT:   cfcmovgel	%ecx, %edx, %r10d
-# INTEL: cfcmovge	r10d, edx, ecx
-0x62,0xf4,0x2c,0x1c,0x4d,0xd1
+# ATT:   cfcmovgew	%r17w, %r21w
+# INTEL: cfcmovge	r21w, r17w
+0x62,0xec,0x7d,0x0c,0x4d,0xcd
 
-# ATT:   cfcmovgeq	%r9, %r15, %r11
-# INTEL: cfcmovge	r11, r15, r9
-0x62,0x54,0xa4,0x1c,0x4d,0xf9
+# ATT:   cfcmovgew	%r17w, 291(%r28,%r29,4)
+# INTEL: cfcmovge	word ptr [r28 + 4*r29 + 291], r17w
+0x62,0x8c,0x79,0x0c,0x4d,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovgew	123(%r8,%rax,4), %dx, %ax
-# INTEL: cfcmovge	ax, dx, word ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7d,0x1c,0x4d,0x54,0x80,0x7b
+# ATT:   cfcmovgel	%r18d, %r22d, %r26d
+# INTEL: cfcmovge	r26d, r22d, r18d
+0x62,0xec,0x2c,0x14,0x4d,0xf2
 
-# ATT:   cfcmovgel	123(%r8,%rax,4), %ecx, %edx
-# INTEL: cfcmovge	edx, ecx, dword ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x6c,0x1c,0x4d,0x4c,0x80,0x7b
+# ATT:   cfcmovgel	%r18d, %r22d
+# INTEL: cfcmovge	r22d, r18d
+0x62,0xec,0x7c,0x0c,0x4d,0xd6
 
-# ATT:   cfcmovgeq	123(%r8,%rax,4), %r9, %r15
-# INTEL: cfcmovge	r15, r9, qword ptr [r8 + 4*rax + 123]
-0x62,0x54,0x84,0x1c,0x4d,0x4c,0x80,0x7b
+# ATT:   cfcmovgel	%r18d, 291(%r28,%r29,4)
+# INTEL: cfcmovge	dword ptr [r28 + 4*r29 + 291], r18d
+0x62,0x8c,0x78,0x0c,0x4d,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovgew	%dx, 123(%r8,%rax,4)
-# INTEL: cfcmovge	word ptr [r8 + 4*rax + 123], dx
-0x62,0xd4,0x7d,0x0c,0x4d,0x54,0x80,0x7b
+# ATT:   cfcmovgeq	%r19, %r23, %r27
+# INTEL: cfcmovge	r27, r23, r19
+0x62,0xec,0xa4,0x14,0x4d,0xfb
 
-# ATT:   cfcmovgel	%ecx, 123(%r8,%rax,4)
-# INTEL: cfcmovge	dword ptr [r8 + 4*rax + 123], ecx
-0x62,0xd4,0x7c,0x0c,0x4d,0x4c,0x80,0x7b
+# ATT:   cfcmovgeq	%r19, %r23
+# INTEL: cfcmovge	r23, r19
+0x62,0xec,0xfc,0x0c,0x4d,0xdf
 
-# ATT:   cfcmovgeq	%r9, 123(%r8,%rax,4)
-# INTEL: cfcmovge	qword ptr [r8 + 4*rax + 123], r9
-0x62,0x54,0xfc,0x0c,0x4d,0x4c,0x80,0x7b
+# ATT:   cfcmovgeq	%r19, 291(%r28,%r29,4)
+# INTEL: cfcmovge	qword ptr [r28 + 4*r29 + 291], r19
+0x62,0x8c,0xf8,0x0c,0x4d,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovgew	123(%r8,%rax,4), %dx
-# INTEL: cfcmovge	dx, word ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7d,0x08,0x4d,0x54,0x80,0x7b
+# ATT:   cfcmovgew	291(%r28,%r29,4), %r17w, %r21w
+# INTEL: cfcmovge	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x51,0x14,0x4d,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovgel	123(%r8,%rax,4), %ecx
-# INTEL: cfcmovge	ecx, dword ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7c,0x08,0x4d,0x4c,0x80,0x7b
+# ATT:   cfcmovgew	291(%r28,%r29,4), %r17w
+# INTEL: cfcmovge	r17w, word ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x79,0x08,0x4d,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovgeq	123(%r8,%rax,4), %r9
-# INTEL: cfcmovge	r9, qword ptr [r8 + 4*rax + 123]
-0x62,0x54,0xfc,0x08,0x4d,0x4c,0x80,0x7b
+# ATT:   cfcmovgel	291(%r28,%r29,4), %r18d, %r22d
+# INTEL: cfcmovge	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x48,0x14,0x4d,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovgew	%dx, %ax
-# INTEL: cfcmovge	ax, dx
-0x62,0xf4,0x7d,0x08,0x4d,0xc2
+# ATT:   cfcmovgel	291(%r28,%r29,4), %r18d
+# INTEL: cfcmovge	r18d, dword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x78,0x08,0x4d,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovgel	%ecx, %edx
-# INTEL: cfcmovge	edx, ecx
-0x62,0xf4,0x7c,0x08,0x4d,0xd1
+# ATT:   cfcmovgeq	291(%r28,%r29,4), %r19, %r23
+# INTEL: cfcmovge	r23, r19, qword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0xc0,0x14,0x4d,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovgeq	%r9, %r15
-# INTEL: cfcmovge	r15, r9
-0x62,0x54,0xfc,0x08,0x4d,0xf9
+# ATT:   cfcmovgeq	291(%r28,%r29,4), %r19
+# INTEL: cfcmovge	r19, qword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0xf8,0x08,0x4d,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovgw	%dx, %ax, %r9w
-# INTEL: cfcmovg	r9w, ax, dx
-0x62,0xf4,0x35,0x1c,0x4f,0xc2
+# ATT:   cfcmovnow	%r17w, %r21w, %r25w
+# INTEL: cfcmovno	r25w, r21w, r17w
+0x62,0xec,0x35,0x14,0x41,0xe9
 
-# ATT:   cfcmovgl	%ecx, %edx, %r10d
-# INTEL: cfcmovg	r10d, edx, ecx
-0x62,0xf4,0x2c,0x1c,0x4f,0xd1
+# ATT:   cfcmovnow	%r17w, %r21w
+# INTEL: cfcmovno	r21w, r17w
+0x62,0xec,0x7d,0x0c,0x41,0xcd
 
-# ATT:   cfcmovgq	%r9, %r15, %r11
-# INTEL: cfcmovg	r11, r15, r9
-0x62,0x54,0xa4,0x1c,0x4f,0xf9
+# ATT:   cfcmovnow	%r17w, 291(%r28,%r29,4)
+# INTEL: cfcmovno	word ptr [r28 + 4*r29 + 291], r17w
+0x62,0x8c,0x79,0x0c,0x41,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovgw	123(%r8,%rax,4), %dx, %ax
-# INTEL: cfcmovg	ax, dx, word ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7d,0x1c,0x4f,0x54,0x80,0x7b
+# ATT:   cfcmovnol	%r18d, %r22d, %r26d
+# INTEL: cfcmovno	r26d, r22d, r18d
+0x62,0xec,0x2c,0x14,0x41,0xf2
 
-# ATT:   cfcmovgl	123(%r8,%rax,4), %ecx, %edx
-# INTEL: cfcmovg	edx, ecx, dword ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x6c,0x1c,0x4f,0x4c,0x80,0x7b
+# ATT:   cfcmovnol	%r18d, %r22d
+# INTEL: cfcmovno	r22d, r18d
+0x62,0xec,0x7c,0x0c,0x41,0xd6
 
-# ATT:   cfcmovgq	123(%r8,%rax,4), %r9, %r15
-# INTEL: cfcmovg	r15, r9, qword ptr [r8 + 4*rax + 123]
-0x62,0x54,0x84,0x1c,0x4f,0x4c,0x80,0x7b
+# ATT:   cfcmovnol	%r18d, 291(%r28,%r29,4)
+# INTEL: cfcmovno	dword ptr [r28 + 4*r29 + 291], r18d
+0x62,0x8c,0x78,0x0c,0x41,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovgw	%dx, 123(%r8,%rax,4)
-# INTEL: cfcmovg	word ptr [r8 + 4*rax + 123], dx
-0x62,0xd4,0x7d,0x0c,0x4f,0x54,0x80,0x7b
+# ATT:   cfcmovnoq	%r19, %r23, %r27
+# INTEL: cfcmovno	r27, r23, r19
+0x62,0xec,0xa4,0x14,0x41,0xfb
 
-# ATT:   cfcmovgl	%ecx, 123(%r8,%rax,4)
-# INTEL: cfcmovg	dword ptr [r8 + 4*rax + 123], ecx
-0x62,0xd4,0x7c,0x0c,0x4f,0x4c,0x80,0x7b
+# ATT:   cfcmovnoq	%r19, %r23
+# INTEL: cfcmovno	r23, r19
+0x62,0xec,0xfc,0x0c,0x41,0xdf
 
-# ATT:   cfcmovgq	%r9, 123(%r8,%rax,4)
-# INTEL: cfcmovg	qword ptr [r8 + 4*rax + 123], r9
-0x62,0x54,0xfc,0x0c,0x4f,0x4c,0x80,0x7b
+# ATT:   cfcmovnoq	%r19, 291(%r28,%r29,4)
+# INTEL: cfcmovno	qword ptr [r28 + 4*r29 + 291], r19
+0x62,0x8c,0xf8,0x0c,0x41,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovgw	123(%r8,%rax,4), %dx
-# INTEL: cfcmovg	dx, word ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7d,0x08,0x4f,0x54,0x80,0x7b
+# ATT:   cfcmovnow	291(%r28,%r29,4), %r17w, %r21w
+# INTEL: cfcmovno	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x51,0x14,0x41,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovgl	123(%r8,%rax,4), %ecx
-# INTEL: cfcmovg	ecx, dword ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7c,0x08,0x4f,0x4c,0x80,0x7b
+# ATT:   cfcmovnow	291(%r28,%r29,4), %r17w
+# INTEL: cfcmovno	r17w, word ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x79,0x08,0x41,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovgq	123(%r8,%rax,4), %r9
-# INTEL: cfcmovg	r9, qword ptr [r8 + 4*rax + 123]
-0x62,0x54,0xfc,0x08,0x4f,0x4c,0x80,0x7b
+# ATT:   cfcmovnol	291(%r28,%r29,4), %r18d, %r22d
+# INTEL: cfcmovno	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x48,0x14,0x41,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovgw	%dx, %ax
-# INTEL: cfcmovg	ax, dx
-0x62,0xf4,0x7d,0x08,0x4f,0xc2
+# ATT:   cfcmovnol	291(%r28,%r29,4), %r18d
+# INTEL: cfcmovno	r18d, dword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x78,0x08,0x41,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovgl	%ecx, %edx
-# INTEL: cfcmovg	edx, ecx
-0x62,0xf4,0x7c,0x08,0x4f,0xd1
+# ATT:   cfcmovnoq	291(%r28,%r29,4), %r19, %r23
+# INTEL: cfcmovno	r23, r19, qword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0xc0,0x14,0x41,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovgq	%r9, %r15
-# INTEL: cfcmovg	r15, r9
-0x62,0x54,0xfc,0x08,0x4f,0xf9
+# ATT:   cfcmovnoq	291(%r28,%r29,4), %r19
+# INTEL: cfcmovno	r19, qword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0xf8,0x08,0x41,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovnow	%dx, %ax, %r9w
-# INTEL: cfcmovno	r9w, ax, dx
-0x62,0xf4,0x35,0x1c,0x41,0xc2
+# ATT:   cfcmovnpw	%r17w, %r21w, %r25w
+# INTEL: cfcmovnp	r25w, r21w, r17w
+0x62,0xec,0x35,0x14,0x4b,0xe9
 
-# ATT:   cfcmovnol	%ecx, %edx, %r10d
-# INTEL: cfcmovno	r10d, edx, ecx
-0x62,0xf4,0x2c,0x1c,0x41,0xd1
+# ATT:   cfcmovnpw	%r17w, %r21w
+# INTEL: cfcmovnp	r21w, r17w
+0x62,0xec,0x7d,0x0c,0x4b,0xcd
 
-# ATT:   cfcmovnoq	%r9, %r15, %r11
-# INTEL: cfcmovno	r11, r15, r9
-0x62,0x54,0xa4,0x1c,0x41,0xf9
+# ATT:   cfcmovnpw	%r17w, 291(%r28,%r29,4)
+# INTEL: cfcmovnp	word ptr [r28 + 4*r29 + 291], r17w
+0x62,0x8c,0x79,0x0c,0x4b,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovnow	123(%r8,%rax,4), %dx, %ax
-# INTEL: cfcmovno	ax, dx, word ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7d,0x1c,0x41,0x54,0x80,0x7b
+# ATT:   cfcmovnpl	%r18d, %r22d, %r26d
+# INTEL: cfcmovnp	r26d, r22d, r18d
+0x62,0xec,0x2c,0x14,0x4b,0xf2
 
-# ATT:   cfcmovnol	123(%r8,%rax,4), %ecx, %edx
-# INTEL: cfcmovno	edx, ecx, dword ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x6c,0x1c,0x41,0x4c,0x80,0x7b
+# ATT:   cfcmovnpl	%r18d, %r22d
+# INTEL: cfcmovnp	r22d, r18d
+0x62,0xec,0x7c,0x0c,0x4b,0xd6
 
-# ATT:   cfcmovnoq	123(%r8,%rax,4), %r9, %r15
-# INTEL: cfcmovno	r15, r9, qword ptr [r8 + 4*rax + 123]
-0x62,0x54,0x84,0x1c,0x41,0x4c,0x80,0x7b
+# ATT:   cfcmovnpl	%r18d, 291(%r28,%r29,4)
+# INTEL: cfcmovnp	dword ptr [r28 + 4*r29 + 291], r18d
+0x62,0x8c,0x78,0x0c,0x4b,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovnow	%dx, 123(%r8,%rax,4)
-# INTEL: cfcmovno	word ptr [r8 + 4*rax + 123], dx
-0x62,0xd4,0x7d,0x0c,0x41,0x54,0x80,0x7b
+# ATT:   cfcmovnpq	%r19, %r23, %r27
+# INTEL: cfcmovnp	r27, r23, r19
+0x62,0xec,0xa4,0x14,0x4b,0xfb
 
-# ATT:   cfcmovnol	%ecx, 123(%r8,%rax,4)
-# INTEL: cfcmovno	dword ptr [r8 + 4*rax + 123], ecx
-0x62,0xd4,0x7c,0x0c,0x41,0x4c,0x80,0x7b
+# ATT:   cfcmovnpq	%r19, %r23
+# INTEL: cfcmovnp	r23, r19
+0x62,0xec,0xfc,0x0c,0x4b,0xdf
 
-# ATT:   cfcmovnoq	%r9, 123(%r8,%rax,4)
-# INTEL: cfcmovno	qword ptr [r8 + 4*rax + 123], r9
-0x62,0x54,0xfc,0x0c,0x41,0x4c,0x80,0x7b
+# ATT:   cfcmovnpq	%r19, 291(%r28,%r29,4)
+# INTEL: cfcmovnp	qword ptr [r28 + 4*r29 + 291], r19
+0x62,0x8c,0xf8,0x0c,0x4b,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovnow	123(%r8,%rax,4), %dx
-# INTEL: cfcmovno	dx, word ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7d,0x08,0x41,0x54,0x80,0x7b
+# ATT:   cfcmovnpw	291(%r28,%r29,4), %r17w, %r21w
+# INTEL: cfcmovnp	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x51,0x14,0x4b,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovnol	123(%r8,%rax,4), %ecx
-# INTEL: cfcmovno	ecx, dword ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7c,0x08,0x41,0x4c,0x80,0x7b
+# ATT:   cfcmovnpw	291(%r28,%r29,4), %r17w
+# INTEL: cfcmovnp	r17w, word ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x79,0x08,0x4b,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovnoq	123(%r8,%rax,4), %r9
-# INTEL: cfcmovno	r9, qword ptr [r8 + 4*rax + 123]
-0x62,0x54,0xfc,0x08,0x41,0x4c,0x80,0x7b
+# ATT:   cfcmovnpl	291(%r28,%r29,4), %r18d, %r22d
+# INTEL: cfcmovnp	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x48,0x14,0x4b,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovnow	%dx, %ax
-# INTEL: cfcmovno	ax, dx
-0x62,0xf4,0x7d,0x08,0x41,0xc2
+# ATT:   cfcmovnpl	291(%r28,%r29,4), %r18d
+# INTEL: cfcmovnp	r18d, dword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x78,0x08,0x4b,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovnol	%ecx, %edx
-# INTEL: cfcmovno	edx, ecx
-0x62,0xf4,0x7c,0x08,0x41,0xd1
+# ATT:   cfcmovnpq	291(%r28,%r29,4), %r19, %r23
+# INTEL: cfcmovnp	r23, r19, qword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0xc0,0x14,0x4b,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovnoq	%r9, %r15
-# INTEL: cfcmovno	r15, r9
-0x62,0x54,0xfc,0x08,0x41,0xf9
+# ATT:   cfcmovnpq	291(%r28,%r29,4), %r19
+# INTEL: cfcmovnp	r19, qword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0xf8,0x08,0x4b,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovnpw	%dx, %ax, %r9w
-# INTEL: cfcmovnp	r9w, ax, dx
-0x62,0xf4,0x35,0x1c,0x4b,0xc2
+# ATT:   cfcmovnsw	%r17w, %r21w, %r25w
+# INTEL: cfcmovns	r25w, r21w, r17w
+0x62,0xec,0x35,0x14,0x49,0xe9
 
-# ATT:   cfcmovnpl	%ecx, %edx, %r10d
-# INTEL: cfcmovnp	r10d, edx, ecx
-0x62,0xf4,0x2c,0x1c,0x4b,0xd1
+# ATT:   cfcmovnsw	%r17w, %r21w
+# INTEL: cfcmovns	r21w, r17w
+0x62,0xec,0x7d,0x0c,0x49,0xcd
 
-# ATT:   cfcmovnpq	%r9, %r15, %r11
-# INTEL: cfcmovnp	r11, r15, r9
-0x62,0x54,0xa4,0x1c,0x4b,0xf9
+# ATT:   cfcmovnsw	%r17w, 291(%r28,%r29,4)
+# INTEL: cfcmovns	word ptr [r28 + 4*r29 + 291], r17w
+0x62,0x8c,0x79,0x0c,0x49,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovnpw	123(%r8,%rax,4), %dx, %ax
-# INTEL: cfcmovnp	ax, dx, word ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7d,0x1c,0x4b,0x54,0x80,0x7b
+# ATT:   cfcmovnsl	%r18d, %r22d, %r26d
+# INTEL: cfcmovns	r26d, r22d, r18d
+0x62,0xec,0x2c,0x14,0x49,0xf2
 
-# ATT:   cfcmovnpl	123(%r8,%rax,4), %ecx, %edx
-# INTEL: cfcmovnp	edx, ecx, dword ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x6c,0x1c,0x4b,0x4c,0x80,0x7b
+# ATT:   cfcmovnsl	%r18d, %r22d
+# INTEL: cfcmovns	r22d, r18d
+0x62,0xec,0x7c,0x0c,0x49,0xd6
 
-# ATT:   cfcmovnpq	123(%r8,%rax,4), %r9, %r15
-# INTEL: cfcmovnp	r15, r9, qword ptr [r8 + 4*rax + 123]
-0x62,0x54,0x84,0x1c,0x4b,0x4c,0x80,0x7b
+# ATT:   cfcmovnsl	%r18d, 291(%r28,%r29,4)
+# INTEL: cfcmovns	dword ptr [r28 + 4*r29 + 291], r18d
+0x62,0x8c,0x78,0x0c,0x49,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovnpw	%dx, 123(%r8,%rax,4)
-# INTEL: cfcmovnp	word ptr [r8 + 4*rax + 123], dx
-0x62,0xd4,0x7d,0x0c,0x4b,0x54,0x80,0x7b
+# ATT:   cfcmovnsq	%r19, %r23, %r27
+# INTEL: cfcmovns	r27, r23, r19
+0x62,0xec,0xa4,0x14,0x49,0xfb
 
-# ATT:   cfcmovnpl	%ecx, 123(%r8,%rax,4)
-# INTEL: cfcmovnp	dword ptr [r8 + 4*rax + 123], ecx
-0x62,0xd4,0x7c,0x0c,0x4b,0x4c,0x80,0x7b
+# ATT:   cfcmovnsq	%r19, %r23
+# INTEL: cfcmovns	r23, r19
+0x62,0xec,0xfc,0x0c,0x49,0xdf
 
-# ATT:   cfcmovnpq	%r9, 123(%r8,%rax,4)
-# INTEL: cfcmovnp	qword ptr [r8 + 4*rax + 123], r9
-0x62,0x54,0xfc,0x0c,0x4b,0x4c,0x80,0x7b
+# ATT:   cfcmovnsq	%r19, 291(%r28,%r29,4)
+# INTEL: cfcmovns	qword ptr [r28 + 4*r29 + 291], r19
+0x62,0x8c,0xf8,0x0c,0x49,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovnpw	123(%r8,%rax,4), %dx
-# INTEL: cfcmovnp	dx, word ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7d,0x08,0x4b,0x54,0x80,0x7b
+# ATT:   cfcmovnsw	291(%r28,%r29,4), %r17w, %r21w
+# INTEL: cfcmovns	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x51,0x14,0x49,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovnpl	123(%r8,%rax,4), %ecx
-# INTEL: cfcmovnp	ecx, dword ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7c,0x08,0x4b,0x4c,0x80,0x7b
+# ATT:   cfcmovnsw	291(%r28,%r29,4), %r17w
+# INTEL: cfcmovns	r17w, word ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x79,0x08,0x49,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovnpq	123(%r8,%rax,4), %r9
-# INTEL: cfcmovnp	r9, qword ptr [r8 + 4*rax + 123]
-0x62,0x54,0xfc,0x08,0x4b,0x4c,0x80,0x7b
+# ATT:   cfcmovnsl	291(%r28,%r29,4), %r18d, %r22d
+# INTEL: cfcmovns	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x48,0x14,0x49,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovnpw	%dx, %ax
-# INTEL: cfcmovnp	ax, dx
-0x62,0xf4,0x7d,0x08,0x4b,0xc2
+# ATT:   cfcmovnsl	291(%r28,%r29,4), %r18d
+# INTEL: cfcmovns	r18d, dword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x78,0x08,0x49,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovnpl	%ecx, %edx
-# INTEL: cfcmovnp	edx, ecx
-0x62,0xf4,0x7c,0x08,0x4b,0xd1
+# ATT:   cfcmovnsq	291(%r28,%r29,4), %r19, %r23
+# INTEL: cfcmovns	r23, r19, qword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0xc0,0x14,0x49,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovnpq	%r9, %r15
-# INTEL: cfcmovnp	r15, r9
-0x62,0x54,0xfc,0x08,0x4b,0xf9
+# ATT:   cfcmovnsq	291(%r28,%r29,4), %r19
+# INTEL: cfcmovns	r19, qword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0xf8,0x08,0x49,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovnsw	%dx, %ax, %r9w
-# INTEL: cfcmovns	r9w, ax, dx
-0x62,0xf4,0x35,0x1c,0x49,0xc2
+# ATT:   cfcmovnew	%r17w, %r21w, %r25w
+# INTEL: cfcmovne	r25w, r21w, r17w
+0x62,0xec,0x35,0x14,0x45,0xe9
 
-# ATT:   cfcmovnsl	%ecx, %edx, %r10d
-# INTEL: cfcmovns	r10d, edx, ecx
-0x62,0xf4,0x2c,0x1c,0x49,0xd1
+# ATT:   cfcmovnew	%r17w, %r21w
+# INTEL: cfcmovne	r21w, r17w
+0x62,0xec,0x7d,0x0c,0x45,0xcd
 
-# ATT:   cfcmovnsq	%r9, %r15, %r11
-# INTEL: cfcmovns	r11, r15, r9
-0x62,0x54,0xa4,0x1c,0x49,0xf9
+# ATT:   cfcmovnew	%r17w, 291(%r28,%r29,4)
+# INTEL: cfcmovne	word ptr [r28 + 4*r29 + 291], r17w
+0x62,0x8c,0x79,0x0c,0x45,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovnsw	123(%r8,%rax,4), %dx, %ax
-# INTEL: cfcmovns	ax, dx, word ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7d,0x1c,0x49,0x54,0x80,0x7b
+# ATT:   cfcmovnel	%r18d, %r22d, %r26d
+# INTEL: cfcmovne	r26d, r22d, r18d
+0x62,0xec,0x2c,0x14,0x45,0xf2
 
-# ATT:   cfcmovnsl	123(%r8,%rax,4), %ecx, %edx
-# INTEL: cfcmovns	edx, ecx, dword ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x6c,0x1c,0x49,0x4c,0x80,0x7b
+# ATT:   cfcmovnel	%r18d, %r22d
+# INTEL: cfcmovne	r22d, r18d
+0x62,0xec,0x7c,0x0c,0x45,0xd6
 
-# ATT:   cfcmovnsq	123(%r8,%rax,4), %r9, %r15
-# INTEL: cfcmovns	r15, r9, qword ptr [r8 + 4*rax + 123]
-0x62,0x54,0x84,0x1c,0x49,0x4c,0x80,0x7b
+# ATT:   cfcmovnel	%r18d, 291(%r28,%r29,4)
+# INTEL: cfcmovne	dword ptr [r28 + 4*r29 + 291], r18d
+0x62,0x8c,0x78,0x0c,0x45,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovnsw	%dx, 123(%r8,%rax,4)
-# INTEL: cfcmovns	word ptr [r8 + 4*rax + 123], dx
-0x62,0xd4,0x7d,0x0c,0x49,0x54,0x80,0x7b
+# ATT:   cfcmovneq	%r19, %r23, %r27
+# INTEL: cfcmovne	r27, r23, r19
+0x62,0xec,0xa4,0x14,0x45,0xfb
 
-# ATT:   cfcmovnsl	%ecx, 123(%r8,%rax,4)
-# INTEL: cfcmovns	dword ptr [r8 + 4*rax + 123], ecx
-0x62,0xd4,0x7c,0x0c,0x49,0x4c,0x80,0x7b
+# ATT:   cfcmovneq	%r19, %r23
+# INTEL: cfcmovne	r23, r19
+0x62,0xec,0xfc,0x0c,0x45,0xdf
 
-# ATT:   cfcmovnsq	%r9, 123(%r8,%rax,4)
-# INTEL: cfcmovns	qword ptr [r8 + 4*rax + 123], r9
-0x62,0x54,0xfc,0x0c,0x49,0x4c,0x80,0x7b
+# ATT:   cfcmovneq	%r19, 291(%r28,%r29,4)
+# INTEL: cfcmovne	qword ptr [r28 + 4*r29 + 291], r19
+0x62,0x8c,0xf8,0x0c,0x45,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovnsw	123(%r8,%rax,4), %dx
-# INTEL: cfcmovns	dx, word ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7d,0x08,0x49,0x54,0x80,0x7b
+# ATT:   cfcmovnew	291(%r28,%r29,4), %r17w, %r21w
+# INTEL: cfcmovne	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x51,0x14,0x45,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovnsl	123(%r8,%rax,4), %ecx
-# INTEL: cfcmovns	ecx, dword ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7c,0x08,0x49,0x4c,0x80,0x7b
+# ATT:   cfcmovnew	291(%r28,%r29,4), %r17w
+# INTEL: cfcmovne	r17w, word ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x79,0x08,0x45,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovnsq	123(%r8,%rax,4), %r9
-# INTEL: cfcmovns	r9, qword ptr [r8 + 4*rax + 123]
-0x62,0x54,0xfc,0x08,0x49,0x4c,0x80,0x7b
+# ATT:   cfcmovnel	291(%r28,%r29,4), %r18d, %r22d
+# INTEL: cfcmovne	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x48,0x14,0x45,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovnsw	%dx, %ax
-# INTEL: cfcmovns	ax, dx
-0x62,0xf4,0x7d,0x08,0x49,0xc2
+# ATT:   cfcmovnel	291(%r28,%r29,4), %r18d
+# INTEL: cfcmovne	r18d, dword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x78,0x08,0x45,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovnsl	%ecx, %edx
-# INTEL: cfcmovns	edx, ecx
-0x62,0xf4,0x7c,0x08,0x49,0xd1
+# ATT:   cfcmovneq	291(%r28,%r29,4), %r19, %r23
+# INTEL: cfcmovne	r23, r19, qword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0xc0,0x14,0x45,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovnsq	%r9, %r15
-# INTEL: cfcmovns	r15, r9
-0x62,0x54,0xfc,0x08,0x49,0xf9
+# ATT:   cfcmovneq	291(%r28,%r29,4), %r19
+# INTEL: cfcmovne	r19, qword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0xf8,0x08,0x45,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovnew	%dx, %ax, %r9w
-# INTEL: cfcmovne	r9w, ax, dx
-0x62,0xf4,0x35,0x1c,0x45,0xc2
+# ATT:   cfcmovpw	%r17w, %r21w, %r25w
+# INTEL: cfcmovp	r25w, r21w, r17w
+0x62,0xec,0x35,0x14,0x4a,0xe9
 
-# ATT:   cfcmovnel	%ecx, %edx, %r10d
-# INTEL: cfcmovne	r10d, edx, ecx
-0x62,0xf4,0x2c,0x1c,0x45,0xd1
+# ATT:   cfcmovpw	%r17w, %r21w
+# INTEL: cfcmovp	r21w, r17w
+0x62,0xec,0x7d,0x0c,0x4a,0xcd
 
-# ATT:   cfcmovneq	%r9, %r15, %r11
-# INTEL: cfcmovne	r11, r15, r9
-0x62,0x54,0xa4,0x1c,0x45,0xf9
+# ATT:   cfcmovpw	%r17w, 291(%r28,%r29,4)
+# INTEL: cfcmovp	word ptr [r28 + 4*r29 + 291], r17w
+0x62,0x8c,0x79,0x0c,0x4a,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovnew	123(%r8,%rax,4), %dx, %ax
-# INTEL: cfcmovne	ax, dx, word ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7d,0x1c,0x45,0x54,0x80,0x7b
+# ATT:   cfcmovpl	%r18d, %r22d, %r26d
+# INTEL: cfcmovp	r26d, r22d, r18d
+0x62,0xec,0x2c,0x14,0x4a,0xf2
 
-# ATT:   cfcmovnel	123(%r8,%rax,4), %ecx, %edx
-# INTEL: cfcmovne	edx, ecx, dword ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x6c,0x1c,0x45,0x4c,0x80,0x7b
+# ATT:   cfcmovpl	%r18d, %r22d
+# INTEL: cfcmovp	r22d, r18d
+0x62,0xec,0x7c,0x0c,0x4a,0xd6
 
-# ATT:   cfcmovneq	123(%r8,%rax,4), %r9, %r15
-# INTEL: cfcmovne	r15, r9, qword ptr [r8 + 4*rax + 123]
-0x62,0x54,0x84,0x1c,0x45,0x4c,0x80,0x7b
+# ATT:   cfcmovpl	%r18d, 291(%r28,%r29,4)
+# INTEL: cfcmovp	dword ptr [r28 + 4*r29 + 291], r18d
+0x62,0x8c,0x78,0x0c,0x4a,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovnew	%dx, 123(%r8,%rax,4)
-# INTEL: cfcmovne	word ptr [r8 + 4*rax + 123], dx
-0x62,0xd4,0x7d,0x0c,0x45,0x54,0x80,0x7b
+# ATT:   cfcmovpq	%r19, %r23, %r27
+# INTEL: cfcmovp	r27, r23, r19
+0x62,0xec,0xa4,0x14,0x4a,0xfb
 
-# ATT:   cfcmovnel	%ecx, 123(%r8,%rax,4)
-# INTEL: cfcmovne	dword ptr [r8 + 4*rax + 123], ecx
-0x62,0xd4,0x7c,0x0c,0x45,0x4c,0x80,0x7b
+# ATT:   cfcmovpq	%r19, %r23
+# INTEL: cfcmovp	r23, r19
+0x62,0xec,0xfc,0x0c,0x4a,0xdf
 
-# ATT:   cfcmovneq	%r9, 123(%r8,%rax,4)
-# INTEL: cfcmovne	qword ptr [r8 + 4*rax + 123], r9
-0x62,0x54,0xfc,0x0c,0x45,0x4c,0x80,0x7b
+# ATT:   cfcmovpq	%r19, 291(%r28,%r29,4)
+# INTEL: cfcmovp	qword ptr [r28 + 4*r29 + 291], r19
+0x62,0x8c,0xf8,0x0c,0x4a,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovnew	123(%r8,%rax,4), %dx
-# INTEL: cfcmovne	dx, word ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7d,0x08,0x45,0x54,0x80,0x7b
+# ATT:   cfcmovpw	291(%r28,%r29,4), %r17w, %r21w
+# INTEL: cfcmovp	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x51,0x14,0x4a,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovnel	123(%r8,%rax,4), %ecx
-# INTEL: cfcmovne	ecx, dword ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7c,0x08,0x45,0x4c,0x80,0x7b
+# ATT:   cfcmovpw	291(%r28,%r29,4), %r17w
+# INTEL: cfcmovp	r17w, word ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x79,0x08,0x4a,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovneq	123(%r8,%rax,4), %r9
-# INTEL: cfcmovne	r9, qword ptr [r8 + 4*rax + 123]
-0x62,0x54,0xfc,0x08,0x45,0x4c,0x80,0x7b
+# ATT:   cfcmovpl	291(%r28,%r29,4), %r18d, %r22d
+# INTEL: cfcmovp	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x48,0x14,0x4a,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovnew	%dx, %ax
-# INTEL: cfcmovne	ax, dx
-0x62,0xf4,0x7d,0x08,0x45,0xc2
+# ATT:   cfcmovpl	291(%r28,%r29,4), %r18d
+# INTEL: cfcmovp	r18d, dword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x78,0x08,0x4a,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovnel	%ecx, %edx
-# INTEL: cfcmovne	edx, ecx
-0x62,0xf4,0x7c,0x08,0x45,0xd1
+# ATT:   cfcmovpq	291(%r28,%r29,4), %r19, %r23
+# INTEL: cfcmovp	r23, r19, qword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0xc0,0x14,0x4a,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovneq	%r9, %r15
-# INTEL: cfcmovne	r15, r9
-0x62,0x54,0xfc,0x08,0x45,0xf9
+# ATT:   cfcmovpq	291(%r28,%r29,4), %r19
+# INTEL: cfcmovp	r19, qword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0xf8,0x08,0x4a,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovow	%dx, %ax, %r9w
-# INTEL: cfcmovo	r9w, ax, dx
-0x62,0xf4,0x35,0x1c,0x40,0xc2
+# ATT:   cfcmovsw	%r17w, %r21w, %r25w
+# INTEL: cfcmovs	r25w, r21w, r17w
+0x62,0xec,0x35,0x14,0x48,0xe9
 
-# ATT:   cfcmovol	%ecx, %edx, %r10d
-# INTEL: cfcmovo	r10d, edx, ecx
-0x62,0xf4,0x2c,0x1c,0x40,0xd1
+# ATT:   cfcmovsw	%r17w, %r21w
+# INTEL: cfcmovs	r21w, r17w
+0x62,0xec,0x7d,0x0c,0x48,0xcd
 
-# ATT:   cfcmovoq	%r9, %r15, %r11
-# INTEL: cfcmovo	r11, r15, r9
-0x62,0x54,0xa4,0x1c,0x40,0xf9
+# ATT:   cfcmovsw	%r17w, 291(%r28,%r29,4)
+# INTEL: cfcmovs	word ptr [r28 + 4*r29 + 291], r17w
+0x62,0x8c,0x79,0x0c,0x48,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovow	123(%r8,%rax,4), %dx, %ax
-# INTEL: cfcmovo	ax, dx, word ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7d,0x1c,0x40,0x54,0x80,0x7b
+# ATT:   cfcmovsl	%r18d, %r22d, %r26d
+# INTEL: cfcmovs	r26d, r22d, r18d
+0x62,0xec,0x2c,0x14,0x48,0xf2
 
-# ATT:   cfcmovol	123(%r8,%rax,4), %ecx, %edx
-# INTEL: cfcmovo	edx, ecx, dword ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x6c,0x1c,0x40,0x4c,0x80,0x7b
+# ATT:   cfcmovsl	%r18d, %r22d
+# INTEL: cfcmovs	r22d, r18d
+0x62,0xec,0x7c,0x0c,0x48,0xd6
 
-# ATT:   cfcmovoq	123(%r8,%rax,4), %r9, %r15
-# INTEL: cfcmovo	r15, r9, qword ptr [r8 + 4*rax + 123]
-0x62,0x54,0x84,0x1c,0x40,0x4c,0x80,0x7b
+# ATT:   cfcmovsl	%r18d, 291(%r28,%r29,4)
+# INTEL: cfcmovs	dword ptr [r28 + 4*r29 + 291], r18d
+0x62,0x8c,0x78,0x0c,0x48,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovow	%dx, 123(%r8,%rax,4)
-# INTEL: cfcmovo	word ptr [r8 + 4*rax + 123], dx
-0x62,0xd4,0x7d,0x0c,0x40,0x54,0x80,0x7b
+# ATT:   cfcmovsq	%r19, %r23, %r27
+# INTEL: cfcmovs	r27, r23, r19
+0x62,0xec,0xa4,0x14,0x48,0xfb
 
-# ATT:   cfcmovol	%ecx, 123(%r8,%rax,4)
-# INTEL: cfcmovo	dword ptr [r8 + 4*rax + 123], ecx
-0x62,0xd4,0x7c,0x0c,0x40,0x4c,0x80,0x7b
+# ATT:   cfcmovsq	%r19, %r23
+# INTEL: cfcmovs	r23, r19
+0x62,0xec,0xfc,0x0c,0x48,0xdf
 
-# ATT:   cfcmovoq	%r9, 123(%r8,%rax,4)
-# INTEL: cfcmovo	qword ptr [r8 + 4*rax + 123], r9
-0x62,0x54,0xfc,0x0c,0x40,0x4c,0x80,0x7b
+# ATT:   cfcmovsq	%r19, 291(%r28,%r29,4)
+# INTEL: cfcmovs	qword ptr [r28 + 4*r29 + 291], r19
+0x62,0x8c,0xf8,0x0c,0x48,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovow	123(%r8,%rax,4), %dx
-# INTEL: cfcmovo	dx, word ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7d,0x08,0x40,0x54,0x80,0x7b
+# ATT:   cfcmovsw	291(%r28,%r29,4), %r17w, %r21w
+# INTEL: cfcmovs	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x51,0x14,0x48,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovol	123(%r8,%rax,4), %ecx
-# INTEL: cfcmovo	ecx, dword ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7c,0x08,0x40,0x4c,0x80,0x7b
+# ATT:   cfcmovsw	291(%r28,%r29,4), %r17w
+# INTEL: cfcmovs	r17w, word ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x79,0x08,0x48,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovoq	123(%r8,%rax,4), %r9
-# INTEL: cfcmovo	r9, qword ptr [r8 + 4*rax + 123]
-0x62,0x54,0xfc,0x08,0x40,0x4c,0x80,0x7b
+# ATT:   cfcmovsl	291(%r28,%r29,4), %r18d, %r22d
+# INTEL: cfcmovs	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x48,0x14,0x48,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovow	%dx, %ax
-# INTEL: cfcmovo	ax, dx
-0x62,0xf4,0x7d,0x08,0x40,0xc2
+# ATT:   cfcmovsl	291(%r28,%r29,4), %r18d
+# INTEL: cfcmovs	r18d, dword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x78,0x08,0x48,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovol	%ecx, %edx
-# INTEL: cfcmovo	edx, ecx
-0x62,0xf4,0x7c,0x08,0x40,0xd1
+# ATT:   cfcmovsq	291(%r28,%r29,4), %r19, %r23
+# INTEL: cfcmovs	r23, r19, qword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0xc0,0x14,0x48,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovoq	%r9, %r15
-# INTEL: cfcmovo	r15, r9
-0x62,0x54,0xfc,0x08,0x40,0xf9
+# ATT:   cfcmovsq	291(%r28,%r29,4), %r19
+# INTEL: cfcmovs	r19, qword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0xf8,0x08,0x48,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovpw	%dx, %ax, %r9w
-# INTEL: cfcmovp	r9w, ax, dx
-0x62,0xf4,0x35,0x1c,0x4a,0xc2
+# ATT:   cfcmovew	%r17w, %r21w, %r25w
+# INTEL: cfcmove	r25w, r21w, r17w
+0x62,0xec,0x35,0x14,0x44,0xe9
 
-# ATT:   cfcmovpl	%ecx, %edx, %r10d
-# INTEL: cfcmovp	r10d, edx, ecx
-0x62,0xf4,0x2c,0x1c,0x4a,0xd1
+# ATT:   cfcmovew	%r17w, %r21w
+# INTEL: cfcmove	r21w, r17w
+0x62,0xec,0x7d,0x0c,0x44,0xcd
 
-# ATT:   cfcmovpq	%r9, %r15, %r11
-# INTEL: cfcmovp	r11, r15, r9
-0x62,0x54,0xa4,0x1c,0x4a,0xf9
+# ATT:   cfcmovew	%r17w, 291(%r28,%r29,4)
+# INTEL: cfcmove	word ptr [r28 + 4*r29 + 291], r17w
+0x62,0x8c,0x79,0x0c,0x44,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovpw	123(%r8,%rax,4), %dx, %ax
-# INTEL: cfcmovp	ax, dx, word ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7d,0x1c,0x4a,0x54,0x80,0x7b
+# ATT:   cfcmovel	%r18d, %r22d, %r26d
+# INTEL: cfcmove	r26d, r22d, r18d
+0x62,0xec,0x2c,0x14,0x44,0xf2
 
-# ATT:   cfcmovpl	123(%r8,%rax,4), %ecx, %edx
-# INTEL: cfcmovp	edx, ecx, dword ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x6c,0x1c,0x4a,0x4c,0x80,0x7b
+# ATT:   cfcmovel	%r18d, %r22d
+# INTEL: cfcmove	r22d, r18d
+0x62,0xec,0x7c,0x0c,0x44,0xd6
 
-# ATT:   cfcmovpq	123(%r8,%rax,4), %r9, %r15
-# INTEL: cfcmovp	r15, r9, qword ptr [r8 + 4*rax + 123]
-0x62,0x54,0x84,0x1c,0x4a,0x4c,0x80,0x7b
+# ATT:   cfcmovel	%r18d, 291(%r28,%r29,4)
+# INTEL: cfcmove	dword ptr [r28 + 4*r29 + 291], r18d
+0x62,0x8c,0x78,0x0c,0x44,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovpw	%dx, 123(%r8,%rax,4)
-# INTEL: cfcmovp	word ptr [r8 + 4*rax + 123], dx
-0x62,0xd4,0x7d,0x0c,0x4a,0x54,0x80,0x7b
+# ATT:   cfcmoveq	%r19, %r23, %r27
+# INTEL: cfcmove	r27, r23, r19
+0x62,0xec,0xa4,0x14,0x44,0xfb
 
-# ATT:   cfcmovpl	%ecx, 123(%r8,%rax,4)
-# INTEL: cfcmovp	dword ptr [r8 + 4*rax + 123], ecx
-0x62,0xd4,0x7c,0x0c,0x4a,0x4c,0x80,0x7b
+# ATT:   cfcmoveq	%r19, %r23
+# INTEL: cfcmove	r23, r19
+0x62,0xec,0xfc,0x0c,0x44,0xdf
 
-# ATT:   cfcmovpq	%r9, 123(%r8,%rax,4)
-# INTEL: cfcmovp	qword ptr [r8 + 4*rax + 123], r9
-0x62,0x54,0xfc,0x0c,0x4a,0x4c,0x80,0x7b
+# ATT:   cfcmoveq	%r19, 291(%r28,%r29,4)
+# INTEL: cfcmove	qword ptr [r28 + 4*r29 + 291], r19
+0x62,0x8c,0xf8,0x0c,0x44,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovpw	123(%r8,%rax,4), %dx
-# INTEL: cfcmovp	dx, word ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7d,0x08,0x4a,0x54,0x80,0x7b
+# ATT:   cfcmovew	291(%r28,%r29,4), %r17w, %r21w
+# INTEL: cfcmove	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x51,0x14,0x44,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovpl	123(%r8,%rax,4), %ecx
-# INTEL: cfcmovp	ecx, dword ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7c,0x08,0x4a,0x4c,0x80,0x7b
+# ATT:   cfcmovew	291(%r28,%r29,4), %r17w
+# INTEL: cfcmove	r17w, word ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x79,0x08,0x44,0x8c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovpq	123(%r8,%rax,4), %r9
-# INTEL: cfcmovp	r9, qword ptr [r8 + 4*rax + 123]
-0x62,0x54,0xfc,0x08,0x4a,0x4c,0x80,0x7b
+# ATT:   cfcmovel	291(%r28,%r29,4), %r18d, %r22d
+# INTEL: cfcmove	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x48,0x14,0x44,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovpw	%dx, %ax
-# INTEL: cfcmovp	ax, dx
-0x62,0xf4,0x7d,0x08,0x4a,0xc2
+# ATT:   cfcmovel	291(%r28,%r29,4), %r18d
+# INTEL: cfcmove	r18d, dword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0x78,0x08,0x44,0x94,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovpl	%ecx, %edx
-# INTEL: cfcmovp	edx, ecx
-0x62,0xf4,0x7c,0x08,0x4a,0xd1
+# ATT:   cfcmoveq	291(%r28,%r29,4), %r19, %r23
+# INTEL: cfcmove	r23, r19, qword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0xc0,0x14,0x44,0x9c,0xac,0x23,0x01,0x00,0x00
 
-# ATT:   cfcmovpq	%r9, %r15
-# INTEL: cfcmovp	r15, r9
-0x62,0x54,0xfc,0x08,0x4a,0xf9
-
-# ATT:   cfcmovsw	%dx, %ax, %r9w
-# INTEL: cfcmovs	r9w, ax, dx
-0x62,0xf4,0x35,0x1c,0x48,0xc2
-
-# ATT:   cfcmovsl	%ecx, %edx, %r10d
-# INTEL: cfcmovs	r10d, edx, ecx
-0x62,0xf4,0x2c,0x1c,0x48,0xd1
-
-# ATT:   cfcmovsq	%r9, %r15, %r11
-# INTEL: cfcmovs	r11, r15, r9
-0x62,0x54,0xa4,0x1c,0x48,0xf9
-
-# ATT:   cfcmovsw	123(%r8,%rax,4), %dx, %ax
-# INTEL: cfcmovs	ax, dx, word ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7d,0x1c,0x48,0x54,0x80,0x7b
-
-# ATT:   cfcmovsl	123(%r8,%rax,4), %ecx, %edx
-# INTEL: cfcmovs	edx, ecx, dword ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x6c,0x1c,0x48,0x4c,0x80,0x7b
-
-# ATT:   cfcmovsq	123(%r8,%rax,4), %r9, %r15
-# INTEL: cfcmovs	r15, r9, qword ptr [r8 + 4*rax + 123]
-0x62,0x54,0x84,0x1c,0x48,0x4c,0x80,0x7b
-
-# ATT:   cfcmovsw	%dx, 123(%r8,%rax,4)
-# INTEL: cfcmovs	word ptr [r8 + 4*rax + 123], dx
-0x62,0xd4,0x7d,0x0c,0x48,0x54,0x80,0x7b
-
-# ATT:   cfcmovsl	%ecx, 123(%r8,%rax,4)
-# INTEL: cfcmovs	dword ptr [r8 + 4*rax + 123], ecx
-0x62,0xd4,0x7c,0x0c,0x48,0x4c,0x80,0x7b
-
-# ATT:   cfcmovsq	%r9, 123(%r8,%rax,4)
-# INTEL: cfcmovs	qword ptr [r8 + 4*rax + 123], r9
-0x62,0x54,0xfc,0x0c,0x48,0x4c,0x80,0x7b
-
-# ATT:   cfcmovsw	123(%r8,%rax,4), %dx
-# INTEL: cfcmovs	dx, word ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7d,0x08,0x48,0x54,0x80,0x7b
-
-# ATT:   cfcmovsl	123(%r8,%rax,4), %ecx
-# INTEL: cfcmovs	ecx, dword ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7c,0x08,0x48,0x4c,0x80,0x7b
-
-# ATT:   cfcmovsq	123(%r8,%rax,4), %r9
-# INTEL: cfcmovs	r9, qword ptr [r8 + 4*rax + 123]
-0x62,0x54,0xfc,0x08,0x48,0x4c,0x80,0x7b
-
-# ATT:   cfcmovsw	%dx, %ax
-# INTEL: cfcmovs	ax, dx
-0x62,0xf4,0x7d,0x08,0x48,0xc2
-
-# ATT:   cfcmovsl	%ecx, %edx
-# INTEL: cfcmovs	edx, ecx
-0x62,0xf4,0x7c,0x08,0x48,0xd1
-
-# ATT:   cfcmovsq	%r9, %r15
-# INTEL: cfcmovs	r15, r9
-0x62,0x54,0xfc,0x08,0x48,0xf9
-
-# ATT:   cfcmovew	%dx, %ax, %r9w
-# INTEL: cfcmove	r9w, ax, dx
-0x62,0xf4,0x35,0x1c,0x44,0xc2
-
-# ATT:   cfcmovel	%ecx, %edx, %r10d
-# INTEL: cfcmove	r10d, edx, ecx
-0x62,0xf4,0x2c,0x1c,0x44,0xd1
-
-# ATT:   cfcmoveq	%r9, %r15, %r11
-# INTEL: cfcmove	r11, r15, r9
-0x62,0x54,0xa4,0x1c,0x44,0xf9
-
-# ATT:   cfcmovew	123(%r8,%rax,4), %dx, %ax
-# INTEL: cfcmove	ax, dx, word ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7d,0x1c,0x44,0x54,0x80,0x7b
-
-# ATT:   cfcmovel	123(%r8,%rax,4), %ecx, %edx
-# INTEL: cfcmove	edx, ecx, dword ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x6c,0x1c,0x44,0x4c,0x80,0x7b
-
-# ATT:   cfcmoveq	123(%r8,%rax,4), %r9, %r15
-# INTEL: cfcmove	r15, r9, qword ptr [r8 + 4*rax + 123]
-0x62,0x54,0x84,0x1c,0x44,0x4c,0x80,0x7b
-
-# ATT:   cfcmovew	%dx, 123(%r8,%rax,4)
-# INTEL: cfcmove	word ptr [r8 + 4*rax + 123], dx
-0x62,0xd4,0x7d,0x0c,0x44,0x54,0x80,0x7b
-
-# ATT:   cfcmovel	%ecx, 123(%r8,%rax,4)
-# INTEL: cfcmove	dword ptr [r8 + 4*rax + 123], ecx
-0x62,0xd4,0x7c,0x0c,0x44,0x4c,0x80,0x7b
-
-# ATT:   cfcmoveq	%r9, 123(%r8,%rax,4)
-# INTEL: cfcmove	qword ptr [r8 + 4*rax + 123], r9
-0x62,0x54,0xfc,0x0c,0x44,0x4c,0x80,0x7b
-
-# ATT:   cfcmovew	123(%r8,%rax,4), %dx
-# INTEL: cfcmove	dx, word ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7d,0x08,0x44,0x54,0x80,0x7b
-
-# ATT:   cfcmovel	123(%r8,%rax,4), %ecx
-# INTEL: cfcmove	ecx, dword ptr [r8 + 4*rax + 123]
-0x62,0xd4,0x7c,0x08,0x44,0x4c,0x80,0x7b
-
-# ATT:   cfcmoveq	123(%r8,%rax,4), %r9
-# INTEL: cfcmove	r9, qword ptr [r8 + 4*rax + 123]
-0x62,0x54,0xfc,0x08,0x44,0x4c,0x80,0x7b
-
-# ATT:   cfcmovew	%dx, %ax
-# INTEL: cfcmove	ax, dx
-0x62,0xf4,0x7d,0x08,0x44,0xc2
-
-# ATT:   cfcmovel	%ecx, %edx
-# INTEL: cfcmove	edx, ecx
-0x62,0xf4,0x7c,0x08,0x44,0xd1
-
-# ATT:   cfcmoveq	%r9, %r15
-# INTEL: cfcmove	r15, r9
-0x62,0x54,0xfc,0x08,0x44,0xf9
+# ATT:   cfcmoveq	291(%r28,%r29,4), %r19
+# INTEL: cfcmove	r19, qword ptr [r28 + 4*r29 + 291]
+0x62,0x8c,0xf8,0x08,0x44,0x9c,0xac,0x23,0x01,0x00,0x00
diff --git a/llvm/test/MC/Disassembler/X86/apx/reverse-encoding.txt b/llvm/test/MC/Disassembler/X86/apx/reverse-encoding.txt
index af78b76c09de36..fd12d904a4a46d 100644
--- a/llvm/test/MC/Disassembler/X86/apx/reverse-encoding.txt
+++ b/llvm/test/MC/Disassembler/X86/apx/reverse-encoding.txt
@@ -435,12 +435,12 @@
 
 # ATT:   cfcmovbew	%r16w, %r17w
 # INTEL: cfcmovbe	r17w, r16w
-0x62,0xec,0x7d,0x0c,0x46,0xc1
+0x62,0xec,0x7d,0x08,0x46,0xc8
 
 # ATT:   cfcmovbel	%r16d, %r17d
 # INTEL: cfcmovbe	r17d, r16d
-0x62,0xec,0x7c,0x0c,0x46,0xc1
+0x62,0xec,0x7c,0x08,0x46,0xc8
 
 # ATT:   cfcmovbeq	%r16, %r17
 # INTEL: cfcmovbe	r17, r16
-0x62,0xec,0xfc,0x0c,0x46,0xc1
+0x62,0xec,0xfc,0x08,0x46,0xc8
diff --git a/llvm/test/MC/X86/apx/cfcmov-att.s b/llvm/test/MC/X86/apx/cfcmov-att.s
index fd64559e472df1..a6947ca7bc0deb 100644
--- a/llvm/test/MC/X86/apx/cfcmov-att.s
+++ b/llvm/test/MC/X86/apx/cfcmov-att.s
@@ -1,725 +1,841 @@
-# RUN: llvm-mc -triple x86_64 -show-encoding %s | FileCheck %s
-# RUN: not llvm-mc -triple i386 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR
-
-# ERROR-COUNT-240: error:
-# ERROR-NOT: error:
-# CHECK: cfcmovbw	%dx, %ax, %r9w
-# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x42,0xc2]
-         cfcmovbw	%dx, %ax, %r9w
-# CHECK: cfcmovbl	%ecx, %edx, %r10d
-# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x42,0xd1]
-         cfcmovbl	%ecx, %edx, %r10d
-# CHECK: cfcmovbq	%r9, %r15, %r11
-# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x42,0xf9]
-         cfcmovbq	%r9, %r15, %r11
-# CHECK: cfcmovbw	123(%r8,%rax,4), %dx, %ax
-# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x42,0x54,0x80,0x7b]
-         cfcmovbw	123(%r8,%rax,4), %dx, %ax
-# CHECK: cfcmovbl	123(%r8,%rax,4), %ecx, %edx
-# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x42,0x4c,0x80,0x7b]
-         cfcmovbl	123(%r8,%rax,4), %ecx, %edx
-# CHECK: cfcmovbq	123(%r8,%rax,4), %r9, %r15
-# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x42,0x4c,0x80,0x7b]
-         cfcmovbq	123(%r8,%rax,4), %r9, %r15
-# CHECK: cfcmovbw	%dx, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x42,0x54,0x80,0x7b]
-         cfcmovbw	%dx, 123(%r8,%rax,4)
-# CHECK: cfcmovbl	%ecx, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x42,0x4c,0x80,0x7b]
-         cfcmovbl	%ecx, 123(%r8,%rax,4)
-# CHECK: cfcmovbq	%r9, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x42,0x4c,0x80,0x7b]
-         cfcmovbq	%r9, 123(%r8,%rax,4)
-# CHECK: cfcmovbw	123(%r8,%rax,4), %dx
-# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x42,0x54,0x80,0x7b]
-         cfcmovbw	123(%r8,%rax,4), %dx
-# CHECK: cfcmovbl	123(%r8,%rax,4), %ecx
-# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x42,0x4c,0x80,0x7b]
-         cfcmovbl	123(%r8,%rax,4), %ecx
-# CHECK: cfcmovbq	123(%r8,%rax,4), %r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x42,0x4c,0x80,0x7b]
-         cfcmovbq	123(%r8,%rax,4), %r9
-# CHECK: cfcmovbw	%dx, %ax
-# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x42,0xc2]
-         cfcmovbw	%dx, %ax
-# CHECK: cfcmovbl	%ecx, %edx
-# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x42,0xd1]
-         cfcmovbl	%ecx, %edx
-# CHECK: cfcmovbq	%r9, %r15
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x42,0xf9]
-         cfcmovbq	%r9, %r15
-# CHECK: cfcmovbew	%dx, %ax, %r9w
-# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x46,0xc2]
-         cfcmovbew	%dx, %ax, %r9w
-# CHECK: cfcmovbel	%ecx, %edx, %r10d
-# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x46,0xd1]
-         cfcmovbel	%ecx, %edx, %r10d
-# CHECK: cfcmovbeq	%r9, %r15, %r11
-# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x46,0xf9]
-         cfcmovbeq	%r9, %r15, %r11
-# CHECK: cfcmovbew	123(%r8,%rax,4), %dx, %ax
-# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x46,0x54,0x80,0x7b]
-         cfcmovbew	123(%r8,%rax,4), %dx, %ax
-# CHECK: cfcmovbel	123(%r8,%rax,4), %ecx, %edx
-# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x46,0x4c,0x80,0x7b]
-         cfcmovbel	123(%r8,%rax,4), %ecx, %edx
-# CHECK: cfcmovbeq	123(%r8,%rax,4), %r9, %r15
-# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x46,0x4c,0x80,0x7b]
-         cfcmovbeq	123(%r8,%rax,4), %r9, %r15
-# CHECK: cfcmovbew	%dx, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x46,0x54,0x80,0x7b]
-         cfcmovbew	%dx, 123(%r8,%rax,4)
-# CHECK: cfcmovbel	%ecx, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x46,0x4c,0x80,0x7b]
-         cfcmovbel	%ecx, 123(%r8,%rax,4)
-# CHECK: cfcmovbeq	%r9, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x46,0x4c,0x80,0x7b]
-         cfcmovbeq	%r9, 123(%r8,%rax,4)
-# CHECK: cfcmovbew	123(%r8,%rax,4), %dx
-# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x46,0x54,0x80,0x7b]
-         cfcmovbew	123(%r8,%rax,4), %dx
-# CHECK: cfcmovbel	123(%r8,%rax,4), %ecx
-# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x46,0x4c,0x80,0x7b]
-         cfcmovbel	123(%r8,%rax,4), %ecx
-# CHECK: cfcmovbeq	123(%r8,%rax,4), %r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x46,0x4c,0x80,0x7b]
-         cfcmovbeq	123(%r8,%rax,4), %r9
-# CHECK: cfcmovbew	%dx, %ax
-# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x46,0xc2]
-         cfcmovbew	%dx, %ax
-# CHECK: cfcmovbel	%ecx, %edx
-# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x46,0xd1]
-         cfcmovbel	%ecx, %edx
-# CHECK: cfcmovbeq	%r9, %r15
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x46,0xf9]
-         cfcmovbeq	%r9, %r15
-# CHECK: cfcmovlw	%dx, %ax, %r9w
-# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x4c,0xc2]
-         cfcmovlw	%dx, %ax, %r9w
-# CHECK: cfcmovll	%ecx, %edx, %r10d
-# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x4c,0xd1]
-         cfcmovll	%ecx, %edx, %r10d
-# CHECK: cfcmovlq	%r9, %r15, %r11
-# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x4c,0xf9]
-         cfcmovlq	%r9, %r15, %r11
-# CHECK: cfcmovlw	123(%r8,%rax,4), %dx, %ax
-# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x4c,0x54,0x80,0x7b]
-         cfcmovlw	123(%r8,%rax,4), %dx, %ax
-# CHECK: cfcmovll	123(%r8,%rax,4), %ecx, %edx
-# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x4c,0x4c,0x80,0x7b]
-         cfcmovll	123(%r8,%rax,4), %ecx, %edx
-# CHECK: cfcmovlq	123(%r8,%rax,4), %r9, %r15
-# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x4c,0x4c,0x80,0x7b]
-         cfcmovlq	123(%r8,%rax,4), %r9, %r15
-# CHECK: cfcmovlw	%dx, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x4c,0x54,0x80,0x7b]
-         cfcmovlw	%dx, 123(%r8,%rax,4)
-# CHECK: cfcmovll	%ecx, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x4c,0x4c,0x80,0x7b]
-         cfcmovll	%ecx, 123(%r8,%rax,4)
-# CHECK: cfcmovlq	%r9, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x4c,0x4c,0x80,0x7b]
-         cfcmovlq	%r9, 123(%r8,%rax,4)
-# CHECK: cfcmovlw	123(%r8,%rax,4), %dx
-# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x4c,0x54,0x80,0x7b]
-         cfcmovlw	123(%r8,%rax,4), %dx
-# CHECK: cfcmovll	123(%r8,%rax,4), %ecx
-# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x4c,0x4c,0x80,0x7b]
-         cfcmovll	123(%r8,%rax,4), %ecx
-# CHECK: cfcmovlq	123(%r8,%rax,4), %r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4c,0x4c,0x80,0x7b]
-         cfcmovlq	123(%r8,%rax,4), %r9
-# CHECK: cfcmovlw	%dx, %ax
-# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x4c,0xc2]
-         cfcmovlw	%dx, %ax
-# CHECK: cfcmovll	%ecx, %edx
-# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x4c,0xd1]
-         cfcmovll	%ecx, %edx
-# CHECK: cfcmovlq	%r9, %r15
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4c,0xf9]
-         cfcmovlq	%r9, %r15
-# CHECK: cfcmovlew	%dx, %ax, %r9w
-# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x4e,0xc2]
-         cfcmovlew	%dx, %ax, %r9w
-# CHECK: cfcmovlel	%ecx, %edx, %r10d
-# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x4e,0xd1]
-         cfcmovlel	%ecx, %edx, %r10d
-# CHECK: cfcmovleq	%r9, %r15, %r11
-# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x4e,0xf9]
-         cfcmovleq	%r9, %r15, %r11
-# CHECK: cfcmovlew	123(%r8,%rax,4), %dx, %ax
-# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x4e,0x54,0x80,0x7b]
-         cfcmovlew	123(%r8,%rax,4), %dx, %ax
-# CHECK: cfcmovlel	123(%r8,%rax,4), %ecx, %edx
-# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x4e,0x4c,0x80,0x7b]
-         cfcmovlel	123(%r8,%rax,4), %ecx, %edx
-# CHECK: cfcmovleq	123(%r8,%rax,4), %r9, %r15
-# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x4e,0x4c,0x80,0x7b]
-         cfcmovleq	123(%r8,%rax,4), %r9, %r15
-# CHECK: cfcmovlew	%dx, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x4e,0x54,0x80,0x7b]
-         cfcmovlew	%dx, 123(%r8,%rax,4)
-# CHECK: cfcmovlel	%ecx, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x4e,0x4c,0x80,0x7b]
-         cfcmovlel	%ecx, 123(%r8,%rax,4)
-# CHECK: cfcmovleq	%r9, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x4e,0x4c,0x80,0x7b]
-         cfcmovleq	%r9, 123(%r8,%rax,4)
-# CHECK: cfcmovlew	123(%r8,%rax,4), %dx
-# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x4e,0x54,0x80,0x7b]
-         cfcmovlew	123(%r8,%rax,4), %dx
-# CHECK: cfcmovlel	123(%r8,%rax,4), %ecx
-# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x4e,0x4c,0x80,0x7b]
-         cfcmovlel	123(%r8,%rax,4), %ecx
-# CHECK: cfcmovleq	123(%r8,%rax,4), %r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4e,0x4c,0x80,0x7b]
-         cfcmovleq	123(%r8,%rax,4), %r9
-# CHECK: cfcmovlew	%dx, %ax
-# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x4e,0xc2]
-         cfcmovlew	%dx, %ax
-# CHECK: cfcmovlel	%ecx, %edx
-# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x4e,0xd1]
-         cfcmovlel	%ecx, %edx
-# CHECK: cfcmovleq	%r9, %r15
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4e,0xf9]
-         cfcmovleq	%r9, %r15
-# CHECK: cfcmovaew	%dx, %ax, %r9w
-# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x43,0xc2]
-         cfcmovaew	%dx, %ax, %r9w
-# CHECK: cfcmovael	%ecx, %edx, %r10d
-# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x43,0xd1]
-         cfcmovael	%ecx, %edx, %r10d
-# CHECK: cfcmovaeq	%r9, %r15, %r11
-# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x43,0xf9]
-         cfcmovaeq	%r9, %r15, %r11
-# CHECK: cfcmovaew	123(%r8,%rax,4), %dx, %ax
-# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x43,0x54,0x80,0x7b]
-         cfcmovaew	123(%r8,%rax,4), %dx, %ax
-# CHECK: cfcmovael	123(%r8,%rax,4), %ecx, %edx
-# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x43,0x4c,0x80,0x7b]
-         cfcmovael	123(%r8,%rax,4), %ecx, %edx
-# CHECK: cfcmovaeq	123(%r8,%rax,4), %r9, %r15
-# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x43,0x4c,0x80,0x7b]
-         cfcmovaeq	123(%r8,%rax,4), %r9, %r15
-# CHECK: cfcmovaew	%dx, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x43,0x54,0x80,0x7b]
-         cfcmovaew	%dx, 123(%r8,%rax,4)
-# CHECK: cfcmovael	%ecx, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x43,0x4c,0x80,0x7b]
-         cfcmovael	%ecx, 123(%r8,%rax,4)
-# CHECK: cfcmovaeq	%r9, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x43,0x4c,0x80,0x7b]
-         cfcmovaeq	%r9, 123(%r8,%rax,4)
-# CHECK: cfcmovaew	123(%r8,%rax,4), %dx
-# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x43,0x54,0x80,0x7b]
-         cfcmovaew	123(%r8,%rax,4), %dx
-# CHECK: cfcmovael	123(%r8,%rax,4), %ecx
-# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x43,0x4c,0x80,0x7b]
-         cfcmovael	123(%r8,%rax,4), %ecx
-# CHECK: cfcmovaeq	123(%r8,%rax,4), %r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x43,0x4c,0x80,0x7b]
-         cfcmovaeq	123(%r8,%rax,4), %r9
-# CHECK: cfcmovaew	%dx, %ax
-# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x43,0xc2]
-         cfcmovaew	%dx, %ax
-# CHECK: cfcmovael	%ecx, %edx
-# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x43,0xd1]
-         cfcmovael	%ecx, %edx
-# CHECK: cfcmovaeq	%r9, %r15
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x43,0xf9]
-         cfcmovaeq	%r9, %r15
-# CHECK: cfcmovaw	%dx, %ax, %r9w
-# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x47,0xc2]
-         cfcmovaw	%dx, %ax, %r9w
-# CHECK: cfcmoval	%ecx, %edx, %r10d
-# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x47,0xd1]
-         cfcmoval	%ecx, %edx, %r10d
-# CHECK: cfcmovaq	%r9, %r15, %r11
-# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x47,0xf9]
-         cfcmovaq	%r9, %r15, %r11
-# CHECK: cfcmovaw	123(%r8,%rax,4), %dx, %ax
-# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x47,0x54,0x80,0x7b]
-         cfcmovaw	123(%r8,%rax,4), %dx, %ax
-# CHECK: cfcmoval	123(%r8,%rax,4), %ecx, %edx
-# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x47,0x4c,0x80,0x7b]
-         cfcmoval	123(%r8,%rax,4), %ecx, %edx
-# CHECK: cfcmovaq	123(%r8,%rax,4), %r9, %r15
-# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x47,0x4c,0x80,0x7b]
-         cfcmovaq	123(%r8,%rax,4), %r9, %r15
-# CHECK: cfcmovaw	%dx, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x47,0x54,0x80,0x7b]
-         cfcmovaw	%dx, 123(%r8,%rax,4)
-# CHECK: cfcmoval	%ecx, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x47,0x4c,0x80,0x7b]
-         cfcmoval	%ecx, 123(%r8,%rax,4)
-# CHECK: cfcmovaq	%r9, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x47,0x4c,0x80,0x7b]
-         cfcmovaq	%r9, 123(%r8,%rax,4)
-# CHECK: cfcmovaw	123(%r8,%rax,4), %dx
-# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x47,0x54,0x80,0x7b]
-         cfcmovaw	123(%r8,%rax,4), %dx
-# CHECK: cfcmoval	123(%r8,%rax,4), %ecx
-# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x47,0x4c,0x80,0x7b]
-         cfcmoval	123(%r8,%rax,4), %ecx
-# CHECK: cfcmovaq	123(%r8,%rax,4), %r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x47,0x4c,0x80,0x7b]
-         cfcmovaq	123(%r8,%rax,4), %r9
-# CHECK: cfcmovaw	%dx, %ax
-# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x47,0xc2]
-         cfcmovaw	%dx, %ax
-# CHECK: cfcmoval	%ecx, %edx
-# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x47,0xd1]
-         cfcmoval	%ecx, %edx
-# CHECK: cfcmovaq	%r9, %r15
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x47,0xf9]
-         cfcmovaq	%r9, %r15
-# CHECK: cfcmovgew	%dx, %ax, %r9w
-# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x4d,0xc2]
-         cfcmovgew	%dx, %ax, %r9w
-# CHECK: cfcmovgel	%ecx, %edx, %r10d
-# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x4d,0xd1]
-         cfcmovgel	%ecx, %edx, %r10d
-# CHECK: cfcmovgeq	%r9, %r15, %r11
-# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x4d,0xf9]
-         cfcmovgeq	%r9, %r15, %r11
-# CHECK: cfcmovgew	123(%r8,%rax,4), %dx, %ax
-# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x4d,0x54,0x80,0x7b]
-         cfcmovgew	123(%r8,%rax,4), %dx, %ax
-# CHECK: cfcmovgel	123(%r8,%rax,4), %ecx, %edx
-# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x4d,0x4c,0x80,0x7b]
-         cfcmovgel	123(%r8,%rax,4), %ecx, %edx
-# CHECK: cfcmovgeq	123(%r8,%rax,4), %r9, %r15
-# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x4d,0x4c,0x80,0x7b]
-         cfcmovgeq	123(%r8,%rax,4), %r9, %r15
-# CHECK: cfcmovgew	%dx, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x4d,0x54,0x80,0x7b]
-         cfcmovgew	%dx, 123(%r8,%rax,4)
-# CHECK: cfcmovgel	%ecx, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x4d,0x4c,0x80,0x7b]
-         cfcmovgel	%ecx, 123(%r8,%rax,4)
-# CHECK: cfcmovgeq	%r9, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x4d,0x4c,0x80,0x7b]
-         cfcmovgeq	%r9, 123(%r8,%rax,4)
-# CHECK: cfcmovgew	123(%r8,%rax,4), %dx
-# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x4d,0x54,0x80,0x7b]
-         cfcmovgew	123(%r8,%rax,4), %dx
-# CHECK: cfcmovgel	123(%r8,%rax,4), %ecx
-# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x4d,0x4c,0x80,0x7b]
-         cfcmovgel	123(%r8,%rax,4), %ecx
-# CHECK: cfcmovgeq	123(%r8,%rax,4), %r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4d,0x4c,0x80,0x7b]
-         cfcmovgeq	123(%r8,%rax,4), %r9
-# CHECK: cfcmovgew	%dx, %ax
-# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x4d,0xc2]
-         cfcmovgew	%dx, %ax
-# CHECK: cfcmovgel	%ecx, %edx
-# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x4d,0xd1]
-         cfcmovgel	%ecx, %edx
-# CHECK: cfcmovgeq	%r9, %r15
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4d,0xf9]
-         cfcmovgeq	%r9, %r15
-# CHECK: cfcmovgw	%dx, %ax, %r9w
-# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x4f,0xc2]
-         cfcmovgw	%dx, %ax, %r9w
-# CHECK: cfcmovgl	%ecx, %edx, %r10d
-# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x4f,0xd1]
-         cfcmovgl	%ecx, %edx, %r10d
-# CHECK: cfcmovgq	%r9, %r15, %r11
-# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x4f,0xf9]
-         cfcmovgq	%r9, %r15, %r11
-# CHECK: cfcmovgw	123(%r8,%rax,4), %dx, %ax
-# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x4f,0x54,0x80,0x7b]
-         cfcmovgw	123(%r8,%rax,4), %dx, %ax
-# CHECK: cfcmovgl	123(%r8,%rax,4), %ecx, %edx
-# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x4f,0x4c,0x80,0x7b]
-         cfcmovgl	123(%r8,%rax,4), %ecx, %edx
-# CHECK: cfcmovgq	123(%r8,%rax,4), %r9, %r15
-# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x4f,0x4c,0x80,0x7b]
-         cfcmovgq	123(%r8,%rax,4), %r9, %r15
-# CHECK: cfcmovgw	%dx, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x4f,0x54,0x80,0x7b]
-         cfcmovgw	%dx, 123(%r8,%rax,4)
-# CHECK: cfcmovgl	%ecx, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x4f,0x4c,0x80,0x7b]
-         cfcmovgl	%ecx, 123(%r8,%rax,4)
-# CHECK: cfcmovgq	%r9, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x4f,0x4c,0x80,0x7b]
-         cfcmovgq	%r9, 123(%r8,%rax,4)
-# CHECK: cfcmovgw	123(%r8,%rax,4), %dx
-# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x4f,0x54,0x80,0x7b]
-         cfcmovgw	123(%r8,%rax,4), %dx
-# CHECK: cfcmovgl	123(%r8,%rax,4), %ecx
-# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x4f,0x4c,0x80,0x7b]
-         cfcmovgl	123(%r8,%rax,4), %ecx
-# CHECK: cfcmovgq	123(%r8,%rax,4), %r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4f,0x4c,0x80,0x7b]
-         cfcmovgq	123(%r8,%rax,4), %r9
-# CHECK: cfcmovgw	%dx, %ax
-# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x4f,0xc2]
-         cfcmovgw	%dx, %ax
-# CHECK: cfcmovgl	%ecx, %edx
-# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x4f,0xd1]
-         cfcmovgl	%ecx, %edx
-# CHECK: cfcmovgq	%r9, %r15
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4f,0xf9]
-         cfcmovgq	%r9, %r15
-# CHECK: cfcmovnow	%dx, %ax, %r9w
-# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x41,0xc2]
-         cfcmovnow	%dx, %ax, %r9w
-# CHECK: cfcmovnol	%ecx, %edx, %r10d
-# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x41,0xd1]
-         cfcmovnol	%ecx, %edx, %r10d
-# CHECK: cfcmovnoq	%r9, %r15, %r11
-# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x41,0xf9]
-         cfcmovnoq	%r9, %r15, %r11
-# CHECK: cfcmovnow	123(%r8,%rax,4), %dx, %ax
-# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x41,0x54,0x80,0x7b]
-         cfcmovnow	123(%r8,%rax,4), %dx, %ax
-# CHECK: cfcmovnol	123(%r8,%rax,4), %ecx, %edx
-# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x41,0x4c,0x80,0x7b]
-         cfcmovnol	123(%r8,%rax,4), %ecx, %edx
-# CHECK: cfcmovnoq	123(%r8,%rax,4), %r9, %r15
-# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x41,0x4c,0x80,0x7b]
-         cfcmovnoq	123(%r8,%rax,4), %r9, %r15
-# CHECK: cfcmovnow	%dx, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x41,0x54,0x80,0x7b]
-         cfcmovnow	%dx, 123(%r8,%rax,4)
-# CHECK: cfcmovnol	%ecx, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x41,0x4c,0x80,0x7b]
-         cfcmovnol	%ecx, 123(%r8,%rax,4)
-# CHECK: cfcmovnoq	%r9, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x41,0x4c,0x80,0x7b]
-         cfcmovnoq	%r9, 123(%r8,%rax,4)
-# CHECK: cfcmovnow	123(%r8,%rax,4), %dx
-# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x41,0x54,0x80,0x7b]
-         cfcmovnow	123(%r8,%rax,4), %dx
-# CHECK: cfcmovnol	123(%r8,%rax,4), %ecx
-# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x41,0x4c,0x80,0x7b]
-         cfcmovnol	123(%r8,%rax,4), %ecx
-# CHECK: cfcmovnoq	123(%r8,%rax,4), %r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x41,0x4c,0x80,0x7b]
-         cfcmovnoq	123(%r8,%rax,4), %r9
-# CHECK: cfcmovnow	%dx, %ax
-# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x41,0xc2]
-         cfcmovnow	%dx, %ax
-# CHECK: cfcmovnol	%ecx, %edx
-# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x41,0xd1]
-         cfcmovnol	%ecx, %edx
-# CHECK: cfcmovnoq	%r9, %r15
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x41,0xf9]
-         cfcmovnoq	%r9, %r15
-# CHECK: cfcmovnpw	%dx, %ax, %r9w
-# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x4b,0xc2]
-         cfcmovnpw	%dx, %ax, %r9w
-# CHECK: cfcmovnpl	%ecx, %edx, %r10d
-# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x4b,0xd1]
-         cfcmovnpl	%ecx, %edx, %r10d
-# CHECK: cfcmovnpq	%r9, %r15, %r11
-# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x4b,0xf9]
-         cfcmovnpq	%r9, %r15, %r11
-# CHECK: cfcmovnpw	123(%r8,%rax,4), %dx, %ax
-# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x4b,0x54,0x80,0x7b]
-         cfcmovnpw	123(%r8,%rax,4), %dx, %ax
-# CHECK: cfcmovnpl	123(%r8,%rax,4), %ecx, %edx
-# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x4b,0x4c,0x80,0x7b]
-         cfcmovnpl	123(%r8,%rax,4), %ecx, %edx
-# CHECK: cfcmovnpq	123(%r8,%rax,4), %r9, %r15
-# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x4b,0x4c,0x80,0x7b]
-         cfcmovnpq	123(%r8,%rax,4), %r9, %r15
-# CHECK: cfcmovnpw	%dx, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x4b,0x54,0x80,0x7b]
-         cfcmovnpw	%dx, 123(%r8,%rax,4)
-# CHECK: cfcmovnpl	%ecx, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x4b,0x4c,0x80,0x7b]
-         cfcmovnpl	%ecx, 123(%r8,%rax,4)
-# CHECK: cfcmovnpq	%r9, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x4b,0x4c,0x80,0x7b]
-         cfcmovnpq	%r9, 123(%r8,%rax,4)
-# CHECK: cfcmovnpw	123(%r8,%rax,4), %dx
-# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x4b,0x54,0x80,0x7b]
-         cfcmovnpw	123(%r8,%rax,4), %dx
-# CHECK: cfcmovnpl	123(%r8,%rax,4), %ecx
-# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x4b,0x4c,0x80,0x7b]
-         cfcmovnpl	123(%r8,%rax,4), %ecx
-# CHECK: cfcmovnpq	123(%r8,%rax,4), %r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4b,0x4c,0x80,0x7b]
-         cfcmovnpq	123(%r8,%rax,4), %r9
-# CHECK: cfcmovnpw	%dx, %ax
-# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x4b,0xc2]
-         cfcmovnpw	%dx, %ax
-# CHECK: cfcmovnpl	%ecx, %edx
-# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x4b,0xd1]
-         cfcmovnpl	%ecx, %edx
-# CHECK: cfcmovnpq	%r9, %r15
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4b,0xf9]
-         cfcmovnpq	%r9, %r15
-# CHECK: cfcmovnsw	%dx, %ax, %r9w
-# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x49,0xc2]
-         cfcmovnsw	%dx, %ax, %r9w
-# CHECK: cfcmovnsl	%ecx, %edx, %r10d
-# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x49,0xd1]
-         cfcmovnsl	%ecx, %edx, %r10d
-# CHECK: cfcmovnsq	%r9, %r15, %r11
-# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x49,0xf9]
-         cfcmovnsq	%r9, %r15, %r11
-# CHECK: cfcmovnsw	123(%r8,%rax,4), %dx, %ax
-# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x49,0x54,0x80,0x7b]
-         cfcmovnsw	123(%r8,%rax,4), %dx, %ax
-# CHECK: cfcmovnsl	123(%r8,%rax,4), %ecx, %edx
-# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x49,0x4c,0x80,0x7b]
-         cfcmovnsl	123(%r8,%rax,4), %ecx, %edx
-# CHECK: cfcmovnsq	123(%r8,%rax,4), %r9, %r15
-# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x49,0x4c,0x80,0x7b]
-         cfcmovnsq	123(%r8,%rax,4), %r9, %r15
-# CHECK: cfcmovnsw	%dx, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x49,0x54,0x80,0x7b]
-         cfcmovnsw	%dx, 123(%r8,%rax,4)
-# CHECK: cfcmovnsl	%ecx, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x49,0x4c,0x80,0x7b]
-         cfcmovnsl	%ecx, 123(%r8,%rax,4)
-# CHECK: cfcmovnsq	%r9, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x49,0x4c,0x80,0x7b]
-         cfcmovnsq	%r9, 123(%r8,%rax,4)
-# CHECK: cfcmovnsw	123(%r8,%rax,4), %dx
-# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x49,0x54,0x80,0x7b]
-         cfcmovnsw	123(%r8,%rax,4), %dx
-# CHECK: cfcmovnsl	123(%r8,%rax,4), %ecx
-# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x49,0x4c,0x80,0x7b]
-         cfcmovnsl	123(%r8,%rax,4), %ecx
-# CHECK: cfcmovnsq	123(%r8,%rax,4), %r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x49,0x4c,0x80,0x7b]
-         cfcmovnsq	123(%r8,%rax,4), %r9
-# CHECK: cfcmovnsw	%dx, %ax
-# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x49,0xc2]
-         cfcmovnsw	%dx, %ax
-# CHECK: cfcmovnsl	%ecx, %edx
-# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x49,0xd1]
-         cfcmovnsl	%ecx, %edx
-# CHECK: cfcmovnsq	%r9, %r15
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x49,0xf9]
-         cfcmovnsq	%r9, %r15
-# CHECK: cfcmovnew	%dx, %ax, %r9w
-# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x45,0xc2]
-         cfcmovnew	%dx, %ax, %r9w
-# CHECK: cfcmovnel	%ecx, %edx, %r10d
-# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x45,0xd1]
-         cfcmovnel	%ecx, %edx, %r10d
-# CHECK: cfcmovneq	%r9, %r15, %r11
-# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x45,0xf9]
-         cfcmovneq	%r9, %r15, %r11
-# CHECK: cfcmovnew	123(%r8,%rax,4), %dx, %ax
-# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x45,0x54,0x80,0x7b]
-         cfcmovnew	123(%r8,%rax,4), %dx, %ax
-# CHECK: cfcmovnel	123(%r8,%rax,4), %ecx, %edx
-# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x45,0x4c,0x80,0x7b]
-         cfcmovnel	123(%r8,%rax,4), %ecx, %edx
-# CHECK: cfcmovneq	123(%r8,%rax,4), %r9, %r15
-# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x45,0x4c,0x80,0x7b]
-         cfcmovneq	123(%r8,%rax,4), %r9, %r15
-# CHECK: cfcmovnew	%dx, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x45,0x54,0x80,0x7b]
-         cfcmovnew	%dx, 123(%r8,%rax,4)
-# CHECK: cfcmovnel	%ecx, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x45,0x4c,0x80,0x7b]
-         cfcmovnel	%ecx, 123(%r8,%rax,4)
-# CHECK: cfcmovneq	%r9, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x45,0x4c,0x80,0x7b]
-         cfcmovneq	%r9, 123(%r8,%rax,4)
-# CHECK: cfcmovnew	123(%r8,%rax,4), %dx
-# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x45,0x54,0x80,0x7b]
-         cfcmovnew	123(%r8,%rax,4), %dx
-# CHECK: cfcmovnel	123(%r8,%rax,4), %ecx
-# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x45,0x4c,0x80,0x7b]
-         cfcmovnel	123(%r8,%rax,4), %ecx
-# CHECK: cfcmovneq	123(%r8,%rax,4), %r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x45,0x4c,0x80,0x7b]
-         cfcmovneq	123(%r8,%rax,4), %r9
-# CHECK: cfcmovnew	%dx, %ax
-# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x45,0xc2]
-         cfcmovnew	%dx, %ax
-# CHECK: cfcmovnel	%ecx, %edx
-# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x45,0xd1]
-         cfcmovnel	%ecx, %edx
-# CHECK: cfcmovneq	%r9, %r15
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x45,0xf9]
-         cfcmovneq	%r9, %r15
-# CHECK: cfcmovow	%dx, %ax, %r9w
-# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x40,0xc2]
-         cfcmovow	%dx, %ax, %r9w
-# CHECK: cfcmovol	%ecx, %edx, %r10d
-# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x40,0xd1]
-         cfcmovol	%ecx, %edx, %r10d
-# CHECK: cfcmovoq	%r9, %r15, %r11
-# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x40,0xf9]
-         cfcmovoq	%r9, %r15, %r11
-# CHECK: cfcmovow	123(%r8,%rax,4), %dx, %ax
-# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x40,0x54,0x80,0x7b]
-         cfcmovow	123(%r8,%rax,4), %dx, %ax
-# CHECK: cfcmovol	123(%r8,%rax,4), %ecx, %edx
-# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x40,0x4c,0x80,0x7b]
-         cfcmovol	123(%r8,%rax,4), %ecx, %edx
-# CHECK: cfcmovoq	123(%r8,%rax,4), %r9, %r15
-# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x40,0x4c,0x80,0x7b]
-         cfcmovoq	123(%r8,%rax,4), %r9, %r15
-# CHECK: cfcmovow	%dx, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x40,0x54,0x80,0x7b]
-         cfcmovow	%dx, 123(%r8,%rax,4)
-# CHECK: cfcmovol	%ecx, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x40,0x4c,0x80,0x7b]
-         cfcmovol	%ecx, 123(%r8,%rax,4)
-# CHECK: cfcmovoq	%r9, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x40,0x4c,0x80,0x7b]
-         cfcmovoq	%r9, 123(%r8,%rax,4)
-# CHECK: cfcmovow	123(%r8,%rax,4), %dx
-# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x40,0x54,0x80,0x7b]
-         cfcmovow	123(%r8,%rax,4), %dx
-# CHECK: cfcmovol	123(%r8,%rax,4), %ecx
-# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x40,0x4c,0x80,0x7b]
-         cfcmovol	123(%r8,%rax,4), %ecx
-# CHECK: cfcmovoq	123(%r8,%rax,4), %r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x40,0x4c,0x80,0x7b]
-         cfcmovoq	123(%r8,%rax,4), %r9
-# CHECK: cfcmovow	%dx, %ax
-# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x40,0xc2]
-         cfcmovow	%dx, %ax
-# CHECK: cfcmovol	%ecx, %edx
-# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x40,0xd1]
-         cfcmovol	%ecx, %edx
-# CHECK: cfcmovoq	%r9, %r15
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x40,0xf9]
-         cfcmovoq	%r9, %r15
-# CHECK: cfcmovpw	%dx, %ax, %r9w
-# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x4a,0xc2]
-         cfcmovpw	%dx, %ax, %r9w
-# CHECK: cfcmovpl	%ecx, %edx, %r10d
-# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x4a,0xd1]
-         cfcmovpl	%ecx, %edx, %r10d
-# CHECK: cfcmovpq	%r9, %r15, %r11
-# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x4a,0xf9]
-         cfcmovpq	%r9, %r15, %r11
-# CHECK: cfcmovpw	123(%r8,%rax,4), %dx, %ax
-# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x4a,0x54,0x80,0x7b]
-         cfcmovpw	123(%r8,%rax,4), %dx, %ax
-# CHECK: cfcmovpl	123(%r8,%rax,4), %ecx, %edx
-# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x4a,0x4c,0x80,0x7b]
-         cfcmovpl	123(%r8,%rax,4), %ecx, %edx
-# CHECK: cfcmovpq	123(%r8,%rax,4), %r9, %r15
-# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x4a,0x4c,0x80,0x7b]
-         cfcmovpq	123(%r8,%rax,4), %r9, %r15
-# CHECK: cfcmovpw	%dx, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x4a,0x54,0x80,0x7b]
-         cfcmovpw	%dx, 123(%r8,%rax,4)
-# CHECK: cfcmovpl	%ecx, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x4a,0x4c,0x80,0x7b]
-         cfcmovpl	%ecx, 123(%r8,%rax,4)
-# CHECK: cfcmovpq	%r9, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x4a,0x4c,0x80,0x7b]
-         cfcmovpq	%r9, 123(%r8,%rax,4)
-# CHECK: cfcmovpw	123(%r8,%rax,4), %dx
-# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x4a,0x54,0x80,0x7b]
-         cfcmovpw	123(%r8,%rax,4), %dx
-# CHECK: cfcmovpl	123(%r8,%rax,4), %ecx
-# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x4a,0x4c,0x80,0x7b]
-         cfcmovpl	123(%r8,%rax,4), %ecx
-# CHECK: cfcmovpq	123(%r8,%rax,4), %r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4a,0x4c,0x80,0x7b]
-         cfcmovpq	123(%r8,%rax,4), %r9
-# CHECK: cfcmovpw	%dx, %ax
-# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x4a,0xc2]
-         cfcmovpw	%dx, %ax
-# CHECK: cfcmovpl	%ecx, %edx
-# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x4a,0xd1]
-         cfcmovpl	%ecx, %edx
-# CHECK: cfcmovpq	%r9, %r15
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4a,0xf9]
-         cfcmovpq	%r9, %r15
-# CHECK: cfcmovsw	%dx, %ax, %r9w
-# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x48,0xc2]
-         cfcmovsw	%dx, %ax, %r9w
-# CHECK: cfcmovsl	%ecx, %edx, %r10d
-# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x48,0xd1]
-         cfcmovsl	%ecx, %edx, %r10d
-# CHECK: cfcmovsq	%r9, %r15, %r11
-# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x48,0xf9]
-         cfcmovsq	%r9, %r15, %r11
-# CHECK: cfcmovsw	123(%r8,%rax,4), %dx, %ax
-# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x48,0x54,0x80,0x7b]
-         cfcmovsw	123(%r8,%rax,4), %dx, %ax
-# CHECK: cfcmovsl	123(%r8,%rax,4), %ecx, %edx
-# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x48,0x4c,0x80,0x7b]
-         cfcmovsl	123(%r8,%rax,4), %ecx, %edx
-# CHECK: cfcmovsq	123(%r8,%rax,4), %r9, %r15
-# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x48,0x4c,0x80,0x7b]
-         cfcmovsq	123(%r8,%rax,4), %r9, %r15
-# CHECK: cfcmovsw	%dx, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x48,0x54,0x80,0x7b]
-         cfcmovsw	%dx, 123(%r8,%rax,4)
-# CHECK: cfcmovsl	%ecx, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x48,0x4c,0x80,0x7b]
-         cfcmovsl	%ecx, 123(%r8,%rax,4)
-# CHECK: cfcmovsq	%r9, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x48,0x4c,0x80,0x7b]
-         cfcmovsq	%r9, 123(%r8,%rax,4)
-# CHECK: cfcmovsw	123(%r8,%rax,4), %dx
-# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x48,0x54,0x80,0x7b]
-         cfcmovsw	123(%r8,%rax,4), %dx
-# CHECK: cfcmovsl	123(%r8,%rax,4), %ecx
-# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x48,0x4c,0x80,0x7b]
-         cfcmovsl	123(%r8,%rax,4), %ecx
-# CHECK: cfcmovsq	123(%r8,%rax,4), %r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x48,0x4c,0x80,0x7b]
-         cfcmovsq	123(%r8,%rax,4), %r9
-# CHECK: cfcmovsw	%dx, %ax
-# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x48,0xc2]
-         cfcmovsw	%dx, %ax
-# CHECK: cfcmovsl	%ecx, %edx
-# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x48,0xd1]
-         cfcmovsl	%ecx, %edx
-# CHECK: cfcmovsq	%r9, %r15
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x48,0xf9]
-         cfcmovsq	%r9, %r15
-# CHECK: cfcmovew	%dx, %ax, %r9w
-# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x44,0xc2]
-         cfcmovew	%dx, %ax, %r9w
-# CHECK: cfcmovel	%ecx, %edx, %r10d
-# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x44,0xd1]
-         cfcmovel	%ecx, %edx, %r10d
-# CHECK: cfcmoveq	%r9, %r15, %r11
-# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x44,0xf9]
-         cfcmoveq	%r9, %r15, %r11
-# CHECK: cfcmovew	123(%r8,%rax,4), %dx, %ax
-# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x44,0x54,0x80,0x7b]
-         cfcmovew	123(%r8,%rax,4), %dx, %ax
-# CHECK: cfcmovel	123(%r8,%rax,4), %ecx, %edx
-# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x44,0x4c,0x80,0x7b]
-         cfcmovel	123(%r8,%rax,4), %ecx, %edx
-# CHECK: cfcmoveq	123(%r8,%rax,4), %r9, %r15
-# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x44,0x4c,0x80,0x7b]
-         cfcmoveq	123(%r8,%rax,4), %r9, %r15
-# CHECK: cfcmovew	%dx, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x44,0x54,0x80,0x7b]
-         cfcmovew	%dx, 123(%r8,%rax,4)
-# CHECK: cfcmovel	%ecx, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x44,0x4c,0x80,0x7b]
-         cfcmovel	%ecx, 123(%r8,%rax,4)
-# CHECK: cfcmoveq	%r9, 123(%r8,%rax,4)
-# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x44,0x4c,0x80,0x7b]
-         cfcmoveq	%r9, 123(%r8,%rax,4)
-# CHECK: cfcmovew	123(%r8,%rax,4), %dx
-# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x44,0x54,0x80,0x7b]
-         cfcmovew	123(%r8,%rax,4), %dx
-# CHECK: cfcmovel	123(%r8,%rax,4), %ecx
-# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x44,0x4c,0x80,0x7b]
-         cfcmovel	123(%r8,%rax,4), %ecx
-# CHECK: cfcmoveq	123(%r8,%rax,4), %r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x44,0x4c,0x80,0x7b]
-         cfcmoveq	123(%r8,%rax,4), %r9
-# CHECK: cfcmovew	%dx, %ax
-# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x44,0xc2]
-         cfcmovew	%dx, %ax
-# CHECK: cfcmovel	%ecx, %edx
-# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x44,0xd1]
-         cfcmovel	%ecx, %edx
-# CHECK: cfcmoveq	%r9, %r15
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x44,0xf9]
-         cfcmoveq	%r9, %r15
+# RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
+
+# CHECK: cfcmovbw	%r17w, %r21w, %r25w
+# CHECK: encoding: [0x62,0xec,0x35,0x14,0x42,0xe9]
+         cfcmovbw	%r17w, %r21w, %r25w
+
+# CHECK: cfcmovbw	%r17w, %r21w
+# CHECK: encoding: [0x62,0xec,0x7d,0x0c,0x42,0xcd]
+         cfcmovbw	%r17w, %r21w
+
+# CHECK: cfcmovbw	%r17w, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0x79,0x0c,0x42,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovbw	%r17w, 291(%r28,%r29,4)
+
+# CHECK: cfcmovbl	%r18d, %r22d, %r26d
+# CHECK: encoding: [0x62,0xec,0x2c,0x14,0x42,0xf2]
+         cfcmovbl	%r18d, %r22d, %r26d
+
+# CHECK: cfcmovbl	%r18d, %r22d
+# CHECK: encoding: [0x62,0xec,0x7c,0x0c,0x42,0xd6]
+         cfcmovbl	%r18d, %r22d
+
+# CHECK: cfcmovbl	%r18d, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0x78,0x0c,0x42,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovbl	%r18d, 291(%r28,%r29,4)
+
+# CHECK: cfcmovbq	%r19, %r23, %r27
+# CHECK: encoding: [0x62,0xec,0xa4,0x14,0x42,0xfb]
+         cfcmovbq	%r19, %r23, %r27
+
+# CHECK: cfcmovbq	%r19, %r23
+# CHECK: encoding: [0x62,0xec,0xfc,0x0c,0x42,0xdf]
+         cfcmovbq	%r19, %r23
+
+# CHECK: cfcmovbq	%r19, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0xf8,0x0c,0x42,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovbq	%r19, 291(%r28,%r29,4)
+
+# CHECK: cfcmovbw	291(%r28,%r29,4), %r17w, %r21w
+# CHECK: encoding: [0x62,0x8c,0x51,0x14,0x42,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovbw	291(%r28,%r29,4), %r17w, %r21w
+
+# CHECK: cfcmovbw	291(%r28,%r29,4), %r17w
+# CHECK: encoding: [0x62,0x8c,0x79,0x08,0x42,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovbw	291(%r28,%r29,4), %r17w
+
+# CHECK: cfcmovbl	291(%r28,%r29,4), %r18d, %r22d
+# CHECK: encoding: [0x62,0x8c,0x48,0x14,0x42,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovbl	291(%r28,%r29,4), %r18d, %r22d
+
+# CHECK: cfcmovbl	291(%r28,%r29,4), %r18d
+# CHECK: encoding: [0x62,0x8c,0x78,0x08,0x42,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovbl	291(%r28,%r29,4), %r18d
+
+# CHECK: cfcmovbq	291(%r28,%r29,4), %r19, %r23
+# CHECK: encoding: [0x62,0x8c,0xc0,0x14,0x42,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovbq	291(%r28,%r29,4), %r19, %r23
+
+# CHECK: cfcmovbq	291(%r28,%r29,4), %r19
+# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0x42,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovbq	291(%r28,%r29,4), %r19
+
+# CHECK: cfcmovbew	%r17w, %r21w, %r25w
+# CHECK: encoding: [0x62,0xec,0x35,0x14,0x46,0xe9]
+         cfcmovbew	%r17w, %r21w, %r25w
+
+# CHECK: cfcmovbew	%r17w, %r21w
+# CHECK: encoding: [0x62,0xec,0x7d,0x0c,0x46,0xcd]
+         cfcmovbew	%r17w, %r21w
+
+# CHECK: cfcmovbew	%r17w, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0x79,0x0c,0x46,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovbew	%r17w, 291(%r28,%r29,4)
+
+# CHECK: cfcmovbel	%r18d, %r22d, %r26d
+# CHECK: encoding: [0x62,0xec,0x2c,0x14,0x46,0xf2]
+         cfcmovbel	%r18d, %r22d, %r26d
+
+# CHECK: cfcmovbel	%r18d, %r22d
+# CHECK: encoding: [0x62,0xec,0x7c,0x0c,0x46,0xd6]
+         cfcmovbel	%r18d, %r22d
+
+# CHECK: cfcmovbel	%r18d, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0x78,0x0c,0x46,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovbel	%r18d, 291(%r28,%r29,4)
+
+# CHECK: cfcmovbeq	%r19, %r23, %r27
+# CHECK: encoding: [0x62,0xec,0xa4,0x14,0x46,0xfb]
+         cfcmovbeq	%r19, %r23, %r27
+
+# CHECK: cfcmovbeq	%r19, %r23
+# CHECK: encoding: [0x62,0xec,0xfc,0x0c,0x46,0xdf]
+         cfcmovbeq	%r19, %r23
+
+# CHECK: cfcmovbeq	%r19, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0xf8,0x0c,0x46,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovbeq	%r19, 291(%r28,%r29,4)
+
+# CHECK: cfcmovbew	291(%r28,%r29,4), %r17w, %r21w
+# CHECK: encoding: [0x62,0x8c,0x51,0x14,0x46,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovbew	291(%r28,%r29,4), %r17w, %r21w
+
+# CHECK: cfcmovbew	291(%r28,%r29,4), %r17w
+# CHECK: encoding: [0x62,0x8c,0x79,0x08,0x46,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovbew	291(%r28,%r29,4), %r17w
+
+# CHECK: cfcmovbel	291(%r28,%r29,4), %r18d, %r22d
+# CHECK: encoding: [0x62,0x8c,0x48,0x14,0x46,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovbel	291(%r28,%r29,4), %r18d, %r22d
+
+# CHECK: cfcmovbel	291(%r28,%r29,4), %r18d
+# CHECK: encoding: [0x62,0x8c,0x78,0x08,0x46,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovbel	291(%r28,%r29,4), %r18d
+
+# CHECK: cfcmovbeq	291(%r28,%r29,4), %r19, %r23
+# CHECK: encoding: [0x62,0x8c,0xc0,0x14,0x46,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovbeq	291(%r28,%r29,4), %r19, %r23
+
+# CHECK: cfcmovbeq	291(%r28,%r29,4), %r19
+# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0x46,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovbeq	291(%r28,%r29,4), %r19
+
+# CHECK: cfcmovlw	%r17w, %r21w, %r25w
+# CHECK: encoding: [0x62,0xec,0x35,0x14,0x4c,0xe9]
+         cfcmovlw	%r17w, %r21w, %r25w
+
+# CHECK: cfcmovlw	%r17w, %r21w
+# CHECK: encoding: [0x62,0xec,0x7d,0x0c,0x4c,0xcd]
+         cfcmovlw	%r17w, %r21w
+
+# CHECK: cfcmovlw	%r17w, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0x79,0x0c,0x4c,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovlw	%r17w, 291(%r28,%r29,4)
+
+# CHECK: cfcmovll	%r18d, %r22d, %r26d
+# CHECK: encoding: [0x62,0xec,0x2c,0x14,0x4c,0xf2]
+         cfcmovll	%r18d, %r22d, %r26d
+
+# CHECK: cfcmovll	%r18d, %r22d
+# CHECK: encoding: [0x62,0xec,0x7c,0x0c,0x4c,0xd6]
+         cfcmovll	%r18d, %r22d
+
+# CHECK: cfcmovll	%r18d, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0x78,0x0c,0x4c,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovll	%r18d, 291(%r28,%r29,4)
+
+# CHECK: cfcmovlq	%r19, %r23, %r27
+# CHECK: encoding: [0x62,0xec,0xa4,0x14,0x4c,0xfb]
+         cfcmovlq	%r19, %r23, %r27
+
+# CHECK: cfcmovlq	%r19, %r23
+# CHECK: encoding: [0x62,0xec,0xfc,0x0c,0x4c,0xdf]
+         cfcmovlq	%r19, %r23
+
+# CHECK: cfcmovlq	%r19, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0xf8,0x0c,0x4c,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovlq	%r19, 291(%r28,%r29,4)
+
+# CHECK: cfcmovlw	291(%r28,%r29,4), %r17w, %r21w
+# CHECK: encoding: [0x62,0x8c,0x51,0x14,0x4c,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovlw	291(%r28,%r29,4), %r17w, %r21w
+
+# CHECK: cfcmovlw	291(%r28,%r29,4), %r17w
+# CHECK: encoding: [0x62,0x8c,0x79,0x08,0x4c,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovlw	291(%r28,%r29,4), %r17w
+
+# CHECK: cfcmovll	291(%r28,%r29,4), %r18d, %r22d
+# CHECK: encoding: [0x62,0x8c,0x48,0x14,0x4c,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovll	291(%r28,%r29,4), %r18d, %r22d
+
+# CHECK: cfcmovll	291(%r28,%r29,4), %r18d
+# CHECK: encoding: [0x62,0x8c,0x78,0x08,0x4c,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovll	291(%r28,%r29,4), %r18d
+
+# CHECK: cfcmovlq	291(%r28,%r29,4), %r19, %r23
+# CHECK: encoding: [0x62,0x8c,0xc0,0x14,0x4c,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovlq	291(%r28,%r29,4), %r19, %r23
+
+# CHECK: cfcmovlq	291(%r28,%r29,4), %r19
+# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0x4c,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovlq	291(%r28,%r29,4), %r19
+
+# CHECK: cfcmovlew	%r17w, %r21w, %r25w
+# CHECK: encoding: [0x62,0xec,0x35,0x14,0x4e,0xe9]
+         cfcmovlew	%r17w, %r21w, %r25w
+
+# CHECK: cfcmovlew	%r17w, %r21w
+# CHECK: encoding: [0x62,0xec,0x7d,0x0c,0x4e,0xcd]
+         cfcmovlew	%r17w, %r21w
+
+# CHECK: cfcmovlew	%r17w, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0x79,0x0c,0x4e,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovlew	%r17w, 291(%r28,%r29,4)
+
+# CHECK: cfcmovlel	%r18d, %r22d, %r26d
+# CHECK: encoding: [0x62,0xec,0x2c,0x14,0x4e,0xf2]
+         cfcmovlel	%r18d, %r22d, %r26d
+
+# CHECK: cfcmovlel	%r18d, %r22d
+# CHECK: encoding: [0x62,0xec,0x7c,0x0c,0x4e,0xd6]
+         cfcmovlel	%r18d, %r22d
+
+# CHECK: cfcmovlel	%r18d, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0x78,0x0c,0x4e,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovlel	%r18d, 291(%r28,%r29,4)
+
+# CHECK: cfcmovleq	%r19, %r23, %r27
+# CHECK: encoding: [0x62,0xec,0xa4,0x14,0x4e,0xfb]
+         cfcmovleq	%r19, %r23, %r27
+
+# CHECK: cfcmovleq	%r19, %r23
+# CHECK: encoding: [0x62,0xec,0xfc,0x0c,0x4e,0xdf]
+         cfcmovleq	%r19, %r23
+
+# CHECK: cfcmovleq	%r19, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0xf8,0x0c,0x4e,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovleq	%r19, 291(%r28,%r29,4)
+
+# CHECK: cfcmovlew	291(%r28,%r29,4), %r17w, %r21w
+# CHECK: encoding: [0x62,0x8c,0x51,0x14,0x4e,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovlew	291(%r28,%r29,4), %r17w, %r21w
+
+# CHECK: cfcmovlew	291(%r28,%r29,4), %r17w
+# CHECK: encoding: [0x62,0x8c,0x79,0x08,0x4e,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovlew	291(%r28,%r29,4), %r17w
+
+# CHECK: cfcmovlel	291(%r28,%r29,4), %r18d, %r22d
+# CHECK: encoding: [0x62,0x8c,0x48,0x14,0x4e,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovlel	291(%r28,%r29,4), %r18d, %r22d
+
+# CHECK: cfcmovlel	291(%r28,%r29,4), %r18d
+# CHECK: encoding: [0x62,0x8c,0x78,0x08,0x4e,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovlel	291(%r28,%r29,4), %r18d
+
+# CHECK: cfcmovleq	291(%r28,%r29,4), %r19, %r23
+# CHECK: encoding: [0x62,0x8c,0xc0,0x14,0x4e,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovleq	291(%r28,%r29,4), %r19, %r23
+
+# CHECK: cfcmovleq	291(%r28,%r29,4), %r19
+# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0x4e,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovleq	291(%r28,%r29,4), %r19
+
+# CHECK: cfcmovaew	%r17w, %r21w, %r25w
+# CHECK: encoding: [0x62,0xec,0x35,0x14,0x43,0xe9]
+         cfcmovaew	%r17w, %r21w, %r25w
+
+# CHECK: cfcmovaew	%r17w, %r21w
+# CHECK: encoding: [0x62,0xec,0x7d,0x0c,0x43,0xcd]
+         cfcmovaew	%r17w, %r21w
+
+# CHECK: cfcmovaew	%r17w, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0x79,0x0c,0x43,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovaew	%r17w, 291(%r28,%r29,4)
+
+# CHECK: cfcmovael	%r18d, %r22d, %r26d
+# CHECK: encoding: [0x62,0xec,0x2c,0x14,0x43,0xf2]
+         cfcmovael	%r18d, %r22d, %r26d
+
+# CHECK: cfcmovael	%r18d, %r22d
+# CHECK: encoding: [0x62,0xec,0x7c,0x0c,0x43,0xd6]
+         cfcmovael	%r18d, %r22d
+
+# CHECK: cfcmovael	%r18d, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0x78,0x0c,0x43,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovael	%r18d, 291(%r28,%r29,4)
+
+# CHECK: cfcmovaeq	%r19, %r23, %r27
+# CHECK: encoding: [0x62,0xec,0xa4,0x14,0x43,0xfb]
+         cfcmovaeq	%r19, %r23, %r27
+
+# CHECK: cfcmovaeq	%r19, %r23
+# CHECK: encoding: [0x62,0xec,0xfc,0x0c,0x43,0xdf]
+         cfcmovaeq	%r19, %r23
+
+# CHECK: cfcmovaeq	%r19, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0xf8,0x0c,0x43,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovaeq	%r19, 291(%r28,%r29,4)
+
+# CHECK: cfcmovaew	291(%r28,%r29,4), %r17w, %r21w
+# CHECK: encoding: [0x62,0x8c,0x51,0x14,0x43,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovaew	291(%r28,%r29,4), %r17w, %r21w
+
+# CHECK: cfcmovaew	291(%r28,%r29,4), %r17w
+# CHECK: encoding: [0x62,0x8c,0x79,0x08,0x43,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovaew	291(%r28,%r29,4), %r17w
+
+# CHECK: cfcmovael	291(%r28,%r29,4), %r18d, %r22d
+# CHECK: encoding: [0x62,0x8c,0x48,0x14,0x43,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovael	291(%r28,%r29,4), %r18d, %r22d
+
+# CHECK: cfcmovael	291(%r28,%r29,4), %r18d
+# CHECK: encoding: [0x62,0x8c,0x78,0x08,0x43,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovael	291(%r28,%r29,4), %r18d
+
+# CHECK: cfcmovaeq	291(%r28,%r29,4), %r19, %r23
+# CHECK: encoding: [0x62,0x8c,0xc0,0x14,0x43,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovaeq	291(%r28,%r29,4), %r19, %r23
+
+# CHECK: cfcmovaeq	291(%r28,%r29,4), %r19
+# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0x43,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovaeq	291(%r28,%r29,4), %r19
+
+# CHECK: cfcmovaw	%r17w, %r21w, %r25w
+# CHECK: encoding: [0x62,0xec,0x35,0x14,0x47,0xe9]
+         cfcmovaw	%r17w, %r21w, %r25w
+
+# CHECK: cfcmovaw	%r17w, %r21w
+# CHECK: encoding: [0x62,0xec,0x7d,0x0c,0x47,0xcd]
+         cfcmovaw	%r17w, %r21w
+
+# CHECK: cfcmovaw	%r17w, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0x79,0x0c,0x47,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovaw	%r17w, 291(%r28,%r29,4)
+
+# CHECK: cfcmoval	%r18d, %r22d, %r26d
+# CHECK: encoding: [0x62,0xec,0x2c,0x14,0x47,0xf2]
+         cfcmoval	%r18d, %r22d, %r26d
+
+# CHECK: cfcmoval	%r18d, %r22d
+# CHECK: encoding: [0x62,0xec,0x7c,0x0c,0x47,0xd6]
+         cfcmoval	%r18d, %r22d
+
+# CHECK: cfcmoval	%r18d, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0x78,0x0c,0x47,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmoval	%r18d, 291(%r28,%r29,4)
+
+# CHECK: cfcmovaq	%r19, %r23, %r27
+# CHECK: encoding: [0x62,0xec,0xa4,0x14,0x47,0xfb]
+         cfcmovaq	%r19, %r23, %r27
+
+# CHECK: cfcmovaq	%r19, %r23
+# CHECK: encoding: [0x62,0xec,0xfc,0x0c,0x47,0xdf]
+         cfcmovaq	%r19, %r23
+
+# CHECK: cfcmovaq	%r19, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0xf8,0x0c,0x47,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovaq	%r19, 291(%r28,%r29,4)
+
+# CHECK: cfcmovaw	291(%r28,%r29,4), %r17w, %r21w
+# CHECK: encoding: [0x62,0x8c,0x51,0x14,0x47,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovaw	291(%r28,%r29,4), %r17w, %r21w
+
+# CHECK: cfcmovaw	291(%r28,%r29,4), %r17w
+# CHECK: encoding: [0x62,0x8c,0x79,0x08,0x47,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovaw	291(%r28,%r29,4), %r17w
+
+# CHECK: cfcmoval	291(%r28,%r29,4), %r18d, %r22d
+# CHECK: encoding: [0x62,0x8c,0x48,0x14,0x47,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmoval	291(%r28,%r29,4), %r18d, %r22d
+
+# CHECK: cfcmoval	291(%r28,%r29,4), %r18d
+# CHECK: encoding: [0x62,0x8c,0x78,0x08,0x47,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmoval	291(%r28,%r29,4), %r18d
+
+# CHECK: cfcmovaq	291(%r28,%r29,4), %r19, %r23
+# CHECK: encoding: [0x62,0x8c,0xc0,0x14,0x47,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovaq	291(%r28,%r29,4), %r19, %r23
+
+# CHECK: cfcmovaq	291(%r28,%r29,4), %r19
+# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0x47,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovaq	291(%r28,%r29,4), %r19
+
+# CHECK: cfcmovgew	%r17w, %r21w, %r25w
+# CHECK: encoding: [0x62,0xec,0x35,0x14,0x4d,0xe9]
+         cfcmovgew	%r17w, %r21w, %r25w
+
+# CHECK: cfcmovgew	%r17w, %r21w
+# CHECK: encoding: [0x62,0xec,0x7d,0x0c,0x4d,0xcd]
+         cfcmovgew	%r17w, %r21w
+
+# CHECK: cfcmovgew	%r17w, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0x79,0x0c,0x4d,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovgew	%r17w, 291(%r28,%r29,4)
+
+# CHECK: cfcmovgel	%r18d, %r22d, %r26d
+# CHECK: encoding: [0x62,0xec,0x2c,0x14,0x4d,0xf2]
+         cfcmovgel	%r18d, %r22d, %r26d
+
+# CHECK: cfcmovgel	%r18d, %r22d
+# CHECK: encoding: [0x62,0xec,0x7c,0x0c,0x4d,0xd6]
+         cfcmovgel	%r18d, %r22d
+
+# CHECK: cfcmovgel	%r18d, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0x78,0x0c,0x4d,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovgel	%r18d, 291(%r28,%r29,4)
+
+# CHECK: cfcmovgeq	%r19, %r23, %r27
+# CHECK: encoding: [0x62,0xec,0xa4,0x14,0x4d,0xfb]
+         cfcmovgeq	%r19, %r23, %r27
+
+# CHECK: cfcmovgeq	%r19, %r23
+# CHECK: encoding: [0x62,0xec,0xfc,0x0c,0x4d,0xdf]
+         cfcmovgeq	%r19, %r23
+
+# CHECK: cfcmovgeq	%r19, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0xf8,0x0c,0x4d,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovgeq	%r19, 291(%r28,%r29,4)
+
+# CHECK: cfcmovgew	291(%r28,%r29,4), %r17w, %r21w
+# CHECK: encoding: [0x62,0x8c,0x51,0x14,0x4d,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovgew	291(%r28,%r29,4), %r17w, %r21w
+
+# CHECK: cfcmovgew	291(%r28,%r29,4), %r17w
+# CHECK: encoding: [0x62,0x8c,0x79,0x08,0x4d,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovgew	291(%r28,%r29,4), %r17w
+
+# CHECK: cfcmovgel	291(%r28,%r29,4), %r18d, %r22d
+# CHECK: encoding: [0x62,0x8c,0x48,0x14,0x4d,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovgel	291(%r28,%r29,4), %r18d, %r22d
+
+# CHECK: cfcmovgel	291(%r28,%r29,4), %r18d
+# CHECK: encoding: [0x62,0x8c,0x78,0x08,0x4d,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovgel	291(%r28,%r29,4), %r18d
+
+# CHECK: cfcmovgeq	291(%r28,%r29,4), %r19, %r23
+# CHECK: encoding: [0x62,0x8c,0xc0,0x14,0x4d,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovgeq	291(%r28,%r29,4), %r19, %r23
+
+# CHECK: cfcmovgeq	291(%r28,%r29,4), %r19
+# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0x4d,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovgeq	291(%r28,%r29,4), %r19
+
+# CHECK: cfcmovnow	%r17w, %r21w, %r25w
+# CHECK: encoding: [0x62,0xec,0x35,0x14,0x41,0xe9]
+         cfcmovnow	%r17w, %r21w, %r25w
+
+# CHECK: cfcmovnow	%r17w, %r21w
+# CHECK: encoding: [0x62,0xec,0x7d,0x0c,0x41,0xcd]
+         cfcmovnow	%r17w, %r21w
+
+# CHECK: cfcmovnow	%r17w, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0x79,0x0c,0x41,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnow	%r17w, 291(%r28,%r29,4)
+
+# CHECK: cfcmovnol	%r18d, %r22d, %r26d
+# CHECK: encoding: [0x62,0xec,0x2c,0x14,0x41,0xf2]
+         cfcmovnol	%r18d, %r22d, %r26d
+
+# CHECK: cfcmovnol	%r18d, %r22d
+# CHECK: encoding: [0x62,0xec,0x7c,0x0c,0x41,0xd6]
+         cfcmovnol	%r18d, %r22d
+
+# CHECK: cfcmovnol	%r18d, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0x78,0x0c,0x41,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnol	%r18d, 291(%r28,%r29,4)
+
+# CHECK: cfcmovnoq	%r19, %r23, %r27
+# CHECK: encoding: [0x62,0xec,0xa4,0x14,0x41,0xfb]
+         cfcmovnoq	%r19, %r23, %r27
+
+# CHECK: cfcmovnoq	%r19, %r23
+# CHECK: encoding: [0x62,0xec,0xfc,0x0c,0x41,0xdf]
+         cfcmovnoq	%r19, %r23
+
+# CHECK: cfcmovnoq	%r19, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0xf8,0x0c,0x41,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnoq	%r19, 291(%r28,%r29,4)
+
+# CHECK: cfcmovnow	291(%r28,%r29,4), %r17w, %r21w
+# CHECK: encoding: [0x62,0x8c,0x51,0x14,0x41,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnow	291(%r28,%r29,4), %r17w, %r21w
+
+# CHECK: cfcmovnow	291(%r28,%r29,4), %r17w
+# CHECK: encoding: [0x62,0x8c,0x79,0x08,0x41,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnow	291(%r28,%r29,4), %r17w
+
+# CHECK: cfcmovnol	291(%r28,%r29,4), %r18d, %r22d
+# CHECK: encoding: [0x62,0x8c,0x48,0x14,0x41,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnol	291(%r28,%r29,4), %r18d, %r22d
+
+# CHECK: cfcmovnol	291(%r28,%r29,4), %r18d
+# CHECK: encoding: [0x62,0x8c,0x78,0x08,0x41,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnol	291(%r28,%r29,4), %r18d
+
+# CHECK: cfcmovnoq	291(%r28,%r29,4), %r19, %r23
+# CHECK: encoding: [0x62,0x8c,0xc0,0x14,0x41,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnoq	291(%r28,%r29,4), %r19, %r23
+
+# CHECK: cfcmovnoq	291(%r28,%r29,4), %r19
+# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0x41,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnoq	291(%r28,%r29,4), %r19
+
+# CHECK: cfcmovnpw	%r17w, %r21w, %r25w
+# CHECK: encoding: [0x62,0xec,0x35,0x14,0x4b,0xe9]
+         cfcmovnpw	%r17w, %r21w, %r25w
+
+# CHECK: cfcmovnpw	%r17w, %r21w
+# CHECK: encoding: [0x62,0xec,0x7d,0x0c,0x4b,0xcd]
+         cfcmovnpw	%r17w, %r21w
+
+# CHECK: cfcmovnpw	%r17w, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0x79,0x0c,0x4b,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnpw	%r17w, 291(%r28,%r29,4)
+
+# CHECK: cfcmovnpl	%r18d, %r22d, %r26d
+# CHECK: encoding: [0x62,0xec,0x2c,0x14,0x4b,0xf2]
+         cfcmovnpl	%r18d, %r22d, %r26d
+
+# CHECK: cfcmovnpl	%r18d, %r22d
+# CHECK: encoding: [0x62,0xec,0x7c,0x0c,0x4b,0xd6]
+         cfcmovnpl	%r18d, %r22d
+
+# CHECK: cfcmovnpl	%r18d, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0x78,0x0c,0x4b,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnpl	%r18d, 291(%r28,%r29,4)
+
+# CHECK: cfcmovnpq	%r19, %r23, %r27
+# CHECK: encoding: [0x62,0xec,0xa4,0x14,0x4b,0xfb]
+         cfcmovnpq	%r19, %r23, %r27
+
+# CHECK: cfcmovnpq	%r19, %r23
+# CHECK: encoding: [0x62,0xec,0xfc,0x0c,0x4b,0xdf]
+         cfcmovnpq	%r19, %r23
+
+# CHECK: cfcmovnpq	%r19, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0xf8,0x0c,0x4b,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnpq	%r19, 291(%r28,%r29,4)
+
+# CHECK: cfcmovnpw	291(%r28,%r29,4), %r17w, %r21w
+# CHECK: encoding: [0x62,0x8c,0x51,0x14,0x4b,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnpw	291(%r28,%r29,4), %r17w, %r21w
+
+# CHECK: cfcmovnpw	291(%r28,%r29,4), %r17w
+# CHECK: encoding: [0x62,0x8c,0x79,0x08,0x4b,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnpw	291(%r28,%r29,4), %r17w
+
+# CHECK: cfcmovnpl	291(%r28,%r29,4), %r18d, %r22d
+# CHECK: encoding: [0x62,0x8c,0x48,0x14,0x4b,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnpl	291(%r28,%r29,4), %r18d, %r22d
+
+# CHECK: cfcmovnpl	291(%r28,%r29,4), %r18d
+# CHECK: encoding: [0x62,0x8c,0x78,0x08,0x4b,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnpl	291(%r28,%r29,4), %r18d
+
+# CHECK: cfcmovnpq	291(%r28,%r29,4), %r19, %r23
+# CHECK: encoding: [0x62,0x8c,0xc0,0x14,0x4b,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnpq	291(%r28,%r29,4), %r19, %r23
+
+# CHECK: cfcmovnpq	291(%r28,%r29,4), %r19
+# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0x4b,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnpq	291(%r28,%r29,4), %r19
+
+# CHECK: cfcmovnsw	%r17w, %r21w, %r25w
+# CHECK: encoding: [0x62,0xec,0x35,0x14,0x49,0xe9]
+         cfcmovnsw	%r17w, %r21w, %r25w
+
+# CHECK: cfcmovnsw	%r17w, %r21w
+# CHECK: encoding: [0x62,0xec,0x7d,0x0c,0x49,0xcd]
+         cfcmovnsw	%r17w, %r21w
+
+# CHECK: cfcmovnsw	%r17w, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0x79,0x0c,0x49,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnsw	%r17w, 291(%r28,%r29,4)
+
+# CHECK: cfcmovnsl	%r18d, %r22d, %r26d
+# CHECK: encoding: [0x62,0xec,0x2c,0x14,0x49,0xf2]
+         cfcmovnsl	%r18d, %r22d, %r26d
+
+# CHECK: cfcmovnsl	%r18d, %r22d
+# CHECK: encoding: [0x62,0xec,0x7c,0x0c,0x49,0xd6]
+         cfcmovnsl	%r18d, %r22d
+
+# CHECK: cfcmovnsl	%r18d, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0x78,0x0c,0x49,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnsl	%r18d, 291(%r28,%r29,4)
+
+# CHECK: cfcmovnsq	%r19, %r23, %r27
+# CHECK: encoding: [0x62,0xec,0xa4,0x14,0x49,0xfb]
+         cfcmovnsq	%r19, %r23, %r27
+
+# CHECK: cfcmovnsq	%r19, %r23
+# CHECK: encoding: [0x62,0xec,0xfc,0x0c,0x49,0xdf]
+         cfcmovnsq	%r19, %r23
+
+# CHECK: cfcmovnsq	%r19, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0xf8,0x0c,0x49,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnsq	%r19, 291(%r28,%r29,4)
+
+# CHECK: cfcmovnsw	291(%r28,%r29,4), %r17w, %r21w
+# CHECK: encoding: [0x62,0x8c,0x51,0x14,0x49,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnsw	291(%r28,%r29,4), %r17w, %r21w
+
+# CHECK: cfcmovnsw	291(%r28,%r29,4), %r17w
+# CHECK: encoding: [0x62,0x8c,0x79,0x08,0x49,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnsw	291(%r28,%r29,4), %r17w
+
+# CHECK: cfcmovnsl	291(%r28,%r29,4), %r18d, %r22d
+# CHECK: encoding: [0x62,0x8c,0x48,0x14,0x49,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnsl	291(%r28,%r29,4), %r18d, %r22d
+
+# CHECK: cfcmovnsl	291(%r28,%r29,4), %r18d
+# CHECK: encoding: [0x62,0x8c,0x78,0x08,0x49,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnsl	291(%r28,%r29,4), %r18d
+
+# CHECK: cfcmovnsq	291(%r28,%r29,4), %r19, %r23
+# CHECK: encoding: [0x62,0x8c,0xc0,0x14,0x49,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnsq	291(%r28,%r29,4), %r19, %r23
+
+# CHECK: cfcmovnsq	291(%r28,%r29,4), %r19
+# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0x49,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnsq	291(%r28,%r29,4), %r19
+
+# CHECK: cfcmovnew	%r17w, %r21w, %r25w
+# CHECK: encoding: [0x62,0xec,0x35,0x14,0x45,0xe9]
+         cfcmovnew	%r17w, %r21w, %r25w
+
+# CHECK: cfcmovnew	%r17w, %r21w
+# CHECK: encoding: [0x62,0xec,0x7d,0x0c,0x45,0xcd]
+         cfcmovnew	%r17w, %r21w
+
+# CHECK: cfcmovnew	%r17w, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0x79,0x0c,0x45,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnew	%r17w, 291(%r28,%r29,4)
+
+# CHECK: cfcmovnel	%r18d, %r22d, %r26d
+# CHECK: encoding: [0x62,0xec,0x2c,0x14,0x45,0xf2]
+         cfcmovnel	%r18d, %r22d, %r26d
+
+# CHECK: cfcmovnel	%r18d, %r22d
+# CHECK: encoding: [0x62,0xec,0x7c,0x0c,0x45,0xd6]
+         cfcmovnel	%r18d, %r22d
+
+# CHECK: cfcmovnel	%r18d, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0x78,0x0c,0x45,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnel	%r18d, 291(%r28,%r29,4)
+
+# CHECK: cfcmovneq	%r19, %r23, %r27
+# CHECK: encoding: [0x62,0xec,0xa4,0x14,0x45,0xfb]
+         cfcmovneq	%r19, %r23, %r27
+
+# CHECK: cfcmovneq	%r19, %r23
+# CHECK: encoding: [0x62,0xec,0xfc,0x0c,0x45,0xdf]
+         cfcmovneq	%r19, %r23
+
+# CHECK: cfcmovneq	%r19, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0xf8,0x0c,0x45,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovneq	%r19, 291(%r28,%r29,4)
+
+# CHECK: cfcmovnew	291(%r28,%r29,4), %r17w, %r21w
+# CHECK: encoding: [0x62,0x8c,0x51,0x14,0x45,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnew	291(%r28,%r29,4), %r17w, %r21w
+
+# CHECK: cfcmovnew	291(%r28,%r29,4), %r17w
+# CHECK: encoding: [0x62,0x8c,0x79,0x08,0x45,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnew	291(%r28,%r29,4), %r17w
+
+# CHECK: cfcmovnel	291(%r28,%r29,4), %r18d, %r22d
+# CHECK: encoding: [0x62,0x8c,0x48,0x14,0x45,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnel	291(%r28,%r29,4), %r18d, %r22d
+
+# CHECK: cfcmovnel	291(%r28,%r29,4), %r18d
+# CHECK: encoding: [0x62,0x8c,0x78,0x08,0x45,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnel	291(%r28,%r29,4), %r18d
+
+# CHECK: cfcmovneq	291(%r28,%r29,4), %r19, %r23
+# CHECK: encoding: [0x62,0x8c,0xc0,0x14,0x45,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovneq	291(%r28,%r29,4), %r19, %r23
+
+# CHECK: cfcmovneq	291(%r28,%r29,4), %r19
+# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0x45,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovneq	291(%r28,%r29,4), %r19
+
+# CHECK: cfcmovpw	%r17w, %r21w, %r25w
+# CHECK: encoding: [0x62,0xec,0x35,0x14,0x4a,0xe9]
+         cfcmovpw	%r17w, %r21w, %r25w
+
+# CHECK: cfcmovpw	%r17w, %r21w
+# CHECK: encoding: [0x62,0xec,0x7d,0x0c,0x4a,0xcd]
+         cfcmovpw	%r17w, %r21w
+
+# CHECK: cfcmovpw	%r17w, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0x79,0x0c,0x4a,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovpw	%r17w, 291(%r28,%r29,4)
+
+# CHECK: cfcmovpl	%r18d, %r22d, %r26d
+# CHECK: encoding: [0x62,0xec,0x2c,0x14,0x4a,0xf2]
+         cfcmovpl	%r18d, %r22d, %r26d
+
+# CHECK: cfcmovpl	%r18d, %r22d
+# CHECK: encoding: [0x62,0xec,0x7c,0x0c,0x4a,0xd6]
+         cfcmovpl	%r18d, %r22d
+
+# CHECK: cfcmovpl	%r18d, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0x78,0x0c,0x4a,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovpl	%r18d, 291(%r28,%r29,4)
+
+# CHECK: cfcmovpq	%r19, %r23, %r27
+# CHECK: encoding: [0x62,0xec,0xa4,0x14,0x4a,0xfb]
+         cfcmovpq	%r19, %r23, %r27
+
+# CHECK: cfcmovpq	%r19, %r23
+# CHECK: encoding: [0x62,0xec,0xfc,0x0c,0x4a,0xdf]
+         cfcmovpq	%r19, %r23
+
+# CHECK: cfcmovpq	%r19, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0xf8,0x0c,0x4a,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovpq	%r19, 291(%r28,%r29,4)
+
+# CHECK: cfcmovpw	291(%r28,%r29,4), %r17w, %r21w
+# CHECK: encoding: [0x62,0x8c,0x51,0x14,0x4a,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovpw	291(%r28,%r29,4), %r17w, %r21w
+
+# CHECK: cfcmovpw	291(%r28,%r29,4), %r17w
+# CHECK: encoding: [0x62,0x8c,0x79,0x08,0x4a,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovpw	291(%r28,%r29,4), %r17w
+
+# CHECK: cfcmovpl	291(%r28,%r29,4), %r18d, %r22d
+# CHECK: encoding: [0x62,0x8c,0x48,0x14,0x4a,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovpl	291(%r28,%r29,4), %r18d, %r22d
+
+# CHECK: cfcmovpl	291(%r28,%r29,4), %r18d
+# CHECK: encoding: [0x62,0x8c,0x78,0x08,0x4a,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovpl	291(%r28,%r29,4), %r18d
+
+# CHECK: cfcmovpq	291(%r28,%r29,4), %r19, %r23
+# CHECK: encoding: [0x62,0x8c,0xc0,0x14,0x4a,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovpq	291(%r28,%r29,4), %r19, %r23
+
+# CHECK: cfcmovpq	291(%r28,%r29,4), %r19
+# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0x4a,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovpq	291(%r28,%r29,4), %r19
+
+# CHECK: cfcmovsw	%r17w, %r21w, %r25w
+# CHECK: encoding: [0x62,0xec,0x35,0x14,0x48,0xe9]
+         cfcmovsw	%r17w, %r21w, %r25w
+
+# CHECK: cfcmovsw	%r17w, %r21w
+# CHECK: encoding: [0x62,0xec,0x7d,0x0c,0x48,0xcd]
+         cfcmovsw	%r17w, %r21w
+
+# CHECK: cfcmovsw	%r17w, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0x79,0x0c,0x48,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovsw	%r17w, 291(%r28,%r29,4)
+
+# CHECK: cfcmovsl	%r18d, %r22d, %r26d
+# CHECK: encoding: [0x62,0xec,0x2c,0x14,0x48,0xf2]
+         cfcmovsl	%r18d, %r22d, %r26d
+
+# CHECK: cfcmovsl	%r18d, %r22d
+# CHECK: encoding: [0x62,0xec,0x7c,0x0c,0x48,0xd6]
+         cfcmovsl	%r18d, %r22d
+
+# CHECK: cfcmovsl	%r18d, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0x78,0x0c,0x48,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovsl	%r18d, 291(%r28,%r29,4)
+
+# CHECK: cfcmovsq	%r19, %r23, %r27
+# CHECK: encoding: [0x62,0xec,0xa4,0x14,0x48,0xfb]
+         cfcmovsq	%r19, %r23, %r27
+
+# CHECK: cfcmovsq	%r19, %r23
+# CHECK: encoding: [0x62,0xec,0xfc,0x0c,0x48,0xdf]
+         cfcmovsq	%r19, %r23
+
+# CHECK: cfcmovsq	%r19, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0xf8,0x0c,0x48,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovsq	%r19, 291(%r28,%r29,4)
+
+# CHECK: cfcmovsw	291(%r28,%r29,4), %r17w, %r21w
+# CHECK: encoding: [0x62,0x8c,0x51,0x14,0x48,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovsw	291(%r28,%r29,4), %r17w, %r21w
+
+# CHECK: cfcmovsw	291(%r28,%r29,4), %r17w
+# CHECK: encoding: [0x62,0x8c,0x79,0x08,0x48,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovsw	291(%r28,%r29,4), %r17w
+
+# CHECK: cfcmovsl	291(%r28,%r29,4), %r18d, %r22d
+# CHECK: encoding: [0x62,0x8c,0x48,0x14,0x48,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovsl	291(%r28,%r29,4), %r18d, %r22d
+
+# CHECK: cfcmovsl	291(%r28,%r29,4), %r18d
+# CHECK: encoding: [0x62,0x8c,0x78,0x08,0x48,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovsl	291(%r28,%r29,4), %r18d
+
+# CHECK: cfcmovsq	291(%r28,%r29,4), %r19, %r23
+# CHECK: encoding: [0x62,0x8c,0xc0,0x14,0x48,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovsq	291(%r28,%r29,4), %r19, %r23
+
+# CHECK: cfcmovsq	291(%r28,%r29,4), %r19
+# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0x48,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovsq	291(%r28,%r29,4), %r19
+
+# CHECK: cfcmovew	%r17w, %r21w, %r25w
+# CHECK: encoding: [0x62,0xec,0x35,0x14,0x44,0xe9]
+         cfcmovew	%r17w, %r21w, %r25w
+
+# CHECK: cfcmovew	%r17w, %r21w
+# CHECK: encoding: [0x62,0xec,0x7d,0x0c,0x44,0xcd]
+         cfcmovew	%r17w, %r21w
+
+# CHECK: cfcmovew	%r17w, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0x79,0x0c,0x44,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovew	%r17w, 291(%r28,%r29,4)
+
+# CHECK: cfcmovel	%r18d, %r22d, %r26d
+# CHECK: encoding: [0x62,0xec,0x2c,0x14,0x44,0xf2]
+         cfcmovel	%r18d, %r22d, %r26d
+
+# CHECK: cfcmovel	%r18d, %r22d
+# CHECK: encoding: [0x62,0xec,0x7c,0x0c,0x44,0xd6]
+         cfcmovel	%r18d, %r22d
+
+# CHECK: cfcmovel	%r18d, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0x78,0x0c,0x44,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovel	%r18d, 291(%r28,%r29,4)
+
+# CHECK: cfcmoveq	%r19, %r23, %r27
+# CHECK: encoding: [0x62,0xec,0xa4,0x14,0x44,0xfb]
+         cfcmoveq	%r19, %r23, %r27
+
+# CHECK: cfcmoveq	%r19, %r23
+# CHECK: encoding: [0x62,0xec,0xfc,0x0c,0x44,0xdf]
+         cfcmoveq	%r19, %r23
+
+# CHECK: cfcmoveq	%r19, 291(%r28,%r29,4)
+# CHECK: encoding: [0x62,0x8c,0xf8,0x0c,0x44,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmoveq	%r19, 291(%r28,%r29,4)
+
+# CHECK: cfcmovew	291(%r28,%r29,4), %r17w, %r21w
+# CHECK: encoding: [0x62,0x8c,0x51,0x14,0x44,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovew	291(%r28,%r29,4), %r17w, %r21w
+
+# CHECK: cfcmovew	291(%r28,%r29,4), %r17w
+# CHECK: encoding: [0x62,0x8c,0x79,0x08,0x44,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovew	291(%r28,%r29,4), %r17w
+
+# CHECK: cfcmovel	291(%r28,%r29,4), %r18d, %r22d
+# CHECK: encoding: [0x62,0x8c,0x48,0x14,0x44,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovel	291(%r28,%r29,4), %r18d, %r22d
+
+# CHECK: cfcmovel	291(%r28,%r29,4), %r18d
+# CHECK: encoding: [0x62,0x8c,0x78,0x08,0x44,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovel	291(%r28,%r29,4), %r18d
+
+# CHECK: cfcmoveq	291(%r28,%r29,4), %r19, %r23
+# CHECK: encoding: [0x62,0x8c,0xc0,0x14,0x44,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmoveq	291(%r28,%r29,4), %r19, %r23
+
+# CHECK: cfcmoveq	291(%r28,%r29,4), %r19
+# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0x44,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmoveq	291(%r28,%r29,4), %r19
diff --git a/llvm/test/MC/X86/apx/cfcmov-intel.s b/llvm/test/MC/X86/apx/cfcmov-intel.s
index 6f90f6db13fe93..58b145d7fef2e5 100644
--- a/llvm/test/MC/X86/apx/cfcmov-intel.s
+++ b/llvm/test/MC/X86/apx/cfcmov-intel.s
@@ -1,722 +1,841 @@
-# RUN: llvm-mc -triple x86_64 -show-encoding -x86-asm-syntax=intel -output-asm-variant=1 %s | FileCheck %s
-
-# CHECK: cfcmovb	r9w, ax, dx
-# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x42,0xc2]
-         cfcmovb	r9w, ax, dx
-# CHECK: cfcmovb	r10d, edx, ecx
-# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x42,0xd1]
-         cfcmovb	r10d, edx, ecx
-# CHECK: cfcmovb	r11, r15, r9
-# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x42,0xf9]
-         cfcmovb	r11, r15, r9
-# CHECK: cfcmovb	ax, dx, word ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x42,0x54,0x80,0x7b]
-         cfcmovb	ax, dx, word ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovb	edx, ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x42,0x4c,0x80,0x7b]
-         cfcmovb	edx, ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovb	r15, r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x42,0x4c,0x80,0x7b]
-         cfcmovb	r15, r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovb	word ptr [r8 + 4*rax + 123], dx
-# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x42,0x54,0x80,0x7b]
-         cfcmovb	word ptr [r8 + 4*rax + 123], dx
-# CHECK: cfcmovb	dword ptr [r8 + 4*rax + 123], ecx
-# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x42,0x4c,0x80,0x7b]
-         cfcmovb	dword ptr [r8 + 4*rax + 123], ecx
-# CHECK: cfcmovb	qword ptr [r8 + 4*rax + 123], r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x42,0x4c,0x80,0x7b]
-         cfcmovb	qword ptr [r8 + 4*rax + 123], r9
-# CHECK: cfcmovb	dx, word ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x42,0x54,0x80,0x7b]
-         cfcmovb	dx, word ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovb	ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x42,0x4c,0x80,0x7b]
-         cfcmovb	ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovb	r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x42,0x4c,0x80,0x7b]
-         cfcmovb	r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovb	ax, dx
-# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x42,0xc2]
-         cfcmovb	ax, dx
-# CHECK: cfcmovb	edx, ecx
-# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x42,0xd1]
-         cfcmovb	edx, ecx
-# CHECK: cfcmovb	r15, r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x42,0xf9]
-         cfcmovb	r15, r9
-# CHECK: cfcmovbe	r9w, ax, dx
-# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x46,0xc2]
-         cfcmovbe	r9w, ax, dx
-# CHECK: cfcmovbe	r10d, edx, ecx
-# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x46,0xd1]
-         cfcmovbe	r10d, edx, ecx
-# CHECK: cfcmovbe	r11, r15, r9
-# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x46,0xf9]
-         cfcmovbe	r11, r15, r9
-# CHECK: cfcmovbe	ax, dx, word ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x46,0x54,0x80,0x7b]
-         cfcmovbe	ax, dx, word ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovbe	edx, ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x46,0x4c,0x80,0x7b]
-         cfcmovbe	edx, ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovbe	r15, r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x46,0x4c,0x80,0x7b]
-         cfcmovbe	r15, r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovbe	word ptr [r8 + 4*rax + 123], dx
-# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x46,0x54,0x80,0x7b]
-         cfcmovbe	word ptr [r8 + 4*rax + 123], dx
-# CHECK: cfcmovbe	dword ptr [r8 + 4*rax + 123], ecx
-# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x46,0x4c,0x80,0x7b]
-         cfcmovbe	dword ptr [r8 + 4*rax + 123], ecx
-# CHECK: cfcmovbe	qword ptr [r8 + 4*rax + 123], r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x46,0x4c,0x80,0x7b]
-         cfcmovbe	qword ptr [r8 + 4*rax + 123], r9
-# CHECK: cfcmovbe	dx, word ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x46,0x54,0x80,0x7b]
-         cfcmovbe	dx, word ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovbe	ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x46,0x4c,0x80,0x7b]
-         cfcmovbe	ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovbe	r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x46,0x4c,0x80,0x7b]
-         cfcmovbe	r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovbe	ax, dx
-# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x46,0xc2]
-         cfcmovbe	ax, dx
-# CHECK: cfcmovbe	edx, ecx
-# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x46,0xd1]
-         cfcmovbe	edx, ecx
-# CHECK: cfcmovbe	r15, r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x46,0xf9]
-         cfcmovbe	r15, r9
-# CHECK: cfcmovl	r9w, ax, dx
-# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x4c,0xc2]
-         cfcmovl	r9w, ax, dx
-# CHECK: cfcmovl	r10d, edx, ecx
-# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x4c,0xd1]
-         cfcmovl	r10d, edx, ecx
-# CHECK: cfcmovl	r11, r15, r9
-# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x4c,0xf9]
-         cfcmovl	r11, r15, r9
-# CHECK: cfcmovl	ax, dx, word ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x4c,0x54,0x80,0x7b]
-         cfcmovl	ax, dx, word ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovl	edx, ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x4c,0x4c,0x80,0x7b]
-         cfcmovl	edx, ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovl	r15, r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x4c,0x4c,0x80,0x7b]
-         cfcmovl	r15, r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovl	word ptr [r8 + 4*rax + 123], dx
-# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x4c,0x54,0x80,0x7b]
-         cfcmovl	word ptr [r8 + 4*rax + 123], dx
-# CHECK: cfcmovl	dword ptr [r8 + 4*rax + 123], ecx
-# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x4c,0x4c,0x80,0x7b]
-         cfcmovl	dword ptr [r8 + 4*rax + 123], ecx
-# CHECK: cfcmovl	qword ptr [r8 + 4*rax + 123], r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x4c,0x4c,0x80,0x7b]
-         cfcmovl	qword ptr [r8 + 4*rax + 123], r9
-# CHECK: cfcmovl	dx, word ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x4c,0x54,0x80,0x7b]
-         cfcmovl	dx, word ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovl	ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x4c,0x4c,0x80,0x7b]
-         cfcmovl	ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovl	r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4c,0x4c,0x80,0x7b]
-         cfcmovl	r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovl	ax, dx
-# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x4c,0xc2]
-         cfcmovl	ax, dx
-# CHECK: cfcmovl	edx, ecx
-# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x4c,0xd1]
-         cfcmovl	edx, ecx
-# CHECK: cfcmovl	r15, r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4c,0xf9]
-         cfcmovl	r15, r9
-# CHECK: cfcmovle	r9w, ax, dx
-# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x4e,0xc2]
-         cfcmovle	r9w, ax, dx
-# CHECK: cfcmovle	r10d, edx, ecx
-# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x4e,0xd1]
-         cfcmovle	r10d, edx, ecx
-# CHECK: cfcmovle	r11, r15, r9
-# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x4e,0xf9]
-         cfcmovle	r11, r15, r9
-# CHECK: cfcmovle	ax, dx, word ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x4e,0x54,0x80,0x7b]
-         cfcmovle	ax, dx, word ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovle	edx, ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x4e,0x4c,0x80,0x7b]
-         cfcmovle	edx, ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovle	r15, r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x4e,0x4c,0x80,0x7b]
-         cfcmovle	r15, r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovle	word ptr [r8 + 4*rax + 123], dx
-# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x4e,0x54,0x80,0x7b]
-         cfcmovle	word ptr [r8 + 4*rax + 123], dx
-# CHECK: cfcmovle	dword ptr [r8 + 4*rax + 123], ecx
-# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x4e,0x4c,0x80,0x7b]
-         cfcmovle	dword ptr [r8 + 4*rax + 123], ecx
-# CHECK: cfcmovle	qword ptr [r8 + 4*rax + 123], r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x4e,0x4c,0x80,0x7b]
-         cfcmovle	qword ptr [r8 + 4*rax + 123], r9
-# CHECK: cfcmovle	dx, word ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x4e,0x54,0x80,0x7b]
-         cfcmovle	dx, word ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovle	ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x4e,0x4c,0x80,0x7b]
-         cfcmovle	ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovle	r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4e,0x4c,0x80,0x7b]
-         cfcmovle	r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovle	ax, dx
-# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x4e,0xc2]
-         cfcmovle	ax, dx
-# CHECK: cfcmovle	edx, ecx
-# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x4e,0xd1]
-         cfcmovle	edx, ecx
-# CHECK: cfcmovle	r15, r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4e,0xf9]
-         cfcmovle	r15, r9
-# CHECK: cfcmovae	r9w, ax, dx
-# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x43,0xc2]
-         cfcmovae	r9w, ax, dx
-# CHECK: cfcmovae	r10d, edx, ecx
-# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x43,0xd1]
-         cfcmovae	r10d, edx, ecx
-# CHECK: cfcmovae	r11, r15, r9
-# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x43,0xf9]
-         cfcmovae	r11, r15, r9
-# CHECK: cfcmovae	ax, dx, word ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x43,0x54,0x80,0x7b]
-         cfcmovae	ax, dx, word ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovae	edx, ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x43,0x4c,0x80,0x7b]
-         cfcmovae	edx, ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovae	r15, r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x43,0x4c,0x80,0x7b]
-         cfcmovae	r15, r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovae	word ptr [r8 + 4*rax + 123], dx
-# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x43,0x54,0x80,0x7b]
-         cfcmovae	word ptr [r8 + 4*rax + 123], dx
-# CHECK: cfcmovae	dword ptr [r8 + 4*rax + 123], ecx
-# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x43,0x4c,0x80,0x7b]
-         cfcmovae	dword ptr [r8 + 4*rax + 123], ecx
-# CHECK: cfcmovae	qword ptr [r8 + 4*rax + 123], r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x43,0x4c,0x80,0x7b]
-         cfcmovae	qword ptr [r8 + 4*rax + 123], r9
-# CHECK: cfcmovae	dx, word ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x43,0x54,0x80,0x7b]
-         cfcmovae	dx, word ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovae	ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x43,0x4c,0x80,0x7b]
-         cfcmovae	ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovae	r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x43,0x4c,0x80,0x7b]
-         cfcmovae	r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovae	ax, dx
-# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x43,0xc2]
-         cfcmovae	ax, dx
-# CHECK: cfcmovae	edx, ecx
-# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x43,0xd1]
-         cfcmovae	edx, ecx
-# CHECK: cfcmovae	r15, r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x43,0xf9]
-         cfcmovae	r15, r9
-# CHECK: cfcmova	r9w, ax, dx
-# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x47,0xc2]
-         cfcmova	r9w, ax, dx
-# CHECK: cfcmova	r10d, edx, ecx
-# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x47,0xd1]
-         cfcmova	r10d, edx, ecx
-# CHECK: cfcmova	r11, r15, r9
-# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x47,0xf9]
-         cfcmova	r11, r15, r9
-# CHECK: cfcmova	ax, dx, word ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x47,0x54,0x80,0x7b]
-         cfcmova	ax, dx, word ptr [r8 + 4*rax + 123]
-# CHECK: cfcmova	edx, ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x47,0x4c,0x80,0x7b]
-         cfcmova	edx, ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmova	r15, r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x47,0x4c,0x80,0x7b]
-         cfcmova	r15, r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmova	word ptr [r8 + 4*rax + 123], dx
-# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x47,0x54,0x80,0x7b]
-         cfcmova	word ptr [r8 + 4*rax + 123], dx
-# CHECK: cfcmova	dword ptr [r8 + 4*rax + 123], ecx
-# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x47,0x4c,0x80,0x7b]
-         cfcmova	dword ptr [r8 + 4*rax + 123], ecx
-# CHECK: cfcmova	qword ptr [r8 + 4*rax + 123], r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x47,0x4c,0x80,0x7b]
-         cfcmova	qword ptr [r8 + 4*rax + 123], r9
-# CHECK: cfcmova	dx, word ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x47,0x54,0x80,0x7b]
-         cfcmova	dx, word ptr [r8 + 4*rax + 123]
-# CHECK: cfcmova	ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x47,0x4c,0x80,0x7b]
-         cfcmova	ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmova	r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x47,0x4c,0x80,0x7b]
-         cfcmova	r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmova	ax, dx
-# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x47,0xc2]
-         cfcmova	ax, dx
-# CHECK: cfcmova	edx, ecx
-# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x47,0xd1]
-         cfcmova	edx, ecx
-# CHECK: cfcmova	r15, r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x47,0xf9]
-         cfcmova	r15, r9
-# CHECK: cfcmovge	r9w, ax, dx
-# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x4d,0xc2]
-         cfcmovge	r9w, ax, dx
-# CHECK: cfcmovge	r10d, edx, ecx
-# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x4d,0xd1]
-         cfcmovge	r10d, edx, ecx
-# CHECK: cfcmovge	r11, r15, r9
-# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x4d,0xf9]
-         cfcmovge	r11, r15, r9
-# CHECK: cfcmovge	ax, dx, word ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x4d,0x54,0x80,0x7b]
-         cfcmovge	ax, dx, word ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovge	edx, ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x4d,0x4c,0x80,0x7b]
-         cfcmovge	edx, ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovge	r15, r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x4d,0x4c,0x80,0x7b]
-         cfcmovge	r15, r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovge	word ptr [r8 + 4*rax + 123], dx
-# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x4d,0x54,0x80,0x7b]
-         cfcmovge	word ptr [r8 + 4*rax + 123], dx
-# CHECK: cfcmovge	dword ptr [r8 + 4*rax + 123], ecx
-# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x4d,0x4c,0x80,0x7b]
-         cfcmovge	dword ptr [r8 + 4*rax + 123], ecx
-# CHECK: cfcmovge	qword ptr [r8 + 4*rax + 123], r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x4d,0x4c,0x80,0x7b]
-         cfcmovge	qword ptr [r8 + 4*rax + 123], r9
-# CHECK: cfcmovge	dx, word ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x4d,0x54,0x80,0x7b]
-         cfcmovge	dx, word ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovge	ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x4d,0x4c,0x80,0x7b]
-         cfcmovge	ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovge	r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4d,0x4c,0x80,0x7b]
-         cfcmovge	r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovge	ax, dx
-# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x4d,0xc2]
-         cfcmovge	ax, dx
-# CHECK: cfcmovge	edx, ecx
-# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x4d,0xd1]
-         cfcmovge	edx, ecx
-# CHECK: cfcmovge	r15, r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4d,0xf9]
-         cfcmovge	r15, r9
-# CHECK: cfcmovg	r9w, ax, dx
-# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x4f,0xc2]
-         cfcmovg	r9w, ax, dx
-# CHECK: cfcmovg	r10d, edx, ecx
-# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x4f,0xd1]
-         cfcmovg	r10d, edx, ecx
-# CHECK: cfcmovg	r11, r15, r9
-# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x4f,0xf9]
-         cfcmovg	r11, r15, r9
-# CHECK: cfcmovg	ax, dx, word ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x4f,0x54,0x80,0x7b]
-         cfcmovg	ax, dx, word ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovg	edx, ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x4f,0x4c,0x80,0x7b]
-         cfcmovg	edx, ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovg	r15, r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x4f,0x4c,0x80,0x7b]
-         cfcmovg	r15, r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovg	word ptr [r8 + 4*rax + 123], dx
-# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x4f,0x54,0x80,0x7b]
-         cfcmovg	word ptr [r8 + 4*rax + 123], dx
-# CHECK: cfcmovg	dword ptr [r8 + 4*rax + 123], ecx
-# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x4f,0x4c,0x80,0x7b]
-         cfcmovg	dword ptr [r8 + 4*rax + 123], ecx
-# CHECK: cfcmovg	qword ptr [r8 + 4*rax + 123], r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x4f,0x4c,0x80,0x7b]
-         cfcmovg	qword ptr [r8 + 4*rax + 123], r9
-# CHECK: cfcmovg	dx, word ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x4f,0x54,0x80,0x7b]
-         cfcmovg	dx, word ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovg	ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x4f,0x4c,0x80,0x7b]
-         cfcmovg	ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovg	r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4f,0x4c,0x80,0x7b]
-         cfcmovg	r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovg	ax, dx
-# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x4f,0xc2]
-         cfcmovg	ax, dx
-# CHECK: cfcmovg	edx, ecx
-# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x4f,0xd1]
-         cfcmovg	edx, ecx
-# CHECK: cfcmovg	r15, r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4f,0xf9]
-         cfcmovg	r15, r9
-# CHECK: cfcmovno	r9w, ax, dx
-# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x41,0xc2]
-         cfcmovno	r9w, ax, dx
-# CHECK: cfcmovno	r10d, edx, ecx
-# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x41,0xd1]
-         cfcmovno	r10d, edx, ecx
-# CHECK: cfcmovno	r11, r15, r9
-# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x41,0xf9]
-         cfcmovno	r11, r15, r9
-# CHECK: cfcmovno	ax, dx, word ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x41,0x54,0x80,0x7b]
-         cfcmovno	ax, dx, word ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovno	edx, ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x41,0x4c,0x80,0x7b]
-         cfcmovno	edx, ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovno	r15, r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x41,0x4c,0x80,0x7b]
-         cfcmovno	r15, r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovno	word ptr [r8 + 4*rax + 123], dx
-# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x41,0x54,0x80,0x7b]
-         cfcmovno	word ptr [r8 + 4*rax + 123], dx
-# CHECK: cfcmovno	dword ptr [r8 + 4*rax + 123], ecx
-# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x41,0x4c,0x80,0x7b]
-         cfcmovno	dword ptr [r8 + 4*rax + 123], ecx
-# CHECK: cfcmovno	qword ptr [r8 + 4*rax + 123], r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x41,0x4c,0x80,0x7b]
-         cfcmovno	qword ptr [r8 + 4*rax + 123], r9
-# CHECK: cfcmovno	dx, word ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x41,0x54,0x80,0x7b]
-         cfcmovno	dx, word ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovno	ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x41,0x4c,0x80,0x7b]
-         cfcmovno	ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovno	r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x41,0x4c,0x80,0x7b]
-         cfcmovno	r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovno	ax, dx
-# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x41,0xc2]
-         cfcmovno	ax, dx
-# CHECK: cfcmovno	edx, ecx
-# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x41,0xd1]
-         cfcmovno	edx, ecx
-# CHECK: cfcmovno	r15, r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x41,0xf9]
-         cfcmovno	r15, r9
-# CHECK: cfcmovnp	r9w, ax, dx
-# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x4b,0xc2]
-         cfcmovnp	r9w, ax, dx
-# CHECK: cfcmovnp	r10d, edx, ecx
-# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x4b,0xd1]
-         cfcmovnp	r10d, edx, ecx
-# CHECK: cfcmovnp	r11, r15, r9
-# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x4b,0xf9]
-         cfcmovnp	r11, r15, r9
-# CHECK: cfcmovnp	ax, dx, word ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x4b,0x54,0x80,0x7b]
-         cfcmovnp	ax, dx, word ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovnp	edx, ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x4b,0x4c,0x80,0x7b]
-         cfcmovnp	edx, ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovnp	r15, r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x4b,0x4c,0x80,0x7b]
-         cfcmovnp	r15, r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovnp	word ptr [r8 + 4*rax + 123], dx
-# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x4b,0x54,0x80,0x7b]
-         cfcmovnp	word ptr [r8 + 4*rax + 123], dx
-# CHECK: cfcmovnp	dword ptr [r8 + 4*rax + 123], ecx
-# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x4b,0x4c,0x80,0x7b]
-         cfcmovnp	dword ptr [r8 + 4*rax + 123], ecx
-# CHECK: cfcmovnp	qword ptr [r8 + 4*rax + 123], r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x4b,0x4c,0x80,0x7b]
-         cfcmovnp	qword ptr [r8 + 4*rax + 123], r9
-# CHECK: cfcmovnp	dx, word ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x4b,0x54,0x80,0x7b]
-         cfcmovnp	dx, word ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovnp	ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x4b,0x4c,0x80,0x7b]
-         cfcmovnp	ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovnp	r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4b,0x4c,0x80,0x7b]
-         cfcmovnp	r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovnp	ax, dx
-# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x4b,0xc2]
-         cfcmovnp	ax, dx
-# CHECK: cfcmovnp	edx, ecx
-# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x4b,0xd1]
-         cfcmovnp	edx, ecx
-# CHECK: cfcmovnp	r15, r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4b,0xf9]
-         cfcmovnp	r15, r9
-# CHECK: cfcmovns	r9w, ax, dx
-# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x49,0xc2]
-         cfcmovns	r9w, ax, dx
-# CHECK: cfcmovns	r10d, edx, ecx
-# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x49,0xd1]
-         cfcmovns	r10d, edx, ecx
-# CHECK: cfcmovns	r11, r15, r9
-# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x49,0xf9]
-         cfcmovns	r11, r15, r9
-# CHECK: cfcmovns	ax, dx, word ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x49,0x54,0x80,0x7b]
-         cfcmovns	ax, dx, word ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovns	edx, ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x49,0x4c,0x80,0x7b]
-         cfcmovns	edx, ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovns	r15, r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x49,0x4c,0x80,0x7b]
-         cfcmovns	r15, r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovns	word ptr [r8 + 4*rax + 123], dx
-# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x49,0x54,0x80,0x7b]
-         cfcmovns	word ptr [r8 + 4*rax + 123], dx
-# CHECK: cfcmovns	dword ptr [r8 + 4*rax + 123], ecx
-# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x49,0x4c,0x80,0x7b]
-         cfcmovns	dword ptr [r8 + 4*rax + 123], ecx
-# CHECK: cfcmovns	qword ptr [r8 + 4*rax + 123], r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x49,0x4c,0x80,0x7b]
-         cfcmovns	qword ptr [r8 + 4*rax + 123], r9
-# CHECK: cfcmovns	dx, word ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x49,0x54,0x80,0x7b]
-         cfcmovns	dx, word ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovns	ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x49,0x4c,0x80,0x7b]
-         cfcmovns	ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovns	r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x49,0x4c,0x80,0x7b]
-         cfcmovns	r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovns	ax, dx
-# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x49,0xc2]
-         cfcmovns	ax, dx
-# CHECK: cfcmovns	edx, ecx
-# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x49,0xd1]
-         cfcmovns	edx, ecx
-# CHECK: cfcmovns	r15, r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x49,0xf9]
-         cfcmovns	r15, r9
-# CHECK: cfcmovne	r9w, ax, dx
-# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x45,0xc2]
-         cfcmovne	r9w, ax, dx
-# CHECK: cfcmovne	r10d, edx, ecx
-# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x45,0xd1]
-         cfcmovne	r10d, edx, ecx
-# CHECK: cfcmovne	r11, r15, r9
-# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x45,0xf9]
-         cfcmovne	r11, r15, r9
-# CHECK: cfcmovne	ax, dx, word ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x45,0x54,0x80,0x7b]
-         cfcmovne	ax, dx, word ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovne	edx, ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x45,0x4c,0x80,0x7b]
-         cfcmovne	edx, ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovne	r15, r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x45,0x4c,0x80,0x7b]
-         cfcmovne	r15, r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovne	word ptr [r8 + 4*rax + 123], dx
-# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x45,0x54,0x80,0x7b]
-         cfcmovne	word ptr [r8 + 4*rax + 123], dx
-# CHECK: cfcmovne	dword ptr [r8 + 4*rax + 123], ecx
-# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x45,0x4c,0x80,0x7b]
-         cfcmovne	dword ptr [r8 + 4*rax + 123], ecx
-# CHECK: cfcmovne	qword ptr [r8 + 4*rax + 123], r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x45,0x4c,0x80,0x7b]
-         cfcmovne	qword ptr [r8 + 4*rax + 123], r9
-# CHECK: cfcmovne	dx, word ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x45,0x54,0x80,0x7b]
-         cfcmovne	dx, word ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovne	ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x45,0x4c,0x80,0x7b]
-         cfcmovne	ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovne	r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x45,0x4c,0x80,0x7b]
-         cfcmovne	r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovne	ax, dx
-# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x45,0xc2]
-         cfcmovne	ax, dx
-# CHECK: cfcmovne	edx, ecx
-# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x45,0xd1]
-         cfcmovne	edx, ecx
-# CHECK: cfcmovne	r15, r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x45,0xf9]
-         cfcmovne	r15, r9
-# CHECK: cfcmovo	r9w, ax, dx
-# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x40,0xc2]
-         cfcmovo	r9w, ax, dx
-# CHECK: cfcmovo	r10d, edx, ecx
-# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x40,0xd1]
-         cfcmovo	r10d, edx, ecx
-# CHECK: cfcmovo	r11, r15, r9
-# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x40,0xf9]
-         cfcmovo	r11, r15, r9
-# CHECK: cfcmovo	ax, dx, word ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x40,0x54,0x80,0x7b]
-         cfcmovo	ax, dx, word ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovo	edx, ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x40,0x4c,0x80,0x7b]
-         cfcmovo	edx, ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovo	r15, r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x40,0x4c,0x80,0x7b]
-         cfcmovo	r15, r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovo	word ptr [r8 + 4*rax + 123], dx
-# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x40,0x54,0x80,0x7b]
-         cfcmovo	word ptr [r8 + 4*rax + 123], dx
-# CHECK: cfcmovo	dword ptr [r8 + 4*rax + 123], ecx
-# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x40,0x4c,0x80,0x7b]
-         cfcmovo	dword ptr [r8 + 4*rax + 123], ecx
-# CHECK: cfcmovo	qword ptr [r8 + 4*rax + 123], r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x40,0x4c,0x80,0x7b]
-         cfcmovo	qword ptr [r8 + 4*rax + 123], r9
-# CHECK: cfcmovo	dx, word ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x40,0x54,0x80,0x7b]
-         cfcmovo	dx, word ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovo	ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x40,0x4c,0x80,0x7b]
-         cfcmovo	ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovo	r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x40,0x4c,0x80,0x7b]
-         cfcmovo	r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovo	ax, dx
-# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x40,0xc2]
-         cfcmovo	ax, dx
-# CHECK: cfcmovo	edx, ecx
-# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x40,0xd1]
-         cfcmovo	edx, ecx
-# CHECK: cfcmovo	r15, r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x40,0xf9]
-         cfcmovo	r15, r9
-# CHECK: cfcmovp	r9w, ax, dx
-# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x4a,0xc2]
-         cfcmovp	r9w, ax, dx
-# CHECK: cfcmovp	r10d, edx, ecx
-# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x4a,0xd1]
-         cfcmovp	r10d, edx, ecx
-# CHECK: cfcmovp	r11, r15, r9
-# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x4a,0xf9]
-         cfcmovp	r11, r15, r9
-# CHECK: cfcmovp	ax, dx, word ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x4a,0x54,0x80,0x7b]
-         cfcmovp	ax, dx, word ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovp	edx, ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x4a,0x4c,0x80,0x7b]
-         cfcmovp	edx, ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovp	r15, r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x4a,0x4c,0x80,0x7b]
-         cfcmovp	r15, r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovp	word ptr [r8 + 4*rax + 123], dx
-# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x4a,0x54,0x80,0x7b]
-         cfcmovp	word ptr [r8 + 4*rax + 123], dx
-# CHECK: cfcmovp	dword ptr [r8 + 4*rax + 123], ecx
-# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x4a,0x4c,0x80,0x7b]
-         cfcmovp	dword ptr [r8 + 4*rax + 123], ecx
-# CHECK: cfcmovp	qword ptr [r8 + 4*rax + 123], r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x4a,0x4c,0x80,0x7b]
-         cfcmovp	qword ptr [r8 + 4*rax + 123], r9
-# CHECK: cfcmovp	dx, word ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x4a,0x54,0x80,0x7b]
-         cfcmovp	dx, word ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovp	ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x4a,0x4c,0x80,0x7b]
-         cfcmovp	ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovp	r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4a,0x4c,0x80,0x7b]
-         cfcmovp	r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovp	ax, dx
-# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x4a,0xc2]
-         cfcmovp	ax, dx
-# CHECK: cfcmovp	edx, ecx
-# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x4a,0xd1]
-         cfcmovp	edx, ecx
-# CHECK: cfcmovp	r15, r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x4a,0xf9]
-         cfcmovp	r15, r9
-# CHECK: cfcmovs	r9w, ax, dx
-# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x48,0xc2]
-         cfcmovs	r9w, ax, dx
-# CHECK: cfcmovs	r10d, edx, ecx
-# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x48,0xd1]
-         cfcmovs	r10d, edx, ecx
-# CHECK: cfcmovs	r11, r15, r9
-# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x48,0xf9]
-         cfcmovs	r11, r15, r9
-# CHECK: cfcmovs	ax, dx, word ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x48,0x54,0x80,0x7b]
-         cfcmovs	ax, dx, word ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovs	edx, ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x48,0x4c,0x80,0x7b]
-         cfcmovs	edx, ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovs	r15, r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x48,0x4c,0x80,0x7b]
-         cfcmovs	r15, r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovs	word ptr [r8 + 4*rax + 123], dx
-# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x48,0x54,0x80,0x7b]
-         cfcmovs	word ptr [r8 + 4*rax + 123], dx
-# CHECK: cfcmovs	dword ptr [r8 + 4*rax + 123], ecx
-# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x48,0x4c,0x80,0x7b]
-         cfcmovs	dword ptr [r8 + 4*rax + 123], ecx
-# CHECK: cfcmovs	qword ptr [r8 + 4*rax + 123], r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x48,0x4c,0x80,0x7b]
-         cfcmovs	qword ptr [r8 + 4*rax + 123], r9
-# CHECK: cfcmovs	dx, word ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x48,0x54,0x80,0x7b]
-         cfcmovs	dx, word ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovs	ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x48,0x4c,0x80,0x7b]
-         cfcmovs	ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovs	r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x48,0x4c,0x80,0x7b]
-         cfcmovs	r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmovs	ax, dx
-# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x48,0xc2]
-         cfcmovs	ax, dx
-# CHECK: cfcmovs	edx, ecx
-# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x48,0xd1]
-         cfcmovs	edx, ecx
-# CHECK: cfcmovs	r15, r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x48,0xf9]
-         cfcmovs	r15, r9
-# CHECK: cfcmove	r9w, ax, dx
-# CHECK: encoding: [0x62,0xf4,0x35,0x1c,0x44,0xc2]
-         cfcmove	r9w, ax, dx
-# CHECK: cfcmove	r10d, edx, ecx
-# CHECK: encoding: [0x62,0xf4,0x2c,0x1c,0x44,0xd1]
-         cfcmove	r10d, edx, ecx
-# CHECK: cfcmove	r11, r15, r9
-# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x44,0xf9]
-         cfcmove	r11, r15, r9
-# CHECK: cfcmove	ax, dx, word ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7d,0x1c,0x44,0x54,0x80,0x7b]
-         cfcmove	ax, dx, word ptr [r8 + 4*rax + 123]
-# CHECK: cfcmove	edx, ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x6c,0x1c,0x44,0x4c,0x80,0x7b]
-         cfcmove	edx, ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmove	r15, r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0x54,0x84,0x1c,0x44,0x4c,0x80,0x7b]
-         cfcmove	r15, r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmove	word ptr [r8 + 4*rax + 123], dx
-# CHECK: encoding: [0x62,0xd4,0x7d,0x0c,0x44,0x54,0x80,0x7b]
-         cfcmove	word ptr [r8 + 4*rax + 123], dx
-# CHECK: cfcmove	dword ptr [r8 + 4*rax + 123], ecx
-# CHECK: encoding: [0x62,0xd4,0x7c,0x0c,0x44,0x4c,0x80,0x7b]
-         cfcmove	dword ptr [r8 + 4*rax + 123], ecx
-# CHECK: cfcmove	qword ptr [r8 + 4*rax + 123], r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x0c,0x44,0x4c,0x80,0x7b]
-         cfcmove	qword ptr [r8 + 4*rax + 123], r9
-# CHECK: cfcmove	dx, word ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7d,0x08,0x44,0x54,0x80,0x7b]
-         cfcmove	dx, word ptr [r8 + 4*rax + 123]
-# CHECK: cfcmove	ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0xd4,0x7c,0x08,0x44,0x4c,0x80,0x7b]
-         cfcmove	ecx, dword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmove	r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x44,0x4c,0x80,0x7b]
-         cfcmove	r9, qword ptr [r8 + 4*rax + 123]
-# CHECK: cfcmove	ax, dx
-# CHECK: encoding: [0x62,0xf4,0x7d,0x08,0x44,0xc2]
-         cfcmove	ax, dx
-# CHECK: cfcmove	edx, ecx
-# CHECK: encoding: [0x62,0xf4,0x7c,0x08,0x44,0xd1]
-         cfcmove	edx, ecx
-# CHECK: cfcmove	r15, r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x44,0xf9]
-         cfcmove	r15, r9
+# RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
+
+# CHECK: cfcmovb	r25w, r21w, r17w
+# CHECK: encoding: [0x62,0xec,0x35,0x14,0x42,0xe9]
+         cfcmovb	r25w, r21w, r17w
+
+# CHECK: cfcmovb	r21w, r17w
+# CHECK: encoding: [0x62,0xec,0x7d,0x0c,0x42,0xcd]
+         cfcmovb	r21w, r17w
+
+# CHECK: cfcmovb	word ptr [r28 + 4*r29 + 291], r17w
+# CHECK: encoding: [0x62,0x8c,0x79,0x0c,0x42,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovb	word ptr [r28 + 4*r29 + 291], r17w
+
+# CHECK: cfcmovb	r26d, r22d, r18d
+# CHECK: encoding: [0x62,0xec,0x2c,0x14,0x42,0xf2]
+         cfcmovb	r26d, r22d, r18d
+
+# CHECK: cfcmovb	r22d, r18d
+# CHECK: encoding: [0x62,0xec,0x7c,0x0c,0x42,0xd6]
+         cfcmovb	r22d, r18d
+
+# CHECK: cfcmovb	dword ptr [r28 + 4*r29 + 291], r18d
+# CHECK: encoding: [0x62,0x8c,0x78,0x0c,0x42,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovb	dword ptr [r28 + 4*r29 + 291], r18d
+
+# CHECK: cfcmovb	r27, r23, r19
+# CHECK: encoding: [0x62,0xec,0xa4,0x14,0x42,0xfb]
+         cfcmovb	r27, r23, r19
+
+# CHECK: cfcmovb	r23, r19
+# CHECK: encoding: [0x62,0xec,0xfc,0x0c,0x42,0xdf]
+         cfcmovb	r23, r19
+
+# CHECK: cfcmovb	qword ptr [r28 + 4*r29 + 291], r19
+# CHECK: encoding: [0x62,0x8c,0xf8,0x0c,0x42,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovb	qword ptr [r28 + 4*r29 + 291], r19
+
+# CHECK: cfcmovb	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x51,0x14,0x42,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovb	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovb	r17w, word ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x79,0x08,0x42,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovb	r17w, word ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovb	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x48,0x14,0x42,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovb	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovb	r18d, dword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x78,0x08,0x42,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovb	r18d, dword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovb	r23, r19, qword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0xc0,0x14,0x42,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovb	r23, r19, qword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovb	r19, qword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0x42,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovb	r19, qword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovbe	r25w, r21w, r17w
+# CHECK: encoding: [0x62,0xec,0x35,0x14,0x46,0xe9]
+         cfcmovbe	r25w, r21w, r17w
+
+# CHECK: cfcmovbe	r21w, r17w
+# CHECK: encoding: [0x62,0xec,0x7d,0x0c,0x46,0xcd]
+         cfcmovbe	r21w, r17w
+
+# CHECK: cfcmovbe	word ptr [r28 + 4*r29 + 291], r17w
+# CHECK: encoding: [0x62,0x8c,0x79,0x0c,0x46,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovbe	word ptr [r28 + 4*r29 + 291], r17w
+
+# CHECK: cfcmovbe	r26d, r22d, r18d
+# CHECK: encoding: [0x62,0xec,0x2c,0x14,0x46,0xf2]
+         cfcmovbe	r26d, r22d, r18d
+
+# CHECK: cfcmovbe	r22d, r18d
+# CHECK: encoding: [0x62,0xec,0x7c,0x0c,0x46,0xd6]
+         cfcmovbe	r22d, r18d
+
+# CHECK: cfcmovbe	dword ptr [r28 + 4*r29 + 291], r18d
+# CHECK: encoding: [0x62,0x8c,0x78,0x0c,0x46,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovbe	dword ptr [r28 + 4*r29 + 291], r18d
+
+# CHECK: cfcmovbe	r27, r23, r19
+# CHECK: encoding: [0x62,0xec,0xa4,0x14,0x46,0xfb]
+         cfcmovbe	r27, r23, r19
+
+# CHECK: cfcmovbe	r23, r19
+# CHECK: encoding: [0x62,0xec,0xfc,0x0c,0x46,0xdf]
+         cfcmovbe	r23, r19
+
+# CHECK: cfcmovbe	qword ptr [r28 + 4*r29 + 291], r19
+# CHECK: encoding: [0x62,0x8c,0xf8,0x0c,0x46,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovbe	qword ptr [r28 + 4*r29 + 291], r19
+
+# CHECK: cfcmovbe	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x51,0x14,0x46,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovbe	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovbe	r17w, word ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x79,0x08,0x46,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovbe	r17w, word ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovbe	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x48,0x14,0x46,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovbe	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovbe	r18d, dword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x78,0x08,0x46,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovbe	r18d, dword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovbe	r23, r19, qword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0xc0,0x14,0x46,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovbe	r23, r19, qword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovbe	r19, qword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0x46,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovbe	r19, qword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovl	r25w, r21w, r17w
+# CHECK: encoding: [0x62,0xec,0x35,0x14,0x4c,0xe9]
+         cfcmovl	r25w, r21w, r17w
+
+# CHECK: cfcmovl	r21w, r17w
+# CHECK: encoding: [0x62,0xec,0x7d,0x0c,0x4c,0xcd]
+         cfcmovl	r21w, r17w
+
+# CHECK: cfcmovl	word ptr [r28 + 4*r29 + 291], r17w
+# CHECK: encoding: [0x62,0x8c,0x79,0x0c,0x4c,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovl	word ptr [r28 + 4*r29 + 291], r17w
+
+# CHECK: cfcmovl	r26d, r22d, r18d
+# CHECK: encoding: [0x62,0xec,0x2c,0x14,0x4c,0xf2]
+         cfcmovl	r26d, r22d, r18d
+
+# CHECK: cfcmovl	r22d, r18d
+# CHECK: encoding: [0x62,0xec,0x7c,0x0c,0x4c,0xd6]
+         cfcmovl	r22d, r18d
+
+# CHECK: cfcmovl	dword ptr [r28 + 4*r29 + 291], r18d
+# CHECK: encoding: [0x62,0x8c,0x78,0x0c,0x4c,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovl	dword ptr [r28 + 4*r29 + 291], r18d
+
+# CHECK: cfcmovl	r27, r23, r19
+# CHECK: encoding: [0x62,0xec,0xa4,0x14,0x4c,0xfb]
+         cfcmovl	r27, r23, r19
+
+# CHECK: cfcmovl	r23, r19
+# CHECK: encoding: [0x62,0xec,0xfc,0x0c,0x4c,0xdf]
+         cfcmovl	r23, r19
+
+# CHECK: cfcmovl	qword ptr [r28 + 4*r29 + 291], r19
+# CHECK: encoding: [0x62,0x8c,0xf8,0x0c,0x4c,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovl	qword ptr [r28 + 4*r29 + 291], r19
+
+# CHECK: cfcmovl	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x51,0x14,0x4c,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovl	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovl	r17w, word ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x79,0x08,0x4c,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovl	r17w, word ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovl	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x48,0x14,0x4c,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovl	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovl	r18d, dword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x78,0x08,0x4c,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovl	r18d, dword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovl	r23, r19, qword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0xc0,0x14,0x4c,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovl	r23, r19, qword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovl	r19, qword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0x4c,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovl	r19, qword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovle	r25w, r21w, r17w
+# CHECK: encoding: [0x62,0xec,0x35,0x14,0x4e,0xe9]
+         cfcmovle	r25w, r21w, r17w
+
+# CHECK: cfcmovle	r21w, r17w
+# CHECK: encoding: [0x62,0xec,0x7d,0x0c,0x4e,0xcd]
+         cfcmovle	r21w, r17w
+
+# CHECK: cfcmovle	word ptr [r28 + 4*r29 + 291], r17w
+# CHECK: encoding: [0x62,0x8c,0x79,0x0c,0x4e,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovle	word ptr [r28 + 4*r29 + 291], r17w
+
+# CHECK: cfcmovle	r26d, r22d, r18d
+# CHECK: encoding: [0x62,0xec,0x2c,0x14,0x4e,0xf2]
+         cfcmovle	r26d, r22d, r18d
+
+# CHECK: cfcmovle	r22d, r18d
+# CHECK: encoding: [0x62,0xec,0x7c,0x0c,0x4e,0xd6]
+         cfcmovle	r22d, r18d
+
+# CHECK: cfcmovle	dword ptr [r28 + 4*r29 + 291], r18d
+# CHECK: encoding: [0x62,0x8c,0x78,0x0c,0x4e,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovle	dword ptr [r28 + 4*r29 + 291], r18d
+
+# CHECK: cfcmovle	r27, r23, r19
+# CHECK: encoding: [0x62,0xec,0xa4,0x14,0x4e,0xfb]
+         cfcmovle	r27, r23, r19
+
+# CHECK: cfcmovle	r23, r19
+# CHECK: encoding: [0x62,0xec,0xfc,0x0c,0x4e,0xdf]
+         cfcmovle	r23, r19
+
+# CHECK: cfcmovle	qword ptr [r28 + 4*r29 + 291], r19
+# CHECK: encoding: [0x62,0x8c,0xf8,0x0c,0x4e,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovle	qword ptr [r28 + 4*r29 + 291], r19
+
+# CHECK: cfcmovle	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x51,0x14,0x4e,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovle	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovle	r17w, word ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x79,0x08,0x4e,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovle	r17w, word ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovle	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x48,0x14,0x4e,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovle	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovle	r18d, dword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x78,0x08,0x4e,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovle	r18d, dword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovle	r23, r19, qword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0xc0,0x14,0x4e,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovle	r23, r19, qword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovle	r19, qword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0x4e,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovle	r19, qword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovae	r25w, r21w, r17w
+# CHECK: encoding: [0x62,0xec,0x35,0x14,0x43,0xe9]
+         cfcmovae	r25w, r21w, r17w
+
+# CHECK: cfcmovae	r21w, r17w
+# CHECK: encoding: [0x62,0xec,0x7d,0x0c,0x43,0xcd]
+         cfcmovae	r21w, r17w
+
+# CHECK: cfcmovae	word ptr [r28 + 4*r29 + 291], r17w
+# CHECK: encoding: [0x62,0x8c,0x79,0x0c,0x43,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovae	word ptr [r28 + 4*r29 + 291], r17w
+
+# CHECK: cfcmovae	r26d, r22d, r18d
+# CHECK: encoding: [0x62,0xec,0x2c,0x14,0x43,0xf2]
+         cfcmovae	r26d, r22d, r18d
+
+# CHECK: cfcmovae	r22d, r18d
+# CHECK: encoding: [0x62,0xec,0x7c,0x0c,0x43,0xd6]
+         cfcmovae	r22d, r18d
+
+# CHECK: cfcmovae	dword ptr [r28 + 4*r29 + 291], r18d
+# CHECK: encoding: [0x62,0x8c,0x78,0x0c,0x43,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovae	dword ptr [r28 + 4*r29 + 291], r18d
+
+# CHECK: cfcmovae	r27, r23, r19
+# CHECK: encoding: [0x62,0xec,0xa4,0x14,0x43,0xfb]
+         cfcmovae	r27, r23, r19
+
+# CHECK: cfcmovae	r23, r19
+# CHECK: encoding: [0x62,0xec,0xfc,0x0c,0x43,0xdf]
+         cfcmovae	r23, r19
+
+# CHECK: cfcmovae	qword ptr [r28 + 4*r29 + 291], r19
+# CHECK: encoding: [0x62,0x8c,0xf8,0x0c,0x43,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovae	qword ptr [r28 + 4*r29 + 291], r19
+
+# CHECK: cfcmovae	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x51,0x14,0x43,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovae	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovae	r17w, word ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x79,0x08,0x43,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovae	r17w, word ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovae	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x48,0x14,0x43,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovae	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovae	r18d, dword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x78,0x08,0x43,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovae	r18d, dword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovae	r23, r19, qword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0xc0,0x14,0x43,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovae	r23, r19, qword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovae	r19, qword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0x43,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovae	r19, qword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmova	r25w, r21w, r17w
+# CHECK: encoding: [0x62,0xec,0x35,0x14,0x47,0xe9]
+         cfcmova	r25w, r21w, r17w
+
+# CHECK: cfcmova	r21w, r17w
+# CHECK: encoding: [0x62,0xec,0x7d,0x0c,0x47,0xcd]
+         cfcmova	r21w, r17w
+
+# CHECK: cfcmova	word ptr [r28 + 4*r29 + 291], r17w
+# CHECK: encoding: [0x62,0x8c,0x79,0x0c,0x47,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmova	word ptr [r28 + 4*r29 + 291], r17w
+
+# CHECK: cfcmova	r26d, r22d, r18d
+# CHECK: encoding: [0x62,0xec,0x2c,0x14,0x47,0xf2]
+         cfcmova	r26d, r22d, r18d
+
+# CHECK: cfcmova	r22d, r18d
+# CHECK: encoding: [0x62,0xec,0x7c,0x0c,0x47,0xd6]
+         cfcmova	r22d, r18d
+
+# CHECK: cfcmova	dword ptr [r28 + 4*r29 + 291], r18d
+# CHECK: encoding: [0x62,0x8c,0x78,0x0c,0x47,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmova	dword ptr [r28 + 4*r29 + 291], r18d
+
+# CHECK: cfcmova	r27, r23, r19
+# CHECK: encoding: [0x62,0xec,0xa4,0x14,0x47,0xfb]
+         cfcmova	r27, r23, r19
+
+# CHECK: cfcmova	r23, r19
+# CHECK: encoding: [0x62,0xec,0xfc,0x0c,0x47,0xdf]
+         cfcmova	r23, r19
+
+# CHECK: cfcmova	qword ptr [r28 + 4*r29 + 291], r19
+# CHECK: encoding: [0x62,0x8c,0xf8,0x0c,0x47,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmova	qword ptr [r28 + 4*r29 + 291], r19
+
+# CHECK: cfcmova	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x51,0x14,0x47,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmova	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmova	r17w, word ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x79,0x08,0x47,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmova	r17w, word ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmova	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x48,0x14,0x47,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmova	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmova	r18d, dword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x78,0x08,0x47,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmova	r18d, dword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmova	r23, r19, qword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0xc0,0x14,0x47,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmova	r23, r19, qword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmova	r19, qword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0x47,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmova	r19, qword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovge	r25w, r21w, r17w
+# CHECK: encoding: [0x62,0xec,0x35,0x14,0x4d,0xe9]
+         cfcmovge	r25w, r21w, r17w
+
+# CHECK: cfcmovge	r21w, r17w
+# CHECK: encoding: [0x62,0xec,0x7d,0x0c,0x4d,0xcd]
+         cfcmovge	r21w, r17w
+
+# CHECK: cfcmovge	word ptr [r28 + 4*r29 + 291], r17w
+# CHECK: encoding: [0x62,0x8c,0x79,0x0c,0x4d,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovge	word ptr [r28 + 4*r29 + 291], r17w
+
+# CHECK: cfcmovge	r26d, r22d, r18d
+# CHECK: encoding: [0x62,0xec,0x2c,0x14,0x4d,0xf2]
+         cfcmovge	r26d, r22d, r18d
+
+# CHECK: cfcmovge	r22d, r18d
+# CHECK: encoding: [0x62,0xec,0x7c,0x0c,0x4d,0xd6]
+         cfcmovge	r22d, r18d
+
+# CHECK: cfcmovge	dword ptr [r28 + 4*r29 + 291], r18d
+# CHECK: encoding: [0x62,0x8c,0x78,0x0c,0x4d,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovge	dword ptr [r28 + 4*r29 + 291], r18d
+
+# CHECK: cfcmovge	r27, r23, r19
+# CHECK: encoding: [0x62,0xec,0xa4,0x14,0x4d,0xfb]
+         cfcmovge	r27, r23, r19
+
+# CHECK: cfcmovge	r23, r19
+# CHECK: encoding: [0x62,0xec,0xfc,0x0c,0x4d,0xdf]
+         cfcmovge	r23, r19
+
+# CHECK: cfcmovge	qword ptr [r28 + 4*r29 + 291], r19
+# CHECK: encoding: [0x62,0x8c,0xf8,0x0c,0x4d,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovge	qword ptr [r28 + 4*r29 + 291], r19
+
+# CHECK: cfcmovge	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x51,0x14,0x4d,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovge	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovge	r17w, word ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x79,0x08,0x4d,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovge	r17w, word ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovge	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x48,0x14,0x4d,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovge	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovge	r18d, dword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x78,0x08,0x4d,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovge	r18d, dword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovge	r23, r19, qword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0xc0,0x14,0x4d,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovge	r23, r19, qword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovge	r19, qword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0x4d,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovge	r19, qword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovno	r25w, r21w, r17w
+# CHECK: encoding: [0x62,0xec,0x35,0x14,0x41,0xe9]
+         cfcmovno	r25w, r21w, r17w
+
+# CHECK: cfcmovno	r21w, r17w
+# CHECK: encoding: [0x62,0xec,0x7d,0x0c,0x41,0xcd]
+         cfcmovno	r21w, r17w
+
+# CHECK: cfcmovno	word ptr [r28 + 4*r29 + 291], r17w
+# CHECK: encoding: [0x62,0x8c,0x79,0x0c,0x41,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovno	word ptr [r28 + 4*r29 + 291], r17w
+
+# CHECK: cfcmovno	r26d, r22d, r18d
+# CHECK: encoding: [0x62,0xec,0x2c,0x14,0x41,0xf2]
+         cfcmovno	r26d, r22d, r18d
+
+# CHECK: cfcmovno	r22d, r18d
+# CHECK: encoding: [0x62,0xec,0x7c,0x0c,0x41,0xd6]
+         cfcmovno	r22d, r18d
+
+# CHECK: cfcmovno	dword ptr [r28 + 4*r29 + 291], r18d
+# CHECK: encoding: [0x62,0x8c,0x78,0x0c,0x41,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovno	dword ptr [r28 + 4*r29 + 291], r18d
+
+# CHECK: cfcmovno	r27, r23, r19
+# CHECK: encoding: [0x62,0xec,0xa4,0x14,0x41,0xfb]
+         cfcmovno	r27, r23, r19
+
+# CHECK: cfcmovno	r23, r19
+# CHECK: encoding: [0x62,0xec,0xfc,0x0c,0x41,0xdf]
+         cfcmovno	r23, r19
+
+# CHECK: cfcmovno	qword ptr [r28 + 4*r29 + 291], r19
+# CHECK: encoding: [0x62,0x8c,0xf8,0x0c,0x41,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovno	qword ptr [r28 + 4*r29 + 291], r19
+
+# CHECK: cfcmovno	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x51,0x14,0x41,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovno	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovno	r17w, word ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x79,0x08,0x41,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovno	r17w, word ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovno	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x48,0x14,0x41,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovno	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovno	r18d, dword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x78,0x08,0x41,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovno	r18d, dword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovno	r23, r19, qword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0xc0,0x14,0x41,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovno	r23, r19, qword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovno	r19, qword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0x41,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovno	r19, qword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovnp	r25w, r21w, r17w
+# CHECK: encoding: [0x62,0xec,0x35,0x14,0x4b,0xe9]
+         cfcmovnp	r25w, r21w, r17w
+
+# CHECK: cfcmovnp	r21w, r17w
+# CHECK: encoding: [0x62,0xec,0x7d,0x0c,0x4b,0xcd]
+         cfcmovnp	r21w, r17w
+
+# CHECK: cfcmovnp	word ptr [r28 + 4*r29 + 291], r17w
+# CHECK: encoding: [0x62,0x8c,0x79,0x0c,0x4b,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnp	word ptr [r28 + 4*r29 + 291], r17w
+
+# CHECK: cfcmovnp	r26d, r22d, r18d
+# CHECK: encoding: [0x62,0xec,0x2c,0x14,0x4b,0xf2]
+         cfcmovnp	r26d, r22d, r18d
+
+# CHECK: cfcmovnp	r22d, r18d
+# CHECK: encoding: [0x62,0xec,0x7c,0x0c,0x4b,0xd6]
+         cfcmovnp	r22d, r18d
+
+# CHECK: cfcmovnp	dword ptr [r28 + 4*r29 + 291], r18d
+# CHECK: encoding: [0x62,0x8c,0x78,0x0c,0x4b,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnp	dword ptr [r28 + 4*r29 + 291], r18d
+
+# CHECK: cfcmovnp	r27, r23, r19
+# CHECK: encoding: [0x62,0xec,0xa4,0x14,0x4b,0xfb]
+         cfcmovnp	r27, r23, r19
+
+# CHECK: cfcmovnp	r23, r19
+# CHECK: encoding: [0x62,0xec,0xfc,0x0c,0x4b,0xdf]
+         cfcmovnp	r23, r19
+
+# CHECK: cfcmovnp	qword ptr [r28 + 4*r29 + 291], r19
+# CHECK: encoding: [0x62,0x8c,0xf8,0x0c,0x4b,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnp	qword ptr [r28 + 4*r29 + 291], r19
+
+# CHECK: cfcmovnp	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x51,0x14,0x4b,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnp	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovnp	r17w, word ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x79,0x08,0x4b,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnp	r17w, word ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovnp	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x48,0x14,0x4b,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnp	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovnp	r18d, dword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x78,0x08,0x4b,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnp	r18d, dword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovnp	r23, r19, qword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0xc0,0x14,0x4b,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnp	r23, r19, qword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovnp	r19, qword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0x4b,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovnp	r19, qword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovns	r25w, r21w, r17w
+# CHECK: encoding: [0x62,0xec,0x35,0x14,0x49,0xe9]
+         cfcmovns	r25w, r21w, r17w
+
+# CHECK: cfcmovns	r21w, r17w
+# CHECK: encoding: [0x62,0xec,0x7d,0x0c,0x49,0xcd]
+         cfcmovns	r21w, r17w
+
+# CHECK: cfcmovns	word ptr [r28 + 4*r29 + 291], r17w
+# CHECK: encoding: [0x62,0x8c,0x79,0x0c,0x49,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovns	word ptr [r28 + 4*r29 + 291], r17w
+
+# CHECK: cfcmovns	r26d, r22d, r18d
+# CHECK: encoding: [0x62,0xec,0x2c,0x14,0x49,0xf2]
+         cfcmovns	r26d, r22d, r18d
+
+# CHECK: cfcmovns	r22d, r18d
+# CHECK: encoding: [0x62,0xec,0x7c,0x0c,0x49,0xd6]
+         cfcmovns	r22d, r18d
+
+# CHECK: cfcmovns	dword ptr [r28 + 4*r29 + 291], r18d
+# CHECK: encoding: [0x62,0x8c,0x78,0x0c,0x49,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovns	dword ptr [r28 + 4*r29 + 291], r18d
+
+# CHECK: cfcmovns	r27, r23, r19
+# CHECK: encoding: [0x62,0xec,0xa4,0x14,0x49,0xfb]
+         cfcmovns	r27, r23, r19
+
+# CHECK: cfcmovns	r23, r19
+# CHECK: encoding: [0x62,0xec,0xfc,0x0c,0x49,0xdf]
+         cfcmovns	r23, r19
+
+# CHECK: cfcmovns	qword ptr [r28 + 4*r29 + 291], r19
+# CHECK: encoding: [0x62,0x8c,0xf8,0x0c,0x49,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovns	qword ptr [r28 + 4*r29 + 291], r19
+
+# CHECK: cfcmovns	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x51,0x14,0x49,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovns	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovns	r17w, word ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x79,0x08,0x49,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovns	r17w, word ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovns	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x48,0x14,0x49,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovns	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovns	r18d, dword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x78,0x08,0x49,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovns	r18d, dword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovns	r23, r19, qword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0xc0,0x14,0x49,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovns	r23, r19, qword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovns	r19, qword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0x49,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovns	r19, qword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovne	r25w, r21w, r17w
+# CHECK: encoding: [0x62,0xec,0x35,0x14,0x45,0xe9]
+         cfcmovne	r25w, r21w, r17w
+
+# CHECK: cfcmovne	r21w, r17w
+# CHECK: encoding: [0x62,0xec,0x7d,0x0c,0x45,0xcd]
+         cfcmovne	r21w, r17w
+
+# CHECK: cfcmovne	word ptr [r28 + 4*r29 + 291], r17w
+# CHECK: encoding: [0x62,0x8c,0x79,0x0c,0x45,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovne	word ptr [r28 + 4*r29 + 291], r17w
+
+# CHECK: cfcmovne	r26d, r22d, r18d
+# CHECK: encoding: [0x62,0xec,0x2c,0x14,0x45,0xf2]
+         cfcmovne	r26d, r22d, r18d
+
+# CHECK: cfcmovne	r22d, r18d
+# CHECK: encoding: [0x62,0xec,0x7c,0x0c,0x45,0xd6]
+         cfcmovne	r22d, r18d
+
+# CHECK: cfcmovne	dword ptr [r28 + 4*r29 + 291], r18d
+# CHECK: encoding: [0x62,0x8c,0x78,0x0c,0x45,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovne	dword ptr [r28 + 4*r29 + 291], r18d
+
+# CHECK: cfcmovne	r27, r23, r19
+# CHECK: encoding: [0x62,0xec,0xa4,0x14,0x45,0xfb]
+         cfcmovne	r27, r23, r19
+
+# CHECK: cfcmovne	r23, r19
+# CHECK: encoding: [0x62,0xec,0xfc,0x0c,0x45,0xdf]
+         cfcmovne	r23, r19
+
+# CHECK: cfcmovne	qword ptr [r28 + 4*r29 + 291], r19
+# CHECK: encoding: [0x62,0x8c,0xf8,0x0c,0x45,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovne	qword ptr [r28 + 4*r29 + 291], r19
+
+# CHECK: cfcmovne	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x51,0x14,0x45,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovne	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovne	r17w, word ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x79,0x08,0x45,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovne	r17w, word ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovne	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x48,0x14,0x45,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovne	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovne	r18d, dword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x78,0x08,0x45,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovne	r18d, dword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovne	r23, r19, qword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0xc0,0x14,0x45,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovne	r23, r19, qword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovne	r19, qword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0x45,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovne	r19, qword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovp	r25w, r21w, r17w
+# CHECK: encoding: [0x62,0xec,0x35,0x14,0x4a,0xe9]
+         cfcmovp	r25w, r21w, r17w
+
+# CHECK: cfcmovp	r21w, r17w
+# CHECK: encoding: [0x62,0xec,0x7d,0x0c,0x4a,0xcd]
+         cfcmovp	r21w, r17w
+
+# CHECK: cfcmovp	word ptr [r28 + 4*r29 + 291], r17w
+# CHECK: encoding: [0x62,0x8c,0x79,0x0c,0x4a,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovp	word ptr [r28 + 4*r29 + 291], r17w
+
+# CHECK: cfcmovp	r26d, r22d, r18d
+# CHECK: encoding: [0x62,0xec,0x2c,0x14,0x4a,0xf2]
+         cfcmovp	r26d, r22d, r18d
+
+# CHECK: cfcmovp	r22d, r18d
+# CHECK: encoding: [0x62,0xec,0x7c,0x0c,0x4a,0xd6]
+         cfcmovp	r22d, r18d
+
+# CHECK: cfcmovp	dword ptr [r28 + 4*r29 + 291], r18d
+# CHECK: encoding: [0x62,0x8c,0x78,0x0c,0x4a,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovp	dword ptr [r28 + 4*r29 + 291], r18d
+
+# CHECK: cfcmovp	r27, r23, r19
+# CHECK: encoding: [0x62,0xec,0xa4,0x14,0x4a,0xfb]
+         cfcmovp	r27, r23, r19
+
+# CHECK: cfcmovp	r23, r19
+# CHECK: encoding: [0x62,0xec,0xfc,0x0c,0x4a,0xdf]
+         cfcmovp	r23, r19
+
+# CHECK: cfcmovp	qword ptr [r28 + 4*r29 + 291], r19
+# CHECK: encoding: [0x62,0x8c,0xf8,0x0c,0x4a,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovp	qword ptr [r28 + 4*r29 + 291], r19
+
+# CHECK: cfcmovp	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x51,0x14,0x4a,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovp	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovp	r17w, word ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x79,0x08,0x4a,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovp	r17w, word ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovp	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x48,0x14,0x4a,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovp	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovp	r18d, dword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x78,0x08,0x4a,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovp	r18d, dword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovp	r23, r19, qword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0xc0,0x14,0x4a,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovp	r23, r19, qword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovp	r19, qword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0x4a,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovp	r19, qword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovs	r25w, r21w, r17w
+# CHECK: encoding: [0x62,0xec,0x35,0x14,0x48,0xe9]
+         cfcmovs	r25w, r21w, r17w
+
+# CHECK: cfcmovs	r21w, r17w
+# CHECK: encoding: [0x62,0xec,0x7d,0x0c,0x48,0xcd]
+         cfcmovs	r21w, r17w
+
+# CHECK: cfcmovs	word ptr [r28 + 4*r29 + 291], r17w
+# CHECK: encoding: [0x62,0x8c,0x79,0x0c,0x48,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovs	word ptr [r28 + 4*r29 + 291], r17w
+
+# CHECK: cfcmovs	r26d, r22d, r18d
+# CHECK: encoding: [0x62,0xec,0x2c,0x14,0x48,0xf2]
+         cfcmovs	r26d, r22d, r18d
+
+# CHECK: cfcmovs	r22d, r18d
+# CHECK: encoding: [0x62,0xec,0x7c,0x0c,0x48,0xd6]
+         cfcmovs	r22d, r18d
+
+# CHECK: cfcmovs	dword ptr [r28 + 4*r29 + 291], r18d
+# CHECK: encoding: [0x62,0x8c,0x78,0x0c,0x48,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovs	dword ptr [r28 + 4*r29 + 291], r18d
+
+# CHECK: cfcmovs	r27, r23, r19
+# CHECK: encoding: [0x62,0xec,0xa4,0x14,0x48,0xfb]
+         cfcmovs	r27, r23, r19
+
+# CHECK: cfcmovs	r23, r19
+# CHECK: encoding: [0x62,0xec,0xfc,0x0c,0x48,0xdf]
+         cfcmovs	r23, r19
+
+# CHECK: cfcmovs	qword ptr [r28 + 4*r29 + 291], r19
+# CHECK: encoding: [0x62,0x8c,0xf8,0x0c,0x48,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovs	qword ptr [r28 + 4*r29 + 291], r19
+
+# CHECK: cfcmovs	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x51,0x14,0x48,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovs	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovs	r17w, word ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x79,0x08,0x48,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovs	r17w, word ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovs	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x48,0x14,0x48,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovs	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovs	r18d, dword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x78,0x08,0x48,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmovs	r18d, dword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovs	r23, r19, qword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0xc0,0x14,0x48,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovs	r23, r19, qword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmovs	r19, qword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0x48,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmovs	r19, qword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmove	r25w, r21w, r17w
+# CHECK: encoding: [0x62,0xec,0x35,0x14,0x44,0xe9]
+         cfcmove	r25w, r21w, r17w
+
+# CHECK: cfcmove	r21w, r17w
+# CHECK: encoding: [0x62,0xec,0x7d,0x0c,0x44,0xcd]
+         cfcmove	r21w, r17w
+
+# CHECK: cfcmove	word ptr [r28 + 4*r29 + 291], r17w
+# CHECK: encoding: [0x62,0x8c,0x79,0x0c,0x44,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmove	word ptr [r28 + 4*r29 + 291], r17w
+
+# CHECK: cfcmove	r26d, r22d, r18d
+# CHECK: encoding: [0x62,0xec,0x2c,0x14,0x44,0xf2]
+         cfcmove	r26d, r22d, r18d
+
+# CHECK: cfcmove	r22d, r18d
+# CHECK: encoding: [0x62,0xec,0x7c,0x0c,0x44,0xd6]
+         cfcmove	r22d, r18d
+
+# CHECK: cfcmove	dword ptr [r28 + 4*r29 + 291], r18d
+# CHECK: encoding: [0x62,0x8c,0x78,0x0c,0x44,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmove	dword ptr [r28 + 4*r29 + 291], r18d
+
+# CHECK: cfcmove	r27, r23, r19
+# CHECK: encoding: [0x62,0xec,0xa4,0x14,0x44,0xfb]
+         cfcmove	r27, r23, r19
+
+# CHECK: cfcmove	r23, r19
+# CHECK: encoding: [0x62,0xec,0xfc,0x0c,0x44,0xdf]
+         cfcmove	r23, r19
+
+# CHECK: cfcmove	qword ptr [r28 + 4*r29 + 291], r19
+# CHECK: encoding: [0x62,0x8c,0xf8,0x0c,0x44,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmove	qword ptr [r28 + 4*r29 + 291], r19
+
+# CHECK: cfcmove	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x51,0x14,0x44,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmove	r21w, r17w, word ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmove	r17w, word ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x79,0x08,0x44,0x8c,0xac,0x23,0x01,0x00,0x00]
+         cfcmove	r17w, word ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmove	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x48,0x14,0x44,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmove	r22d, r18d, dword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmove	r18d, dword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0x78,0x08,0x44,0x94,0xac,0x23,0x01,0x00,0x00]
+         cfcmove	r18d, dword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmove	r23, r19, qword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0xc0,0x14,0x44,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmove	r23, r19, qword ptr [r28 + 4*r29 + 291]
+
+# CHECK: cfcmove	r19, qword ptr [r28 + 4*r29 + 291]
+# CHECK: encoding: [0x62,0x8c,0xf8,0x08,0x44,0x9c,0xac,0x23,0x01,0x00,0x00]
+         cfcmove	r19, qword ptr [r28 + 4*r29 + 291]
diff --git a/llvm/test/MC/X86/apx/evex-format-att.s b/llvm/test/MC/X86/apx/evex-format-att.s
index 99823a2fb88d31..1ce72715362b1b 100644
--- a/llvm/test/MC/X86/apx/evex-format-att.s
+++ b/llvm/test/MC/X86/apx/evex-format-att.s
@@ -144,16 +144,6 @@
 # CHECK: encoding: [0x62,0xea,0xf7,0x00,0xf6,0xd0]
          mulxq	%r16, %r17, %r18
 
-## MRMSrcRegCC
-
-# CHECK: cfcmovbq	%r9, %r15
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x42,0xf9]
-         cfcmovbq	%r9, %r15
-
-# CHECK: cfcmovbeq	%r9, %r15, %r11
-# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x46,0xf9]
-         cfcmovbeq	%r9, %r15, %r11
-
 ## MRMSrcReg4VOp3
 
 # CHECK: bzhiq	%r19, %r23, %r27
diff --git a/llvm/test/MC/X86/apx/evex-format-intel.s b/llvm/test/MC/X86/apx/evex-format-intel.s
index 3722c03894620d..6c924910cf3cf4 100644
--- a/llvm/test/MC/X86/apx/evex-format-intel.s
+++ b/llvm/test/MC/X86/apx/evex-format-intel.s
@@ -144,16 +144,6 @@
 # CHECK: encoding: [0x62,0xea,0xf7,0x00,0xf6,0xd0]
          mulx	r18, r17, r16
 
-## MRMSrcRegCC
-
-# CHECK: cfcmovb	r15, r9
-# CHECK: encoding: [0x62,0x54,0xfc,0x08,0x42,0xf9]
-         cfcmovb	r15, r9
-
-# CHECK: cfcmovbe	r11, r15, r9
-# CHECK: encoding: [0x62,0x54,0xa4,0x1c,0x46,0xf9]
-         cfcmovbe	r11, r15, r9
-
 ## MRMSrcReg4VOp3
 
 # CHECK: bzhi	r27, r23, r19
diff --git a/llvm/test/TableGen/x86-fold-tables.inc b/llvm/test/TableGen/x86-fold-tables.inc
index 7b65e483c39d0d..bbf69d2b250f32 100644
--- a/llvm/test/TableGen/x86-fold-tables.inc
+++ b/llvm/test/TableGen/x86-fold-tables.inc
@@ -698,6 +698,9 @@ static const X86FoldTableEntry Table1[] = {
   {X86::CCMP32rr, X86::CCMP32rm, 0},
   {X86::CCMP64rr, X86::CCMP64rm, 0},
   {X86::CCMP8rr, X86::CCMP8rm, 0},
+  {X86::CFCMOV16rr, X86::CFCMOV16rm, 0},
+  {X86::CFCMOV32rr, X86::CFCMOV32rm, 0},
+  {X86::CFCMOV64rr, X86::CFCMOV64rm, 0},
   {X86::CMP16rr, X86::CMP16rm, 0},
   {X86::CMP32rr, X86::CMP32rm, 0},
   {X86::CMP64rr, X86::CMP64rm, 0},

>From ef4b8298235e18bd4948c36ebefb824c7306a6e6 Mon Sep 17 00:00:00 2001
From: "Wang, Xin10" <xin10.wang at intel.com>
Date: Tue, 12 Mar 2024 21:55:38 -0700
Subject: [PATCH 10/10] fix fold table

---
 llvm/test/TableGen/x86-fold-tables.inc      | 3 ---
 llvm/utils/TableGen/X86ManualFoldTables.def | 6 +++---
 2 files changed, 3 insertions(+), 6 deletions(-)

diff --git a/llvm/test/TableGen/x86-fold-tables.inc b/llvm/test/TableGen/x86-fold-tables.inc
index bbf69d2b250f32..7b65e483c39d0d 100644
--- a/llvm/test/TableGen/x86-fold-tables.inc
+++ b/llvm/test/TableGen/x86-fold-tables.inc
@@ -698,9 +698,6 @@ static const X86FoldTableEntry Table1[] = {
   {X86::CCMP32rr, X86::CCMP32rm, 0},
   {X86::CCMP64rr, X86::CCMP64rm, 0},
   {X86::CCMP8rr, X86::CCMP8rm, 0},
-  {X86::CFCMOV16rr, X86::CFCMOV16rm, 0},
-  {X86::CFCMOV32rr, X86::CFCMOV32rm, 0},
-  {X86::CFCMOV64rr, X86::CFCMOV64rm, 0},
   {X86::CMP16rr, X86::CMP16rm, 0},
   {X86::CMP32rr, X86::CMP32rm, 0},
   {X86::CMP64rr, X86::CMP64rm, 0},
diff --git a/llvm/utils/TableGen/X86ManualFoldTables.def b/llvm/utils/TableGen/X86ManualFoldTables.def
index 678fa4fc4bcc38..2ebd92883c0719 100644
--- a/llvm/utils/TableGen/X86ManualFoldTables.def
+++ b/llvm/utils/TableGen/X86ManualFoldTables.def
@@ -228,9 +228,9 @@ NOFOLD(INSERTPSrr)
 NOFOLD(VINSERTPSZrr)
 NOFOLD(VINSERTPSrr)
 // Memory faults are suppressed for CFCMOV with memory operand.
-NOFOLD(CFCMOV16rr)
-NOFOLD(CFCMOV32rr)
-NOFOLD(CFCMOV64rr)
+NOFOLD(CFCMOV16rr_REV)
+NOFOLD(CFCMOV32rr_REV)
+NOFOLD(CFCMOV64rr_REV)
 NOFOLD(CFCMOV16rr_ND)
 NOFOLD(CFCMOV32rr_ND)
 NOFOLD(CFCMOV64rr_ND)



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