[llvm] [RISCV] Add SMLoc to expanded vector pseudoinstructions in AsmParser. (PR #84875)

[Craig Topper via llvm-commits]

topperc wrote:

> I suspect we have the same problem with any other pseudo which can occur in assembly (as opposed to being compiler generated).  One example would be LI.  This would be a followup though, not a change to this patch.

Possibly. I wasn't sure if it mattered for scalar. Do we have something like the SEW LMUL instrument for scalar

https://github.com/llvm/llvm-project/pull/84875