[llvm] Matched some basic ISD::AVGFLOORU patterns (PR #84903)

[Shourya Goel via llvm-commits]

================
@@ -859,6 +859,21 @@ define <4 x i32> @urhadd_v4i32(<4 x i32> %x) {
   ret <4 x i32> %r
 }
 
+define <4 x i32> @fixedwidth(<4 x i32> %a0, <4 x i32> %a1)  {
+; CHECK-LABEL: fixedwidth:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    and v2.16b, v0.16b, v1.16b
+; CHECK-NEXT:    eor v0.16b, v0.16b, v1.16b
+; CHECK-NEXT:    usra v2.4s, v0.4s, #1
+; CHECK-NEXT:    mov v0.16b, v2.16b
+; CHECK-NEXT:    ret
----------------
Sh0g0-1758 wrote:

I think we should implement the pattern logic in TargetLowering.cpp only. Because for vector implementation, we need data like : 
```
const APInt &DemandedBits,
const APInt &DemandedElts,
```
Which are defined in the latter but would need to be added in the former. 

https://github.com/llvm/llvm-project/pull/84903