[llvm] [ValueTracking] Use select condition to help infer bits of arms (PR #84699)
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Tue Mar 12 13:19:13 PDT 2024
https://github.com/goldsteinn updated https://github.com/llvm/llvm-project/pull/84699
>From 1bee754fc62ed053e347891e8967b645e95ddbae Mon Sep 17 00:00:00 2001
From: Noah Goldstein <goldstein.w.n at gmail.com>
Date: Sun, 10 Mar 2024 17:24:09 -0500
Subject: [PATCH 1/2] [ValueTracking] Add tests for inferring select arm bits
from condition; NFC
---
.../knownbits-select-from-cond.ll | 81 +++++++++++++++++++
1 file changed, 81 insertions(+)
create mode 100644 llvm/test/Analysis/ValueTracking/knownbits-select-from-cond.ll
diff --git a/llvm/test/Analysis/ValueTracking/knownbits-select-from-cond.ll b/llvm/test/Analysis/ValueTracking/knownbits-select-from-cond.ll
new file mode 100644
index 00000000000000..0a1cccaca2bb2a
--- /dev/null
+++ b/llvm/test/Analysis/ValueTracking/knownbits-select-from-cond.ll
@@ -0,0 +1,81 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -passes=instcombine -S < %s | FileCheck %s
+
+define i8 @select_condition_implies_highbits_op1(i8 %xx, i8 noundef %y) {
+; CHECK-LABEL: @select_condition_implies_highbits_op1(
+; CHECK-NEXT: [[X:%.*]] = and i8 [[XX:%.*]], 15
+; CHECK-NEXT: [[COND:%.*]] = icmp ult i8 [[Y:%.*]], 3
+; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND]], i8 [[Y]], i8 [[X]]
+; CHECK-NEXT: [[R:%.*]] = add i8 [[SEL]], 32
+; CHECK-NEXT: ret i8 [[R]]
+;
+ %x = and i8 %xx, 15
+ %cond = icmp ult i8 %y, 3
+ %sel = select i1 %cond, i8 %y, i8 %x
+ %r = add i8 %sel, 32
+ ret i8 %r
+}
+
+define i8 @select_condition_implies_highbits_op1_maybe_undef_fail(i8 %xx, i8 %y) {
+; CHECK-LABEL: @select_condition_implies_highbits_op1_maybe_undef_fail(
+; CHECK-NEXT: [[X:%.*]] = and i8 [[XX:%.*]], 15
+; CHECK-NEXT: [[COND:%.*]] = icmp ult i8 [[Y:%.*]], 3
+; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND]], i8 [[Y]], i8 [[X]]
+; CHECK-NEXT: [[R:%.*]] = add i8 [[SEL]], 32
+; CHECK-NEXT: ret i8 [[R]]
+;
+ %x = and i8 %xx, 15
+ %cond = icmp ult i8 %y, 3
+ %sel = select i1 %cond, i8 %y, i8 %x
+ %r = add i8 %sel, 32
+ ret i8 %r
+}
+
+define i8 @select_condition_implies_highbits_op2(i8 %xx, i8 noundef %y) {
+; CHECK-LABEL: @select_condition_implies_highbits_op2(
+; CHECK-NEXT: [[X:%.*]] = and i8 [[XX:%.*]], 15
+; CHECK-NEXT: [[COND:%.*]] = icmp ugt i8 [[Y:%.*]], 3
+; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND]], i8 [[X]], i8 [[Y]]
+; CHECK-NEXT: [[R:%.*]] = add i8 [[SEL]], 32
+; CHECK-NEXT: ret i8 [[R]]
+;
+ %x = and i8 %xx, 15
+ %cond = icmp ugt i8 %y, 3
+ %sel = select i1 %cond, i8 %x, i8 %y
+ %r = add i8 %sel, 32
+ ret i8 %r
+}
+
+define i8 @select_condition_implies_highbits_op1_and(i8 %xx, i8 noundef %y, i1 %other_cond) {
+; CHECK-LABEL: @select_condition_implies_highbits_op1_and(
+; CHECK-NEXT: [[X:%.*]] = and i8 [[XX:%.*]], 15
+; CHECK-NEXT: [[COND0:%.*]] = icmp ult i8 [[Y:%.*]], 3
+; CHECK-NEXT: [[COND:%.*]] = and i1 [[COND0]], [[OTHER_COND:%.*]]
+; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND]], i8 [[Y]], i8 [[X]]
+; CHECK-NEXT: [[R:%.*]] = add i8 [[SEL]], 32
+; CHECK-NEXT: ret i8 [[R]]
+;
+ %x = and i8 %xx, 15
+ %cond0 = icmp ult i8 %y, 3
+ %cond = and i1 %cond0, %other_cond
+ %sel = select i1 %cond, i8 %y, i8 %x
+ %r = add i8 %sel, 32
+ ret i8 %r
+}
+
+define i8 @select_condition_implies_highbits_op2_or(i8 %xx, i8 noundef %y, i1 %other_cond) {
+; CHECK-LABEL: @select_condition_implies_highbits_op2_or(
+; CHECK-NEXT: [[X:%.*]] = and i8 [[XX:%.*]], 15
+; CHECK-NEXT: [[COND0:%.*]] = icmp ugt i8 [[Y:%.*]], 3
+; CHECK-NEXT: [[COND:%.*]] = or i1 [[COND0]], [[OTHER_COND:%.*]]
+; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND]], i8 [[X]], i8 [[Y]]
+; CHECK-NEXT: [[R:%.*]] = add i8 [[SEL]], 32
+; CHECK-NEXT: ret i8 [[R]]
+;
+ %x = and i8 %xx, 15
+ %cond0 = icmp ugt i8 %y, 3
+ %cond = or i1 %cond0, %other_cond
+ %sel = select i1 %cond, i8 %x, i8 %y
+ %r = add i8 %sel, 32
+ ret i8 %r
+}
>From ed056b0716747486cbf491ff12ec47632d4e95a1 Mon Sep 17 00:00:00 2001
From: Noah Goldstein <goldstein.w.n at gmail.com>
Date: Sun, 10 Mar 2024 17:24:12 -0500
Subject: [PATCH 2/2] [ValueTracking] Use select condition to help infer bits
of arms
If we have something like `(select (icmp ult x, 8), x, y)`, we can use
the `(icmp ult x, 8)` to help compute the knownbits of `x`.
---
llvm/lib/Analysis/ValueTracking.cpp | 41 +++++++++++++++++--
.../knownbits-select-from-cond.ll | 8 ++--
2 files changed, 41 insertions(+), 8 deletions(-)
diff --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp
index 371ad41ee96562..1da2695d172bc3 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -1023,11 +1023,44 @@ static void computeKnownBitsFromOperator(const Operator *I,
break;
}
case Instruction::Select: {
- computeKnownBits(I->getOperand(2), Known, Depth + 1, Q);
- computeKnownBits(I->getOperand(1), Known2, Depth + 1, Q);
-
+ auto ComputeForArm = [&](Value *Arm, bool Invert) {
+ KnownBits Res(Known.getBitWidth());
+ computeKnownBits(Arm, Res, Depth + 1, Q);
+ // If we have a constant arm, we are done.
+ if (Res.isConstant())
+ return Res;
+
+ // See what condition implies about the bits of the two select arms.
+ KnownBits CondRes(Res.getBitWidth());
+ computeKnownBitsFromCond(Arm, I->getOperand(0), CondRes, Depth + 1, Q,
+ Invert);
+ // If we don't get any information from the condition, no reason to
+ // proceed.
+ if (CondRes.isUnknown())
+ return Res;
+
+ // We can have conflict if the condition is dead. I.e if we have
+ // (x | 64) < 32 ? (x | 64) : y
+ // we will have conflict at bit 6 from the condition/the `or`.
+ // In that case just return. Its not particularly important
+ // what we do, as this select is going to be simplified soon.
+ CondRes = CondRes.unionWith(Res);
+ if (CondRes.hasConflict())
+ return Res;
+
+ // Finally make sure the information we found is valid. This is relatively
+ // expensive so its left for the very end.
+ if (!isGuaranteedNotToBeUndef(Arm, Q.AC, Q.CxtI, Q.DT, Depth + 1))
+ return Res;
+
+ // Finally, we know we get information from the condition and its valid,
+ // so return it.
+ return CondRes;
+ };
// Only known if known in both the LHS and RHS.
- Known = Known.intersectWith(Known2);
+ Known =
+ ComputeForArm(I->getOperand(1), /*Invert=*/false)
+ .intersectWith(ComputeForArm(I->getOperand(2), /*Invert=*/true));
break;
}
case Instruction::FPTrunc:
diff --git a/llvm/test/Analysis/ValueTracking/knownbits-select-from-cond.ll b/llvm/test/Analysis/ValueTracking/knownbits-select-from-cond.ll
index 0a1cccaca2bb2a..c3343edfb4c9b3 100644
--- a/llvm/test/Analysis/ValueTracking/knownbits-select-from-cond.ll
+++ b/llvm/test/Analysis/ValueTracking/knownbits-select-from-cond.ll
@@ -6,7 +6,7 @@ define i8 @select_condition_implies_highbits_op1(i8 %xx, i8 noundef %y) {
; CHECK-NEXT: [[X:%.*]] = and i8 [[XX:%.*]], 15
; CHECK-NEXT: [[COND:%.*]] = icmp ult i8 [[Y:%.*]], 3
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND]], i8 [[Y]], i8 [[X]]
-; CHECK-NEXT: [[R:%.*]] = add i8 [[SEL]], 32
+; CHECK-NEXT: [[R:%.*]] = or disjoint i8 [[SEL]], 32
; CHECK-NEXT: ret i8 [[R]]
;
%x = and i8 %xx, 15
@@ -36,7 +36,7 @@ define i8 @select_condition_implies_highbits_op2(i8 %xx, i8 noundef %y) {
; CHECK-NEXT: [[X:%.*]] = and i8 [[XX:%.*]], 15
; CHECK-NEXT: [[COND:%.*]] = icmp ugt i8 [[Y:%.*]], 3
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND]], i8 [[X]], i8 [[Y]]
-; CHECK-NEXT: [[R:%.*]] = add i8 [[SEL]], 32
+; CHECK-NEXT: [[R:%.*]] = or disjoint i8 [[SEL]], 32
; CHECK-NEXT: ret i8 [[R]]
;
%x = and i8 %xx, 15
@@ -52,7 +52,7 @@ define i8 @select_condition_implies_highbits_op1_and(i8 %xx, i8 noundef %y, i1 %
; CHECK-NEXT: [[COND0:%.*]] = icmp ult i8 [[Y:%.*]], 3
; CHECK-NEXT: [[COND:%.*]] = and i1 [[COND0]], [[OTHER_COND:%.*]]
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND]], i8 [[Y]], i8 [[X]]
-; CHECK-NEXT: [[R:%.*]] = add i8 [[SEL]], 32
+; CHECK-NEXT: [[R:%.*]] = or disjoint i8 [[SEL]], 32
; CHECK-NEXT: ret i8 [[R]]
;
%x = and i8 %xx, 15
@@ -69,7 +69,7 @@ define i8 @select_condition_implies_highbits_op2_or(i8 %xx, i8 noundef %y, i1 %o
; CHECK-NEXT: [[COND0:%.*]] = icmp ugt i8 [[Y:%.*]], 3
; CHECK-NEXT: [[COND:%.*]] = or i1 [[COND0]], [[OTHER_COND:%.*]]
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND]], i8 [[X]], i8 [[Y]]
-; CHECK-NEXT: [[R:%.*]] = add i8 [[SEL]], 32
+; CHECK-NEXT: [[R:%.*]] = or disjoint i8 [[SEL]], 32
; CHECK-NEXT: ret i8 [[R]]
;
%x = and i8 %xx, 15
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