[llvm] [SelectionDAG] Handle more opcodes in canCreateUndefOrPoison (PR #84921)

[Nikita Popov via llvm-commits]

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@@ -5073,6 +5073,16 @@ bool SelectionDAG::canCreateUndefOrPoison(SDValue Op, const APInt &DemandedElts,
   case ISD::FREEZE:
   case ISD::CONCAT_VECTORS:
   case ISD::INSERT_SUBVECTOR:
+  case ISD::SADDSAT:
+  case ISD::UADDSAT:
+  case ISD::SSUBSAT:
+  case ISD::USUBSAT:
+  case ISD::MULHU:
+  case ISD::MULHS:
+  case ISD::SMIN:
+  case ISD::SMAX:
+  case ISD::UMIN:
+  case ISD::UMAX:
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nikic wrote:

TBH I don't think there is a lot of value in explicitly testing all the opcodes, as long as they don't have any special logic.

https://github.com/llvm/llvm-project/pull/84921