[llvm] [AArch64][GlobalISel] Take abs scalar codegen closer to SDAG (PR #84886)

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git-clang-format --diff 1dd104db59d145d516a5e9cbb081ed01262961ef 7ec0ad39c759f43f3a804f7efbd19b6718a0555f -- llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
index 6aa43f8b14..83a7c7abb6 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
@@ -1022,11 +1022,10 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
       .clampNumElements(0, v2s64, v2s64)
       .moreElementsToNextPow2(0)
       // Do SMax based lowering for < 128 bits.
-      .customIf(
-          [=](const LegalityQuery &Q) {
-            LLT SrcTy = Q.Types[0];
-            return SrcTy.isScalar() && SrcTy.getSizeInBits() < 128;
-          })
+      .customIf([=](const LegalityQuery &Q) {
+        LLT SrcTy = Q.Types[0];
+        return SrcTy.isScalar() && SrcTy.getSizeInBits() < 128;
+      })
       .lower();
 
   // For fadd reductions we have pairwise operations available. We treat the

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https://github.com/llvm/llvm-project/pull/84886