[llvm] [GISEL][RISCV] IRTranslator for scalable vector load (PR #80006)

[Michael Maitland via llvm-commits]

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@@ -1198,7 +1198,8 @@ void MachineVerifier::verifyPreISelGenericInstruction(const MachineInstr *MI) {
         if (MMO.getSizeInBits() >= ValTy.getSizeInBits())
           report("Generic extload must have a narrower memory type", MI);
       } else if (MI->getOpcode() == TargetOpcode::G_LOAD) {
-        if (MMO.getSize() > ValTy.getSizeInBytes())
+        if (TypeSize::isKnownGT(MMO.getType().getSizeInBytes(),
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michaelmaitland wrote:

This diff worked for me:
```
diff --git a/llvm/lib/CodeGen/MIRParser/MIParser.cpp b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
index d41fc97cb806..41dbbd1b1413 100644
--- a/llvm/lib/CodeGen/MIRParser/MIParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
@@ -3412,7 +3412,7 @@ bool MIParser::parseMachineMemoryOperand(MachineMemOperand *&Dest) {
     if (expectAndConsume(MIToken::rparen))
       return true;

-    Size = MemoryType.getSizeInBytes();
+    Size = MemoryType.getSizeInBytes().getKnownMinValue();
   }

   MachinePointerInfo Ptr = MachinePointerInfo();
diff --git a/llvm/test/MachineVerifier/test_g_load.mir b/llvm/test/MachineVerifier/test_g_load.mir
index 07c3c0a6b5a2..0ffdf8e8efed 100644
--- a/llvm/test/MachineVerifier/test_g_load.mir
+++ b/llvm/test/MachineVerifier/test_g_load.mir
@@ -26,4 +26,9 @@ body:             |
     ; CHECK: Bad machine code: atomic load cannot use release ordering
     %5:_(s32) = G_LOAD %2 :: (load acq_rel (s32))

+    ; CHECK: Bad machine code: load memory size cannot exceed result size
+    %6:_(<vscale x 2 x s8>) = G_LOAD %2 :: (load (<vscale x 1 x s32>))
+
+    ; CHECK: Bad machine code: load memory size cannot exceed result size
+    %7:_(<vscale x 1 x s8>) = G_LOAD %2 :: (load (<vscale x 2 x s8>))
 ...
```

Maybe @harviniriawan and @davemgreen can weigh in on the proposed change in `parseMachineMemoryOperand` because [this](https://github.com/llvm/llvm-project/pull/70452) PR seems like it may be relevant.

https://github.com/llvm/llvm-project/pull/80006