[llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)

[Jay Foad via llvm-commits]

================
@@ -5286,6 +5286,157 @@ MachineInstr *CombinerHelper::buildSDivUsingMul(MachineInstr &MI) {
   return MIB.buildMul(Ty, Res, Factor);
 }
 
+bool CombinerHelper::matchDivByPow2(MachineInstr &MI, bool IsSigned) {
+  assert((MI.getOpcode() == TargetOpcode::G_SDIV ||
+          MI.getOpcode() == TargetOpcode::G_UDIV) &&
+         "Expected SDIV or UDIV");
+  auto &Div = cast<GenericMachineInstr>(MI);
+  Register RHS = Div.getReg(2);
+  auto MatchPow2 = [&](const Constant *C) {
+    auto *CI = dyn_cast<ConstantInt>(C);
+    if (!CI)
+      return false;
+    return CI->getValue().isPowerOf2() ||
+           (IsSigned && CI->getValue().isNegatedPowerOf2());
+  };
+  return matchUnaryPredicate(MRI, RHS, MatchPow2, /*AllowUndefs=*/false);
+}
+
+void CombinerHelper::applySDivByPow2(MachineInstr &MI) {
+  assert(MI.getOpcode() == TargetOpcode::G_SDIV && "Expected SDIV");
+  auto &SDiv = cast<GenericMachineInstr>(MI);
+  Register Dst = SDiv.getReg(0);
+  Register LHS = SDiv.getReg(1);
+  Register RHS = SDiv.getReg(2);
+  LLT Ty = MRI.getType(Dst);
+  LLT ShiftAmtTy = getTargetLowering().getPreferredShiftAmountTy(Ty);
+
+  Builder.setInstrAndDebugLoc(MI);
+
+  // Effectively we want to lower G_SDIV %lhs, %rhs, where %rhs is a power of 2,
+  // to the following version:
+  //
+  // %bits = G_CONSTANT $bitwidth
+  // %c1 = G_CTTZ %rhs
+  // %c1 = G_ZEXT %c1
+  // %inexact = G_SUB %bits, %c1
+  // %tmp = G_CONSTANT ($bitwidth - 1)
+  // %sign = %G_ASHR %lhs, %tmp
+  // %srl = G_SHL %sign, %inexact
+  // %add = G_ADD %lhs, %srl
+  // %sra = G_ASHR %add, %c1
+  // %one = G_CONSTANT $1
+  // %allones = G_CONSTANT $111...11
+  // %isone = G_ICMP EQ %rhs, %one
+  // %isallones = G_ICMP EQ %rhs, %allones
+  // %isoneorallones = G_OR %isone, %isallones
+  // %sra = G_SELECT, %isoneorallones, %lhs, %sra
+  // %zero = G_CONSTANT $0
+  // %sub = G_SUB %zero, %sra
+  // %isneg = G_ICMP SLT %lhs, %zero
+  // %res = G_SELECT %isneg, %sub, %sra
----------------
jayfoad wrote:

This explanation looks massively over-complicated. You should just show the basic expansion to something like:
```
  G_ASHR
  G_LSHR
  G_ADD
  G_ASHR
```

https://github.com/llvm/llvm-project/pull/83155