[llvm] [AArch64][GlobalISel] Legalize Insert vector element (PR #81453)

[Thorsten Schütt via llvm-commits]

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@@ -883,9 +883,15 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
       .clampMaxNumElements(1, p0, 2);
 
   getActionDefinitionsBuilder(G_INSERT_VECTOR_ELT)
-      .legalIf(typeInSet(0, {v16s8, v8s8, v8s16, v4s16, v4s32, v2s32, v2s64}))
+      .legalIf(
+          typeInSet(0, {v16s8, v8s8, v8s16, v4s16, v4s32, v2s32, v2s64, v2p0}))
       .moreElementsToNextPow2(0)
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tschuett wrote:

We need floats in the LLT. `{v8i16, i16, i64}` is illegal. There are no i16s. `{v8f16, f16, i64}` is illegal because of the famous f16.


https://github.com/llvm/llvm-project/pull/81453