[lld] [llvm] [RISCV] Support RISCV Atomics ABI attributes (PR #84597)
Paul Kirth via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 8 23:28:31 PST 2024
================
@@ -1084,10 +1084,86 @@ static void mergeArch(RISCVISAInfo::OrderedExtensionMap &mergedExts,
}
}
+static void mergeAtomic(DenseMap<unsigned, unsigned> &intAttr,
+ const InputSectionBase *oldSection,
+ const InputSectionBase *newSection, unsigned int oldTag,
+ unsigned int newTag) {
+ using RISCVAttrs::RISCVAtomicAbiTag::AtomicABI;
+ llvm::errs() << "oldTag=" << oldTag << ", newTag=" << newTag << "\n";
+ // Same tags stay the same, and UNKNOWN is compatible with anything
+ if (oldTag == newTag || newTag == AtomicABI::UNKNOWN)
+ return;
+
+ auto attr = RISCVAttrs::ATOMIC_ABI;
+ switch (oldTag) {
+ case AtomicABI::UNKNOWN:
+ intAttr[attr] = newTag;
+ return;
+ case AtomicABI::A6C:
+ switch (newTag) {
+ case AtomicABI::A6S:
+ intAttr[attr] = AtomicABI::A6C;
+ return;
+ case AtomicABI::A7:
+ errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+ " but " + toString(newSection) +
+ " has atomic_abi=" + Twine(newTag));
+ return;
+ };
+
+ case AtomicABI::A6S:
+ switch (newTag) {
+ case AtomicABI::A6C:
+ intAttr[attr] = AtomicABI::A6C;
+ return;
+ case AtomicABI::A7:
+ intAttr[attr] = AtomicABI::A7;
+ return;
+ };
+
+ case AtomicABI::A7:
+ switch (newTag) {
+ case AtomicABI::A6S:
+ intAttr[attr] = AtomicABI::A7;
+ return;
+ case AtomicABI::A6C:
+ errorOrWarn(toString(oldSection) + " has atomic_abi=" + Twine(oldTag) +
+ " but " + toString(newSection) +
+ " has atomic_abi=" + Twine(newTag));
+ return;
+ };
+ default:
+ llvm_unreachable("unknown AtomicABI");
+ };
+}
+
+static void mergeX3RegUse(DenseMap<unsigned, unsigned> &intAttr,
----------------
ilovepi wrote:
Shoot this belongs in another PR. I’ll update these in the morning. Thanks for pointing that out.
https://github.com/llvm/llvm-project/pull/84597
More information about the llvm-commits
mailing list