[llvm] [TableGen] Sort matchables depending on predicates. (PR #84483)

[Alfie Richards via llvm-commits]

https://github.com/AlfieRichardsArm created https://github.com/llvm/llvm-project/pull/84483

This change adds alphabetical sorting for matchables in Asm Matching.

There are several cases of matchables that are unambiguous except for different features, for example the Arm Thumb ADC instruction which has multiple ambiguous aliases with different feature sets (see the test failures of https://github.com/llvm/llvm-project/pull/83436 for this failure). 

For Arm especially the order of matching determines the order of the diagnostics produced which can cause unreliable test failures.

>From 8aea8965690c01a0d1a4dcffc3b86b41646024bb Mon Sep 17 00:00:00 2001
From: Alfie Richards <alfie.richards at arm.com>
Date: Fri, 8 Mar 2024 12:13:20 +0000
Subject: [PATCH] [TableGen] Sort matchables depending on predicates.

---
 llvm/test/MC/Mips/micromips32r6/valid.s   |  4 ++--
 llvm/utils/TableGen/AsmMatcherEmitter.cpp | 22 +++++++++++++++++++++-
 2 files changed, 23 insertions(+), 3 deletions(-)

diff --git a/llvm/test/MC/Mips/micromips32r6/valid.s b/llvm/test/MC/Mips/micromips32r6/valid.s
index b6af2b951c77c7..35eef58ae482d1 100644
--- a/llvm/test/MC/Mips/micromips32r6/valid.s
+++ b/llvm/test/MC/Mips/micromips32r6/valid.s
@@ -85,7 +85,7 @@
                            # CHECK-NEXT:                # <MCInst #{{.*}} LH_MM
   lhu $4, 8($2)            # CHECK: lhu $4, 8($2)       # encoding: [0x34,0x82,0x00,0x08]
                            # CHECK-NEXT:                # <MCInst #{{.*}} LHu_MM
-  lsa $2, $3, $4, 3        # CHECK: lsa  $2, $3, $4, 3  # encoding: [0x00,0x43,0x24,0x0f]
+  lsa $2, $3, $4, 3        # CHECK: lsa  $2, $3, $4, 3  # encoding: [0x00,0x83,0x14,0x0f]
   lwpc    $2,268           # CHECK: lwpc $2, 268        # encoding: [0x78,0x48,0x00,0x43]
   lwm $16, $17, $ra, 8($sp)   # CHECK: lwm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x22]
   lwm16 $16, $17, $ra, 8($sp) # CHECK: lwm16 $16, $17, $ra, 8($sp) # encoding: [0x45,0x22]
@@ -194,7 +194,7 @@
   msubf.d $f3, $f4, $f5    # CHECK: msubf.d $f3, $f4, $f5 # encoding: [0x54,0xa4,0x1b,0xf8]
   mov.s $f6, $f7           # CHECK: mov.s $f6, $f7      # encoding: [0x54,0xc7,0x00,0x7b]
   mov.d $f4, $f6           # CHECK: mov.d $f4, $f6      # encoding: [0x54,0x86,0x20,0x7b]
-                           # CHECK-NEXT:                # <MCInst #{{[0-9]+}} FMOV_D64_MM
+                           # CHECK-NEXT:                # <MCInst #{{[0-9]+}} FMOV_D_MMR6
   neg.s $f6, $f7           # CHECK: neg.s $f6, $f7      # encoding: [0x54,0xc7,0x0b,0x7b]
   neg.d   $f0, $f2         # CHECK: neg.d   $f0, $f2    # encoding: [0x54,0x02,0x2b,0x7b]
                            # CHECK-NEXT:                # <MCInst #{{[0-9]+}} FNEG_D64_MM
diff --git a/llvm/utils/TableGen/AsmMatcherEmitter.cpp b/llvm/utils/TableGen/AsmMatcherEmitter.cpp
index febd96086df27b..7c2f24c289557a 100644
--- a/llvm/utils/TableGen/AsmMatcherEmitter.cpp
+++ b/llvm/utils/TableGen/AsmMatcherEmitter.cpp
@@ -646,6 +646,14 @@ struct MatchableInfo {
     if (RequiredFeatures.size() != RHS.RequiredFeatures.size())
       return RequiredFeatures.size() > RHS.RequiredFeatures.size();
 
+    // Sort by the alphabetical naming of the required features.
+    for (unsigned i = 0, e = RequiredFeatures.size(); i != e; ++i) {
+      if (RequiredFeatures[i]->TheDef->getName() < RHS.RequiredFeatures[i]->TheDef->getName())
+        return true;
+      if (RHS.RequiredFeatures[i]->TheDef->getName() < RequiredFeatures[i]->TheDef->getName())
+        return false;
+    }
+
     return false;
   }
 
@@ -689,7 +697,19 @@ struct MatchableInfo {
         HasGT = true;
     }
 
-    return HasLT == HasGT;
+    if (HasLT != HasGT) 
+      return false;
+
+    // Check if can distringuish by the alphabetical ordering of features.
+    if (RequiredFeatures.size() != RHS.RequiredFeatures.size())
+      return false;
+    for (unsigned i = 0, e = RequiredFeatures.size(); i != e; ++i) {
+      if (RequiredFeatures[i]->TheDef->getName() < RHS.RequiredFeatures[i]->TheDef->getName()
+       || RHS.RequiredFeatures[i]->TheDef->getName() < RequiredFeatures[i]->TheDef->getName())
+        return false;
+    }
+
+    return true;
   }
 
   void dump() const;