[llvm] [GISel] Enforce G_PTR_ADD RHS type matching index size for addr space (PR #84352)
via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 8 04:09:17 PST 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-aarch64
Author: Jay Foad (jayfoad)
<details>
<summary>Changes</summary>
---
Patch is 92.24 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/84352.diff
16 Files Affected:
- (modified) llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp (+8-1)
- (modified) llvm/lib/CodeGen/MachineVerifier.cpp (+9)
- (modified) llvm/test/CodeGen/AArch64/GlobalISel/combine-ptradd-int2ptr.mir (+5-5)
- (modified) llvm/test/CodeGen/AArch64/GlobalISel/legalize-ptr-add.mir (-17)
- (modified) llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-load-or-pattern.mir (+113-113)
- (modified) llvm/test/CodeGen/AMDGPU/GlobalISel/combine-extract-vector-load.mir (+9-4)
- (modified) llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement-stack-lower.ll (+6-15)
- (modified) llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i128.ll (+47-63)
- (modified) llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i16.ll (+62-128)
- (modified) llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ptr-add.mir (-207)
- (modified) llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-load-store.mir (-28)
- (added) llvm/test/CodeGen/X86/GlobalISel/legalize-ptr-add-32.mir (+55)
- (added) llvm/test/CodeGen/X86/GlobalISel/legalize-ptr-add-64.mir (+55)
- (removed) llvm/test/CodeGen/X86/GlobalISel/legalize-ptr-add.mir (-224)
- (modified) llvm/test/CodeGen/X86/GlobalISel/regbankselect-X86_64.mir (+7-12)
- (modified) llvm/test/MachineVerifier/test_g_ptr_add.mir (+5-1)
``````````diff
diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
index 1d016e684c48f6..258047e2b56fd2 100644
--- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -4004,7 +4004,14 @@ Register LegalizerHelper::getVectorElementPointer(Register VecPtr, LLT VecTy,
Index = clampVectorIndex(MIRBuilder, Index, VecTy);
- LLT IdxTy = MRI.getType(Index);
+ // Convert index to the correct size for the address space.
+ const DataLayout &DL = MIRBuilder.getDataLayout();
+ unsigned AS = MRI.getType(VecPtr).getAddressSpace();
+ unsigned IndexSizeInBits = DL.getIndexSize(AS) * 8;
+ LLT IdxTy = MRI.getType(Index).changeElementSize(IndexSizeInBits);
+ if (IdxTy != MRI.getType(Index))
+ Index = MIRBuilder.buildSExtOrTrunc(IdxTy, Index).getReg(0);
+
auto Mul = MIRBuilder.buildMul(IdxTy, Index,
MIRBuilder.buildConstant(IdxTy, EltSize));
diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp
index 1d0757c5d7f5f5..cdb6cc63feffc1 100644
--- a/llvm/lib/CodeGen/MachineVerifier.cpp
+++ b/llvm/lib/CodeGen/MachineVerifier.cpp
@@ -1301,6 +1301,15 @@ void MachineVerifier::verifyPreISelGenericInstruction(const MachineInstr *MI) {
if (OffsetTy.isPointerOrPointerVector())
report("gep offset operand must not be a pointer", MI);
+ if (PtrTy.isPointerOrPointerVector()) {
+ const DataLayout &DL = MF->getDataLayout();
+ unsigned AS = PtrTy.getAddressSpace();
+ unsigned IndexSizeInBits = DL.getIndexSize(AS) * 8;
+ if (OffsetTy.getScalarSizeInBits() != IndexSizeInBits)
+ report("gep offset operand must match index size for address space",
+ MI);
+ }
+
// TODO: Is the offset allowed to be a scalar with a vector?
break;
}
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/combine-ptradd-int2ptr.mir b/llvm/test/CodeGen/AArch64/GlobalISel/combine-ptradd-int2ptr.mir
index 40e5e8ebb7731e..1233a0af424533 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/combine-ptradd-int2ptr.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/combine-ptradd-int2ptr.mir
@@ -11,7 +11,7 @@ body: |
; CHECK: [[C:%[0-9]+]]:_(p64) = G_CONSTANT i64 44
; CHECK: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[C]](p64)
; CHECK: $x0 = COPY [[PTRTOINT]](s64)
- %1:_(s32) = G_CONSTANT i32 42
+ %1:_(s64) = G_CONSTANT i64 42
%2:_(s32) = G_CONSTANT i32 2
%3:_(p64) = G_INTTOPTR %2
%4:_(p64) = G_PTR_ADD %3, %1
@@ -26,7 +26,7 @@ body: |
; CHECK-LABEL: name: agc.test_combine_ptradd_constants_ptrres
; CHECK: [[C:%[0-9]+]]:_(p64) = G_CONSTANT i64 44
; CHECK: $x0 = COPY [[C]](p64)
- %1:_(s32) = G_CONSTANT i32 42
+ %1:_(s64) = G_CONSTANT i64 42
%2:_(s32) = G_CONSTANT i32 2
%3:_(p64) = G_INTTOPTR %2
%4:_(p64) = G_PTR_ADD %3, %1
@@ -39,12 +39,12 @@ body: |
liveins: $x0, $x1
; Ensure non-constant G_PTR_ADDs are not folded.
; CHECK-LABEL: name: agc.test_not_combine_variable_ptradd
- ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 42
+ ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 42
; CHECK: [[COPY:%[0-9]+]]:_(p64) = COPY $x1
- ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p64) = G_PTR_ADD [[COPY]], [[C]](s32)
+ ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p64) = G_PTR_ADD [[COPY]], [[C]](s64)
; CHECK: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[PTR_ADD]](p64)
; CHECK: $x0 = COPY [[PTRTOINT]](s64)
- %1:_(s32) = G_CONSTANT i32 42
+ %1:_(s64) = G_CONSTANT i64 42
%2:_(p64) = COPY $x1
%3:_(p64) = G_PTR_ADD %2, %1
%4:_(s64) = G_PTRTOINT %3
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-ptr-add.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-ptr-add.mir
index 7bd9725d0fc87d..1ecd36b55380a6 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-ptr-add.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-ptr-add.mir
@@ -1,23 +1,6 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=aarch64 -run-pass=legalizer %s -o - | FileCheck %s
---
-name: test_ptr_add_small
-body: |
- bb.0.entry:
- ; CHECK-LABEL: name: test_ptr_add_small
- ; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
- ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1
- ; CHECK: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 8
- ; CHECK: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[SEXT_INREG]](s64)
- ; CHECK: $x0 = COPY [[PTR_ADD]](p0)
- %0:_(p0) = COPY $x0
- %1:_(s64) = COPY $x1
- %2:_(s8) = G_TRUNC %1(s64)
- %3:_(p0) = G_PTR_ADD %0, %2(s8)
- $x0 = COPY %3(p0)
-
-...
----
name: test_ptr_add_vec_p0
body: |
bb.0.entry:
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-load-or-pattern.mir b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-load-or-pattern.mir
index 88d214e43c82e5..c30fab32fccbf6 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-load-or-pattern.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-load-or-pattern.mir
@@ -38,18 +38,18 @@ body: |
; BIG: %full_load:_(s32) = G_BSWAP [[LOAD]]
; BIG: $w1 = COPY %full_load(s32)
; BIG: RET_ReallyLR implicit $w1
- %cst_1:_(s32) = G_CONSTANT i32 1
- %cst_2:_(s32) = G_CONSTANT i32 2
- %cst_3:_(s32) = G_CONSTANT i32 3
+ %cst_1:_(s64) = G_CONSTANT i64 1
+ %cst_2:_(s64) = G_CONSTANT i64 2
+ %cst_3:_(s64) = G_CONSTANT i64 3
%cst_8:_(s32) = G_CONSTANT i32 8
%cst_16:_(s32) = G_CONSTANT i32 16
%cst_24:_(s32) = G_CONSTANT i32 24
%ptr:_(p0) = COPY $x1
- %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s32)
- %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(s32)
- %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(s32)
+ %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
+ %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(s64)
+ %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(s64)
%byte0:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s8))
@@ -104,18 +104,18 @@ body: |
; BIG: %full_load:_(s32) = G_LOAD %ptr(p0) :: (load (s32), align 1)
; BIG: $w1 = COPY %full_load(s32)
; BIG: RET_ReallyLR implicit $w1
- %cst_1:_(s32) = G_CONSTANT i32 1
- %cst_2:_(s32) = G_CONSTANT i32 2
- %cst_3:_(s32) = G_CONSTANT i32 3
+ %cst_1:_(s64) = G_CONSTANT i64 1
+ %cst_2:_(s64) = G_CONSTANT i64 2
+ %cst_3:_(s64) = G_CONSTANT i64 3
%cst_8:_(s32) = G_CONSTANT i32 8
%cst_16:_(s32) = G_CONSTANT i32 16
%cst_24:_(s32) = G_CONSTANT i32 24
%ptr:_(p0) = COPY $x1
- %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s32)
- %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(s32)
- %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(s32)
+ %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
+ %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(s64)
+ %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(s64)
%elt0:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s8))
%elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s8))
@@ -162,18 +162,18 @@ body: |
; BIG: %full_load:_(s32) = G_BSWAP [[LOAD]]
; BIG: $w1 = COPY %full_load(s32)
; BIG: RET_ReallyLR implicit $w1
- %cst_1:_(s32) = G_CONSTANT i32 1
- %cst_2:_(s32) = G_CONSTANT i32 2
- %cst_3:_(s32) = G_CONSTANT i32 3
+ %cst_1:_(s64) = G_CONSTANT i64 1
+ %cst_2:_(s64) = G_CONSTANT i64 2
+ %cst_3:_(s64) = G_CONSTANT i64 3
%cst_8:_(s32) = G_CONSTANT i32 8
%cst_16:_(s32) = G_CONSTANT i32 16
%cst_24:_(s32) = G_CONSTANT i32 24
%ptr:_(p0) = COPY $x1
- %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s32)
- %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(s32)
- %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(s32)
+ %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
+ %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(s64)
+ %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(s64)
%byte0:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s8))
@@ -414,35 +414,35 @@ body: |
; LITTLE-LABEL: name: nonzero_start_idx_positive_little_endian_pat
; LITTLE: liveins: $x0, $x1
- ; LITTLE: %cst_1:_(s32) = G_CONSTANT i32 1
+ ; LITTLE: %cst_1:_(s64) = G_CONSTANT i64 1
; LITTLE: %ptr:_(p0) = COPY $x0
- ; LITTLE: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s32)
+ ; LITTLE: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
; LITTLE: %full_load:_(s32) = G_LOAD %ptr_elt_1(p0) :: (load (s32), align 1)
; LITTLE: $w1 = COPY %full_load(s32)
; LITTLE: RET_ReallyLR implicit $w1
; BIG-LABEL: name: nonzero_start_idx_positive_little_endian_pat
; BIG: liveins: $x0, $x1
- ; BIG: %cst_1:_(s32) = G_CONSTANT i32 1
+ ; BIG: %cst_1:_(s64) = G_CONSTANT i64 1
; BIG: %ptr:_(p0) = COPY $x0
- ; BIG: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s32)
+ ; BIG: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
; BIG: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD %ptr_elt_1(p0) :: (load (s32), align 1)
; BIG: %full_load:_(s32) = G_BSWAP [[LOAD]]
; BIG: $w1 = COPY %full_load(s32)
; BIG: RET_ReallyLR implicit $w1
- %cst_1:_(s32) = G_CONSTANT i32 1
- %cst_2:_(s32) = G_CONSTANT i32 2
- %cst_3:_(s32) = G_CONSTANT i32 3
- %cst_4:_(s32) = G_CONSTANT i32 4
+ %cst_1:_(s64) = G_CONSTANT i64 1
+ %cst_2:_(s64) = G_CONSTANT i64 2
+ %cst_3:_(s64) = G_CONSTANT i64 3
+ %cst_4:_(s64) = G_CONSTANT i64 4
%cst_8:_(s32) = G_CONSTANT i32 8
%cst_16:_(s32) = G_CONSTANT i32 16
%cst_24:_(s32) = G_CONSTANT i32 24
%ptr:_(p0) = COPY $x0
- %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s32)
- %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(s32)
- %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(s32)
- %ptr_elt_4:_(p0) = G_PTR_ADD %ptr, %cst_4(s32)
+ %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
+ %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(s64)
+ %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(s64)
+ %ptr_elt_4:_(p0) = G_PTR_ADD %ptr, %cst_4(s64)
%elt2:_(s32) = G_ZEXTLOAD %ptr_elt_2(p0) :: (load (s8))
%elt3:_(s32) = G_ZEXTLOAD %ptr_elt_3(p0) :: (load (s8))
@@ -476,35 +476,35 @@ body: |
; LITTLE-LABEL: name: nonzero_start_idx_positive_big_endian_pat
; LITTLE: liveins: $x0, $x1
- ; LITTLE: %cst_1:_(s32) = G_CONSTANT i32 1
+ ; LITTLE: %cst_1:_(s64) = G_CONSTANT i64 1
; LITTLE: %ptr:_(p0) = COPY $x0
- ; LITTLE: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s32)
+ ; LITTLE: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
; LITTLE: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD %ptr_elt_1(p0) :: (load (s32), align 1)
; LITTLE: %full_load:_(s32) = G_BSWAP [[LOAD]]
; LITTLE: $w1 = COPY %full_load(s32)
; LITTLE: RET_ReallyLR implicit $w1
; BIG-LABEL: name: nonzero_start_idx_positive_big_endian_pat
; BIG: liveins: $x0, $x1
- ; BIG: %cst_1:_(s32) = G_CONSTANT i32 1
+ ; BIG: %cst_1:_(s64) = G_CONSTANT i64 1
; BIG: %ptr:_(p0) = COPY $x0
- ; BIG: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s32)
+ ; BIG: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
; BIG: %full_load:_(s32) = G_LOAD %ptr_elt_1(p0) :: (load (s32), align 1)
; BIG: $w1 = COPY %full_load(s32)
; BIG: RET_ReallyLR implicit $w1
- %cst_1:_(s32) = G_CONSTANT i32 1
- %cst_2:_(s32) = G_CONSTANT i32 2
- %cst_3:_(s32) = G_CONSTANT i32 3
- %cst_4:_(s32) = G_CONSTANT i32 4
+ %cst_1:_(s64) = G_CONSTANT i64 1
+ %cst_2:_(s64) = G_CONSTANT i64 2
+ %cst_3:_(s64) = G_CONSTANT i64 3
+ %cst_4:_(s64) = G_CONSTANT i64 4
%cst_8:_(s32) = G_CONSTANT i32 8
%cst_16:_(s32) = G_CONSTANT i32 16
%cst_24:_(s32) = G_CONSTANT i32 24
%ptr:_(p0) = COPY $x0
- %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s32)
- %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(s32)
- %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(s32)
- %ptr_elt_4:_(p0) = G_PTR_ADD %ptr, %cst_4(s32)
+ %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
+ %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(s64)
+ %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(s64)
+ %ptr_elt_4:_(p0) = G_PTR_ADD %ptr, %cst_4(s64)
%elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s8))
%elt2:_(s32) = G_ZEXTLOAD %ptr_elt_2(p0) :: (load (s8))
@@ -538,33 +538,33 @@ body: |
; LITTLE-LABEL: name: nonzero_start_idx_negative_little_endian_pat
; LITTLE: liveins: $x0, $x1
- ; LITTLE: %cst_neg_3:_(s32) = G_CONSTANT i32 -3
+ ; LITTLE: %cst_neg_3:_(s64) = G_CONSTANT i64 -3
; LITTLE: %ptr:_(p0) = COPY $x0
- ; LITTLE: %ptr_elt_neg_3:_(p0) = G_PTR_ADD %ptr, %cst_neg_3(s32)
+ ; LITTLE: %ptr_elt_neg_3:_(p0) = G_PTR_ADD %ptr, %cst_neg_3(s64)
; LITTLE: %full_load:_(s32) = G_LOAD %ptr_elt_neg_3(p0) :: (load (s32), align 1)
; LITTLE: $w1 = COPY %full_load(s32)
; LITTLE: RET_ReallyLR implicit $w1
; BIG-LABEL: name: nonzero_start_idx_negative_little_endian_pat
; BIG: liveins: $x0, $x1
- ; BIG: %cst_neg_3:_(s32) = G_CONSTANT i32 -3
+ ; BIG: %cst_neg_3:_(s64) = G_CONSTANT i64 -3
; BIG: %ptr:_(p0) = COPY $x0
- ; BIG: %ptr_elt_neg_3:_(p0) = G_PTR_ADD %ptr, %cst_neg_3(s32)
+ ; BIG: %ptr_elt_neg_3:_(p0) = G_PTR_ADD %ptr, %cst_neg_3(s64)
; BIG: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD %ptr_elt_neg_3(p0) :: (load (s32), align 1)
; BIG: %full_load:_(s32) = G_BSWAP [[LOAD]]
; BIG: $w1 = COPY %full_load(s32)
; BIG: RET_ReallyLR implicit $w1
- %cst_neg_1:_(s32) = G_CONSTANT i32 -1
- %cst_neg_2:_(s32) = G_CONSTANT i32 -2
- %cst_neg_3:_(s32) = G_CONSTANT i32 -3
+ %cst_neg_1:_(s64) = G_CONSTANT i64 -1
+ %cst_neg_2:_(s64) = G_CONSTANT i64 -2
+ %cst_neg_3:_(s64) = G_CONSTANT i64 -3
%cst_8:_(s32) = G_CONSTANT i32 8
%cst_16:_(s32) = G_CONSTANT i32 16
%cst_24:_(s32) = G_CONSTANT i32 24
%ptr:_(p0) = COPY $x0
- %ptr_elt_neg_3:_(p0) = G_PTR_ADD %ptr, %cst_neg_3(s32)
- %ptr_elt_neg_2:_(p0) = G_PTR_ADD %ptr, %cst_neg_2(s32)
- %ptr_elt_neg_1:_(p0) = G_PTR_ADD %ptr, %cst_neg_1(s32)
+ %ptr_elt_neg_3:_(p0) = G_PTR_ADD %ptr, %cst_neg_3(s64)
+ %ptr_elt_neg_2:_(p0) = G_PTR_ADD %ptr, %cst_neg_2(s64)
+ %ptr_elt_neg_1:_(p0) = G_PTR_ADD %ptr, %cst_neg_1(s64)
%elt_neg_2:_(s32) = G_ZEXTLOAD %ptr_elt_neg_2(p0) :: (load (s8))
%elt_neg_1:_(s32) = G_ZEXTLOAD %ptr_elt_neg_1(p0) :: (load (s8))
@@ -598,33 +598,33 @@ body: |
; LITTLE-LABEL: name: nonzero_start_idx_negative_big_endian_pat
; LITTLE: liveins: $x0, $x1
- ; LITTLE: %cst_neg_3:_(s32) = G_CONSTANT i32 -3
+ ; LITTLE: %cst_neg_3:_(s64) = G_CONSTANT i64 -3
; LITTLE: %ptr:_(p0) = COPY $x0
- ; LITTLE: %ptr_elt_neg_3:_(p0) = G_PTR_ADD %ptr, %cst_neg_3(s32)
+ ; LITTLE: %ptr_elt_neg_3:_(p0) = G_PTR_ADD %ptr, %cst_neg_3(s64)
; LITTLE: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD %ptr_elt_neg_3(p0) :: (load (s32), align 1)
; LITTLE: %full_load:_(s32) = G_BSWAP [[LOAD]]
; LITTLE: $w1 = COPY %full_load(s32)
; LITTLE: RET_ReallyLR implicit $w1
; BIG-LABEL: name: nonzero_start_idx_negative_big_endian_pat
; BIG: liveins: $x0, $x1
- ; BIG: %cst_neg_3:_(s32) = G_CONSTANT i32 -3
+ ; BIG: %cst_neg_3:_(s64) = G_CONSTANT i64 -3
; BIG: %ptr:_(p0) = COPY $x0
- ; BIG: %ptr_elt_neg_3:_(p0) = G_PTR_ADD %ptr, %cst_neg_3(s32)
+ ; BIG: %ptr_elt_neg_3:_(p0) = G_PTR_ADD %ptr, %cst_neg_3(s64)
; BIG: %full_load:_(s32) = G_LOAD %ptr_elt_neg_3(p0) :: (load (s32), align 1)
; BIG: $w1 = COPY %full_load(s32)
; BIG: RET_ReallyLR implicit $w1
- %cst_neg_1:_(s32) = G_CONSTANT i32 -1
- %cst_neg_2:_(s32) = G_CONSTANT i32 -2
- %cst_neg_3:_(s32) = G_CONSTANT i32 -3
+ %cst_neg_1:_(s64) = G_CONSTANT i64 -1
+ %cst_neg_2:_(s64) = G_CONSTANT i64 -2
+ %cst_neg_3:_(s64) = G_CONSTANT i64 -3
%cst_8:_(s32) = G_CONSTANT i32 8
%cst_16:_(s32) = G_CONSTANT i32 16
%cst_24:_(s32) = G_CONSTANT i32 24
%ptr:_(p0) = COPY $x0
- %ptr_elt_neg_3:_(p0) = G_PTR_ADD %ptr, %cst_neg_3(s32)
- %ptr_elt_neg_2:_(p0) = G_PTR_ADD %ptr, %cst_neg_2(s32)
- %ptr_elt_neg_1:_(p0) = G_PTR_ADD %ptr, %cst_neg_1(s32)
+ %ptr_elt_neg_3:_(p0) = G_PTR_ADD %ptr, %cst_neg_3(s64)
+ %ptr_elt_neg_2:_(p0) = G_PTR_ADD %ptr, %cst_neg_2(s64)
+ %ptr_elt_neg_1:_(p0) = G_PTR_ADD %ptr, %cst_neg_1(s64)
%elt_neg_3:_(s32) = G_ZEXTLOAD %ptr_elt_neg_3(p0) :: (load (s8))
%elt_neg_2:_(s32) = G_ZEXTLOAD %ptr_elt_neg_2(p0) :: (load (s8))
@@ -977,15 +977,15 @@ body: |
; LITTLE-LABEL: name: dont_combine_duplicate_idx
; LITTLE: liveins: $x0, $x1
- ; LITTLE: %cst_1:_(s32) = G_CONSTANT i32 1
- ; LITTLE: %reused_idx:_(s32) = G_CONSTANT i32 2
+ ; LITTLE: %cst_1:_(s64) = G_CONSTANT i64 1
+ ; LITTLE: %reused_idx:_(s64) = G_CONSTANT i64 2
; LITTLE: %cst_8:_(s32) = G_CONSTANT i32 8
; LITTLE: %cst_16:_(s32) = G_CONSTANT i32 16
; LITTLE: %cst_24:_(s32) = G_CONSTANT i32 24
; LITTLE: %ptr:_(p0) = COPY $x1
- ; LITTLE: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s32)
- ; LITTLE: %uses_idx_2:_(p0) = G_PTR_ADD %ptr, %reused_idx(s32)
- ; LITTLE: %also_uses_idx_2:_(p0) = G_PTR_ADD %ptr, %reused_idx(s32)
+ ; LITTLE: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
+ ; LITTLE: %uses_idx_2:_(p0) = G_PTR_ADD %ptr, %reused_idx(s64)
+ ; LITTLE: %also_uses_idx_2:_(p0) = G_PTR_ADD %ptr, %reused_idx(s64)
; LITTLE: %byte0:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s8))
; LITTLE: %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s8))
; LITTLE: %elt2:_(s32) = G_ZEXTLOAD %uses_idx_2(p0) :: (load (s8))
@@ -1000,15 +1000,15 @@ body: |
; LITTLE: RET_ReallyLR implicit $w1
; BIG-LABEL: name: dont_combine_duplicate_idx
; BIG: liveins: $x0, $x1
- ; BIG: %cst_1:_(s32) = G_CONSTANT i32 1
- ; BIG: %reused_idx:_(s32) = G_CONSTANT i32 2
+ ; BIG: %cst_1:_(s64) = G_CONSTANT i64 1
+ ; BIG: %reused_idx:_(s64) = G_CONSTANT i64 2
; BIG: %cst_8:_(s32) = G_CONSTANT i32 8
; BIG: %cst_16:_(s32) = G_CONSTANT i32 16
; BIG: %cst_24:_(s32) = G_CONSTANT i32 24
; BIG: %ptr:_(p0) = COPY $x1
- ; BIG: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s32)
- ; BIG: %uses_idx_2:_(p0) = G_PTR_ADD %ptr, %reused_idx(s32)
- ; BIG: %also_uses_idx_2:_(p0) = G_PTR_ADD %ptr, %reused_idx(s32)
+ ; BIG: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
+ ; BIG: %uses_idx_2:_(p0) = G_PTR_ADD %ptr, %reused_idx(s64)
+ ; BIG: %also_uses_idx_2:_(p0) = G_PTR_ADD %ptr, %reused_idx(s64)
; BIG: %byte0:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s8))
; BIG: %elt1:_(s32) = G_ZEXTLOAD %ptr_elt_1(p0) :: (load (s8))
; BIG: %elt2:_(s32) = G_ZEXTLOAD %uses_idx_2(p0) :: (load (s8))
@@ -1021,17 +1021,17 @@ body: |
; BIG: %full_load:_(s32) = G_OR %or1, %or2
; BIG: $w1 = COPY %full_load(s32)
; BIG: RET_ReallyLR implicit $w1
- %cst_1:_(s32) = G_CONSTANT i32 1
- %reused_idx:_(s32) = G_CONSTANT i32 2
+ %cst_1:_(s64) = G_CONSTANT i64 1
+ %reused_idx:_(s64) = G_CONSTANT i64 2
%cst_8:_(s32) = G_CONSTANT i32 8
%cst_16:_(s32) = G_CONSTANT i32 16
%cst_24:_(s32) = G_CONSTANT i32 24
%ptr:_(p0) = COPY $x1
- %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s32)
- %uses_idx_2:_(p0) = G_PTR_ADD %ptr, %reused_idx(s32)
- %also_uses_idx_2:_(p0) = G_PTR_ADD %ptr, %reused_idx(s32)
+ %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
+ %uses_idx_2:_(p0) = G_PTR_ADD %ptr, %reused_idx(s64)
+ %also_uses_idx_2:_(p0) = G_PTR_ADD %ptr, %reused_idx(s64)
%byte0:_(s32) = G_ZEXTLOAD %ptr(p0) :: (load (s8))
@@ -1064,15 +1064,15 @@ body: |
; LITTLE-LABEL: name: dont_combine_duplicate_offset
; LITTLE: liveins: $x0, $x1
- ; LITTLE: %cst_1:_(s32) = G_CONSTANT i32 1
- ; LITTLE: %cst_2:_(s32) = G_CONSTANT i32 2
- ; LITTLE: %cst_3:_(s32) = G_CONSTANT i32 3
+ ; LITTLE: %cst_1:_(s64) = G_CONSTANT i64 1
+ ; LITTLE: %cst_2:_(s64) = G_CONSTANT i64 2
+ ; LITTLE: %cst_3:_(s64) = G_CONSTANT i64 3
; LITTLE: %cst_8:_(s32) = G_CONSTANT i32 8
; LITTLE: %duplicate_shl_cst:_(s32) = G_CONSTANT i32 16
; LITTLE: %ptr:_(p0) = COPY $x1
- ; LITTLE: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s32)
- ; LITTLE: %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(s32)
- ; LITTLE: %ptr_elt_3:_(p0) = G_PTR_ADD %ptr, %cst_3(s32)
+ ; LITTLE: %ptr_elt_1:_(p0) = G_PTR_ADD %ptr, %cst_1(s64)
+ ; LITTLE: %ptr_elt_2:_(p0) = G_PTR_ADD %ptr, %cst_2(s64)
+ ; LITTLE: %ptr_...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/84352
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