[compiler-rt] [compiler-rt] SignalContext, attempt to implement ::DumpAllRegisters (PR #84413)

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``````````bash
git-clang-format --diff 487cfbe494413e12123b55dead5ef8742ef49fb2 65b4f60bfb95cd86866dc06acee96d153765745a -- compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
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View the diff from clang-format here.
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diff --git a/compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp b/compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
index 3c0e9248b9..a43c2f95fc 100644
--- a/compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
+++ b/compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
@@ -2108,19 +2108,20 @@ bool SignalContext::IsTrueFaultingAddress() const {
 void SignalContext::DumpAllRegisters(void *context) {
 #  if SANITIZER_LINUX
 #    if defined(__x86_64__)
-   ucontext_t *uc = static_cast<ucontext_t *>(context);
-   mcontext_t *mc = &uc->uc_mcontext;
-   
-   Report(
-       "rax: %016lx rbx: %016lx rbp: %016lx rsp: %016lx\n"
-       "rdi: %016lx rsi: %016lx rdx: %016lx rcx: %016lx\n"
-       "r8: %016lx  r9: %016lx  r10: %016lx r11: %016lx\n"
-       "r12: %016lx r13: %016lx r14: %016lx r15: %016lx\n",
-       mc->gregs[REG_RAX], mc->gregs[REG_RBX], mc->gregs[REG_RBP], mc->gregs[REG_RSP],
-       mc->gregs[REG_RDI], mc->gregs[REG_RSI], mc->gregs[REG_RDX], mc->gregs[REG_RCX],
-       mc->gregs[REG_R8], mc->gregs[REG_R9], mc->gregs[REG_R10], mc->gregs[REG_R11],
-       mc->gregs[REG_R12], mc->gregs[REG_R13], mc->gregs[REG_R14], mc->gregs[REG_R15]
-   );
+  ucontext_t *uc = static_cast<ucontext_t *>(context);
+  mcontext_t *mc = &uc->uc_mcontext;
+
+  Report(
+      "rax: %016lx rbx: %016lx rbp: %016lx rsp: %016lx\n"
+      "rdi: %016lx rsi: %016lx rdx: %016lx rcx: %016lx\n"
+      "r8: %016lx  r9: %016lx  r10: %016lx r11: %016lx\n"
+      "r12: %016lx r13: %016lx r14: %016lx r15: %016lx\n",
+      mc->gregs[REG_RAX], mc->gregs[REG_RBX], mc->gregs[REG_RBP],
+      mc->gregs[REG_RSP], mc->gregs[REG_RDI], mc->gregs[REG_RSI],
+      mc->gregs[REG_RDX], mc->gregs[REG_RCX], mc->gregs[REG_R8],
+      mc->gregs[REG_R9], mc->gregs[REG_R10], mc->gregs[REG_R11],
+      mc->gregs[REG_R12], mc->gregs[REG_R13], mc->gregs[REG_R14],
+      mc->gregs[REG_R15]);
 #    endif
 #  endif
   // FIXME: Implement for other platforms/archs.

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https://github.com/llvm/llvm-project/pull/84413