[llvm] ee24409 - Revert "[AArch64][GlobalISel] Fix incorrect selection of monotonic s32->s64 anyext load."

Florian Mayer via llvm-commits llvm-commits at lists.llvm.org
Thu Mar 7 09:43:36 PST 2024


Author: Florian Mayer
Date: 2024-03-07T09:43:21-08:00
New Revision: ee24409c40ff35c3221892d9723331c233ca9f0e

URL: https://github.com/llvm/llvm-project/commit/ee24409c40ff35c3221892d9723331c233ca9f0e
DIFF: https://github.com/llvm/llvm-project/commit/ee24409c40ff35c3221892d9723331c233ca9f0e.diff

LOG: Revert "[AArch64][GlobalISel] Fix incorrect selection of monotonic s32->s64 anyext load."

This reverts commit 7524ad9aa7b1b5003fe554a6ac8e434d50027dfb.

Broke sanitizer build bots, e.g. https://lab.llvm.org/buildbot/#/builders/5/builds/41588/steps/9/logs/stdio

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
    llvm/test/CodeGen/AArch64/GlobalISel/select-atomic-load-store.mir

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
index 48b73dced09ba0..6652883792391b 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
@@ -2997,14 +2997,13 @@ bool AArch64InstructionSelector::select(MachineInstr &I) {
       }
     }
 
-    if (IsZExtLoad ||
-        (isa<GLoad>(LdSt) && ValTy == LLT::scalar(64) && MemSizeInBits == 32)) {
-      // The any/zextload from a smaller type to i32 should be handled by the
+    if (IsZExtLoad) {
+      // The zextload from a smaller type to i32 should be handled by the
       // importer.
       if (MRI.getType(LoadStore->getOperand(0).getReg()).getSizeInBits() != 64)
         return false;
-      // If we have an extending load then change the load's type to be a
-      // narrower reg and zero_extend with SUBREG_TO_REG.
+      // If we have a ZEXTLOAD then change the load's type to be a narrower reg
+      // and zero_extend with SUBREG_TO_REG.
       Register LdReg = MRI.createVirtualRegister(&AArch64::GPR32RegClass);
       Register DstReg = LoadStore->getOperand(0).getReg();
       LoadStore->getOperand(0).setReg(LdReg);

diff  --git a/llvm/test/CodeGen/AArch64/GlobalISel/select-atomic-load-store.mir b/llvm/test/CodeGen/AArch64/GlobalISel/select-atomic-load-store.mir
index 6b4bbb85b2ec44..5787f914b965d3 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/select-atomic-load-store.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/select-atomic-load-store.mir
@@ -9,11 +9,6 @@
     ret i8 %v
   }
 
-  define i32 @anyext_load_monotonic_i32() {
-    %v = load atomic i32, ptr null monotonic, align 4
-    ret i32 %v
-  }
-
 ...
 ---
 name:            load_acq_i8
@@ -30,33 +25,13 @@ body:             |
 
     ; CHECK-LABEL: name: load_acq_i8
     ; CHECK: liveins: $x0
-    ; CHECK-NEXT: {{  $}}
-    ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
-    ; CHECK-NEXT: [[LDARB:%[0-9]+]]:gpr32 = LDARB [[COPY]] :: (load acquire (s8) from %ir.ptr, align 8)
-    ; CHECK-NEXT: $w0 = COPY [[LDARB]]
-    ; CHECK-NEXT: RET_ReallyLR implicit $w0
+    ; CHECK: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
+    ; CHECK: [[LDARB:%[0-9]+]]:gpr32 = LDARB [[COPY]] :: (load acquire (s8) from %ir.ptr, align 8)
+    ; CHECK: $w0 = COPY [[LDARB]]
+    ; CHECK: RET_ReallyLR implicit $w0
     %0:gpr(p0) = COPY $x0
     %2:gpr(s32) = G_LOAD %0(p0) :: (load acquire (s8) from %ir.ptr, align 8)
     $w0 = COPY %2(s32)
     RET_ReallyLR implicit $w0
 
 ...
----
-name:            anyext_load_monotonic_i32
-legalized:       true
-regBankSelected: true
-tracksRegLiveness: true
-body:             |
-  bb.1:
-    ; CHECK-LABEL: name: anyext_load_monotonic_i32
-    ; CHECK: [[COPY:%[0-9]+]]:gpr64common = COPY $xzr
-    ; CHECK-NEXT: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui [[COPY]], 0 :: (load monotonic (s32) from `ptr null`)
-    ; CHECK-NEXT: %ld:gpr64all = SUBREG_TO_REG 0, [[LDRWui]], %subreg.sub_32
-    ; CHECK-NEXT: $x0 = COPY %ld
-    ; CHECK-NEXT: RET_ReallyLR implicit $x0
-    %1:gpr(p0) = G_CONSTANT i64 0
-    %ld:gpr(s64) = G_LOAD %1(p0) :: (load monotonic (s32) from `ptr null`)
-    $x0 = COPY %ld(s64)
-    RET_ReallyLR implicit $x0
-
-...


        


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