[llvm] [RISCV] Insert a freeze before converting select to AND/OR. (PR #84232)

Yingwei Zheng via llvm-commits llvm-commits at lists.llvm.org
Thu Mar 7 05:14:52 PST 2024


dtcxzyw wrote:

> > There is no regression in the LLVM test-suite :)
> 
> Try `-march=rv32gc`? It seems there are a lot of regressions.

I don't think llvm-test-suite is suitable for rv32gc. Could you please test this PR with some benchmarks designed for embedded systems (e.g., coremark/embench)?


https://github.com/llvm/llvm-project/pull/84232


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