[llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)

[Pierre van Houtryve via llvm-commits]

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@@ -5286,6 +5286,156 @@ MachineInstr *CombinerHelper::buildSDivUsingMul(MachineInstr &MI) {
   return MIB.buildMul(Ty, Res, Factor);
 }
 
+bool CombinerHelper::matchDivByPow2(MachineInstr &MI, bool IsSigned) {
+  assert((MI.getOpcode() == TargetOpcode::G_SDIV ||
+          MI.getOpcode() == TargetOpcode::G_UDIV) &&
+         "Expected SDIV or UDIV");
+  auto &Div = cast<GenericMachineInstr>(MI);
+  Register RHS = Div.getReg(2);
+  auto MatchPow2 = [&](const Constant *C) {
+    if (auto *CI = dyn_cast<ConstantInt>(C)) {
+      if (CI->getValue().isPowerOf2())
+        return true;
+      if (IsSigned && CI->getValue().isNegatedPowerOf2())
+        return true;
+    }
+    return false;
+  };
+  return matchUnaryPredicate(MRI, RHS, MatchPow2, /*AllowUndefs=*/false);
+}
+
+void CombinerHelper::applySDivByPow2(MachineInstr &MI) {
+  assert(MI.getOpcode() == TargetOpcode::G_SDIV && "Expected SDIV");
+  auto &SDiv = cast<GenericMachineInstr>(MI);
+  Register Dst = SDiv.getReg(0);
+  Register LHS = SDiv.getReg(1);
+  Register RHS = SDiv.getReg(2);
+  LLT Ty = MRI.getType(Dst);
+  LLT ShiftAmtTy = getTargetLowering().getPreferredShiftAmountTy(Ty);
+
+  Builder.setInstrAndDebugLoc(MI);
+
+  // Effectively we want to lower G_SDIV %lhs, %rhs, where %rhs is a power of 2,
+  // to the following version:
+  //
+  // %bits = G_CONSTANT $bitwidth
+  // %c1 = G_CTTZ %rhs
+  // %c1 = G_ZEXT %c1
+  // %inexact = G_SUB $bits, %c1
+  // %tmp = G_CONSTANT ($bitwidth - 1)
+  // %sign = %G_ASHR %lhs, %tmp
+  // %srl = G_SHL %sign, %inexact
+  // %add = G_ADD $lhs, $srl
+  // $sra = G_ASHR %add, %c1
+  // %one = G_CONSTANT $1
+  // %allones = G_CONSTANT %111..1
+  // %isone = G_ICMP EQ %rhs, $one
+  // %isallones = G_ICMP EQ %rhs, $allones
+  // %isoneorallones = G_OR %isone, $isallones
+  // %sra = G_SELECT, %isoneorallones, %lhs, %sra
+  // %zero = G_CONSTANT $0
+  // %sub = G_SUB %zero, %sra
+  // %isneg = G_ICMP SLT $lhs, %zero
+  // %res = G_SELECT %isneg, %sub, %sra
+  //
+  // When $rhs is a constant integer, or a splat vector, we can check its value
+  // at compile time such that the first two G_ICMP conditional statements, as
+  // well as the corresponding non-taken branches, can be eliminated. This can
+  // generate compact code even w/o any constant folding afterwards. When $rhs
+  // is not a splat vector, we have to generate those checks via instructions.
+
+  unsigned Bitwidth = Ty.getScalarSizeInBits();
+  auto Zero = Builder.buildConstant(Ty, 0);
+
+  if (auto RHSC = getConstantOrConstantSplatVector(RHS)) {
----------------
Pierre-vh wrote:

Can you either:

- Do the necessary constant folding/combine additions first, so that this code is never needed
- Create an issue/put a TODO there to ensure it gets removed as soon as the changes are in ?

I want to avoid this bit being forgotten about and replicating already existing logic

https://github.com/llvm/llvm-project/pull/83155