[llvm] [Hexagon] Use LiveRegUnits (PR #84112)

[via llvm-commits]

https://github.com/AtariDreams updated https://github.com/llvm/llvm-project/pull/84112

>From 905730eb050a1e63bdbf670e05d317fb0ed218e4 Mon Sep 17 00:00:00 2001
From: Rose <gfunni234 at gmail.com>
Date: Tue, 5 Mar 2024 17:35:23 -0500
Subject: [PATCH] [Hexagon] Use LiveRegUnits

---
 llvm/lib/Target/Hexagon/HexagonGenMux.cpp | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/llvm/lib/Target/Hexagon/HexagonGenMux.cpp b/llvm/lib/Target/Hexagon/HexagonGenMux.cpp
index 509144ceb6a049..40a4a8097a57c9 100644
--- a/llvm/lib/Target/Hexagon/HexagonGenMux.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonGenMux.cpp
@@ -26,7 +26,7 @@
 #include "llvm/ADT/DenseMap.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/StringRef.h"
-#include "llvm/CodeGen/LivePhysRegs.h"
+#include "llvm/CodeGen/LiveRegUnits.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
@@ -346,11 +346,11 @@ bool HexagonGenMux::genMuxInBlock(MachineBasicBlock &B) {
 
   // Fix up kill flags.
 
-  LivePhysRegs LPR(*HRI);
+  LiveRegUnits LPR(*HRI);
   LPR.addLiveOuts(B);
   auto IsLive = [&LPR, this](unsigned Reg) -> bool {
     for (MCPhysReg S : HRI->subregs_inclusive(Reg))
-      if (LPR.contains(S))
+      if (!LPR.available(S))
         return true;
     return false;
   };
@@ -365,8 +365,7 @@ bool HexagonGenMux::genMuxInBlock(MachineBasicBlock &B) {
       if (!Op.isReg() || !Op.isUse())
         continue;
       assert(Op.getSubReg() == 0 && "Should have physical registers only");
-      bool Live = IsLive(Op.getReg());
-      Op.setIsKill(!Live);
+      Op.setIsKill(!LPR.available(Op.getReg()));
     }
     LPR.stepBackward(I);
   }