[llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)

[Alfie Richards via llvm-commits]

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@@ -1732,6 +1732,7 @@ def ARMAsmWriter : AsmWriter {
 
 def ARMAsmParser : AsmParser {
   bit ReportMultipleNearMisses = 1;
+  let PreferSmallerInstructions= true;
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AlfieRichardsArm wrote:

Done

https://github.com/llvm/llvm-project/pull/83436