[llvm] [PowerPC] Rename symbols references by tls-local-dynamic model on AIX (PR #84132)
Felix via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 6 00:08:43 PST 2024
https://github.com/orcguru created https://github.com/llvm/llvm-project/pull/84132
On AIX, rename those tls-local-dynamic referenced TOC symbols, so that in following patches we can switch between different TLS models (local-dynamic or initial-exec) for the same TLS GV in different functions within the same module.
>From 92ab84000b638e206106bf5b1e9e2e842f5bcf2b Mon Sep 17 00:00:00 2001
From: Ting Wang <Ting.Wang.SH at ibm.com>
Date: Wed, 6 Mar 2024 02:51:40 -0500
Subject: [PATCH] [PowerPC] Rename symbols references by tls-local-dynamic
model
On AIX, rename those tls-local-dynamic referenced TOC symbols, so that in
following patches we can switch between different TLS models (local-dynamic
or initial-exec) for the same TLS GV in different functions within the same
module.
---
.../CodeGen/TargetLoweringObjectFileImpl.h | 5 +-
llvm/include/llvm/MC/MCContext.h | 3 +-
.../llvm/Target/TargetLoweringObjectFile.h | 6 +-
.../CodeGen/TargetLoweringObjectFileImpl.cpp | 8 +-
llvm/lib/MC/MCContext.cpp | 5 +-
llvm/lib/MC/MCSymbolXCOFF.cpp | 6 +-
.../PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp | 15 +-
llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 6 +-
.../test/CodeGen/PowerPC/aix-tls-gd-double.ll | 12 +-
llvm/test/CodeGen/PowerPC/aix-tls-gd-int.ll | 12 +-
.../CodeGen/PowerPC/aix-tls-gd-longlong.ll | 24 +-
.../PowerPC/aix-tls-ld-unqualified-symbols.ll | 362 ++++++++++++++++++
.../CodeGen/PowerPC/aix-tls-local-dynamic.ll | 39 +-
13 files changed, 460 insertions(+), 43 deletions(-)
create mode 100644 llvm/test/CodeGen/PowerPC/aix-tls-ld-unqualified-symbols.ll
diff --git a/llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h b/llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
index 8eef45ce565deb8..1aa25e98423afaa 100644
--- a/llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
+++ b/llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
@@ -279,8 +279,9 @@ class TargetLoweringObjectFileXCOFF : public TargetLoweringObjectFile {
MCSection *
getSectionForFunctionDescriptor(const Function *F,
const TargetMachine &TM) const override;
- MCSection *getSectionForTOCEntry(const MCSymbol *Sym,
- const TargetMachine &TM) const override;
+ MCSection *
+ getSectionForTOCEntry(const MCSymbol *Sym, const TargetMachine &TM,
+ const MCSymbolRefExpr::VariantKind VK) const override;
/// For external functions, this will always return a function descriptor
/// csect.
diff --git a/llvm/include/llvm/MC/MCContext.h b/llvm/include/llvm/MC/MCContext.h
index 68d6f3e59d2d41a..5e1473b7f78eb85 100644
--- a/llvm/include/llvm/MC/MCContext.h
+++ b/llvm/include/llvm/MC/MCContext.h
@@ -678,7 +678,8 @@ class MCContext {
std::optional<XCOFF::CsectProperties> CsectProp = std::nullopt,
bool MultiSymbolsAllowed = false, const char *BeginSymName = nullptr,
std::optional<XCOFF::DwarfSectionSubtypeFlags> DwarfSubtypeFlags =
- std::nullopt);
+ std::nullopt,
+ StringRef RenamePrefix = StringRef());
// Create and save a copy of STI and return a reference to the copy.
MCSubtargetInfo &getSubtargetCopy(const MCSubtargetInfo &STI);
diff --git a/llvm/include/llvm/Target/TargetLoweringObjectFile.h b/llvm/include/llvm/Target/TargetLoweringObjectFile.h
index 0c09cfe684783bf..31a466a18d77a23 100644
--- a/llvm/include/llvm/Target/TargetLoweringObjectFile.h
+++ b/llvm/include/llvm/Target/TargetLoweringObjectFile.h
@@ -14,6 +14,7 @@
#ifndef LLVM_TARGET_TARGETLOWERINGOBJECTFILE_H
#define LLVM_TARGET_TARGETLOWERINGOBJECTFILE_H
+#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCObjectFileInfo.h"
#include "llvm/MC/MCRegister.h"
#include <cstdint>
@@ -256,8 +257,9 @@ class TargetLoweringObjectFile : public MCObjectFileInfo {
/// On targets that support TOC entries, return a section for the entry given
/// the symbol it refers to.
/// TODO: Implement this interface for existing ELF targets.
- virtual MCSection *getSectionForTOCEntry(const MCSymbol *S,
- const TargetMachine &TM) const {
+ virtual MCSection *
+ getSectionForTOCEntry(const MCSymbol *S, const TargetMachine &TM,
+ const MCSymbolRefExpr::VariantKind VK) const {
return nullptr;
}
diff --git a/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp b/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
index 6943ce261d9d9c8..ec17ceb9c83ece2 100644
--- a/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
+++ b/llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
@@ -2679,7 +2679,8 @@ MCSection *TargetLoweringObjectFileXCOFF::getSectionForFunctionDescriptor(
}
MCSection *TargetLoweringObjectFileXCOFF::getSectionForTOCEntry(
- const MCSymbol *Sym, const TargetMachine &TM) const {
+ const MCSymbol *Sym, const TargetMachine &TM,
+ const MCSymbolRefExpr::VariantKind VK) const {
// Use TE storage-mapping class when large code model is enabled so that
// the chance of needing -bbigtoc is decreased. Also, the toc-entry for
// EH info is never referenced directly using instructions so it can be
@@ -2694,7 +2695,10 @@ MCSection *TargetLoweringObjectFileXCOFF::getSectionForTOCEntry(
cast<MCSymbolXCOFF>(Sym)->isEHInfo())
? XCOFF::XMC_TE
: XCOFF::XMC_TC,
- XCOFF::XTY_SD));
+ XCOFF::XTY_SD),
+ /*MultiSymbolsAllowed=*/false, /*BeginSymName=*/nullptr,
+ /*DwarfSubtypeFlags=*/std::nullopt,
+ (VK == MCSymbolRefExpr::VK_PPC_AIX_TLSLD ? "_$TLSLD." : StringRef()));
}
MCSection *TargetLoweringObjectFileXCOFF::getSectionForLSDA(
diff --git a/llvm/lib/MC/MCContext.cpp b/llvm/lib/MC/MCContext.cpp
index ba5cefaf18c1fd8..dd2891470343719 100644
--- a/llvm/lib/MC/MCContext.cpp
+++ b/llvm/lib/MC/MCContext.cpp
@@ -780,7 +780,8 @@ MCSectionXCOFF *MCContext::getXCOFFSection(
StringRef Section, SectionKind Kind,
std::optional<XCOFF::CsectProperties> CsectProp, bool MultiSymbolsAllowed,
const char *BeginSymName,
- std::optional<XCOFF::DwarfSectionSubtypeFlags> DwarfSectionSubtypeFlags) {
+ std::optional<XCOFF::DwarfSectionSubtypeFlags> DwarfSectionSubtypeFlags,
+ StringRef RenamePrefix) {
bool IsDwarfSec = DwarfSectionSubtypeFlags.has_value();
assert((IsDwarfSec != CsectProp.has_value()) && "Invalid XCOFF section!");
@@ -806,7 +807,7 @@ MCSectionXCOFF *MCContext::getXCOFFSection(
QualName = cast<MCSymbolXCOFF>(getOrCreateSymbol(CachedName));
else
QualName = cast<MCSymbolXCOFF>(getOrCreateSymbol(
- CachedName + "[" +
+ RenamePrefix + CachedName + "[" +
XCOFF::getMappingClassString(CsectProp->MappingClass) + "]"));
MCSymbol *Begin = nullptr;
diff --git a/llvm/lib/MC/MCSymbolXCOFF.cpp b/llvm/lib/MC/MCSymbolXCOFF.cpp
index b4c96a1ffa23332..17f0bcf77745af1 100644
--- a/llvm/lib/MC/MCSymbolXCOFF.cpp
+++ b/llvm/lib/MC/MCSymbolXCOFF.cpp
@@ -24,7 +24,11 @@ void MCSymbolXCOFF::setRepresentedCsect(MCSectionXCOFF *C) {
assert((!RepresentedCsect || RepresentedCsect == C) &&
"Trying to set a csect that doesn't match the one that this symbol is "
"already mapped to.");
- assert(getSymbolTableName().equals(C->getSymbolTableName()) &&
+ // Csect representation related symbols access by using TLS local-dynamic
+ // model have prefix "_$TLSLD." before their names.
+ assert((getSymbolTableName().equals(C->getSymbolTableName()) ||
+ getSymbolTableName().equals(std::string("_$TLSLD.") +
+ C->getSymbolTableName().str())) &&
"SymbolTableNames need to be the same for this symbol and its csect "
"representation.");
RepresentedCsect = C;
diff --git a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
index b849b7be7b7be8c..0263c3588a22835 100644
--- a/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
+++ b/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
@@ -231,6 +231,20 @@ class PPCTargetAsmStreamer : public PPCTargetStreamer {
MCSymbolXCOFF *TCSym =
cast<MCSectionXCOFF>(Streamer.getCurrentSectionOnly())
->getQualNameSymbol();
+
+ // On AIX, symbol accessed using TLS local-dynamic model has been renamed
+ // by adding prefix "_$TLSLD.". Do assert that it has been renamed, and
+ // then emit the .rename with the original symbol name.
+ if (Kind == MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSLD) {
+ assert(TCSym->hasRename());
+ OS << "\t.tc " << TCSym->getName() << "," << XSym->getName() << "@"
+ << MCSymbolRefExpr::getVariantKindName(Kind) << '\n';
+ StringRef Lhs, Rhs;
+ std::tie(Lhs, Rhs) = TCSym->getSymbolTableName().split("_$TLSLD.");
+ Streamer.emitXCOFFRenameDirective(TCSym, Rhs);
+ return;
+ }
+
// On AIX, we have TLS variable offsets (symbol@({gd|ie|le|ld}) depending
// on the TLS access method (or model). For the general-dynamic access
// method, we also have region handle (symbol at m) for each variable. For
@@ -242,7 +256,6 @@ class PPCTargetAsmStreamer : public PPCTargetStreamer {
Kind == MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSGDM ||
Kind == MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSIE ||
Kind == MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSLE ||
- Kind == MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSLD ||
Kind == MCSymbolRefExpr::VariantKind::VK_PPC_AIX_TLSML)
OS << "\t.tc " << TCSym->getName() << "," << XSym->getName() << "@"
<< MCSymbolRefExpr::getVariantKindName(Kind) << '\n';
diff --git a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
index 9396ca22dacf862..4bf61a74ea76934 100644
--- a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
+++ b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
@@ -2872,10 +2872,10 @@ void PPCAIXAsmPrinter::emitEndOfAsmFile(Module &M) {
Name += cast<MCSymbolXCOFF>(I.first.first)->getSymbolTableName();
MCSymbol *S = OutContext.getOrCreateSymbol(Name);
TCEntry = cast<MCSectionXCOFF>(
- getObjFileLowering().getSectionForTOCEntry(S, TM));
+ getObjFileLowering().getSectionForTOCEntry(S, TM, I.first.second));
} else {
- TCEntry = cast<MCSectionXCOFF>(
- getObjFileLowering().getSectionForTOCEntry(I.first.first, TM));
+ TCEntry = cast<MCSectionXCOFF>(getObjFileLowering().getSectionForTOCEntry(
+ I.first.first, TM, I.first.second));
}
OutStreamer->switchSection(TCEntry);
diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-gd-double.ll b/llvm/test/CodeGen/PowerPC/aix-tls-gd-double.ll
index ae41b6b1301064e..d84f92b11c97811 100644
--- a/llvm/test/CodeGen/PowerPC/aix-tls-gd-double.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-tls-gd-double.ll
@@ -636,7 +636,8 @@ entry:
; SMALL32-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
; SMALL32-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
; SMALL32-LABEL: L..C5:
-; SMALL32-NEXT: .tc TIInit[TC],TIInit[TL]@ld
+; SMALL32-NEXT: .tc _Renamed..5f24__TLSLD.TIInit[TC],TIInit[TL]@ld
+; SMALL32-NEXT: .rename _Renamed..5f24__TLSLD.TIInit[TC],"TIInit"
; SMALL32-LABEL: L..C6:
; SMALL32-NEXT: .tc .TWInit[TC],TWInit[TL]@m
; SMALL32-LABEL: L..C7:
@@ -654,7 +655,8 @@ entry:
; LARGE32-LABEL: L..C3:
; LARGE32-NEXT: .tc TGInit[TE],TGInit[TL]@gd
; LARGE32-LABEL: L..C4:
-; LARGE32-NEXT: .tc TIInit[TE],TIInit[TL]@ld
+; LARGE32-NEXT: .tc _Renamed..5f24__TLSLD.TIInit[TE],TIInit[TL]@ld
+; LARGE32-NEXT: .rename _Renamed..5f24__TLSLD.TIInit[TE],"TIInit"
; LARGE32-LABEL: L..C5:
; LARGE32-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
; LARGE32-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
@@ -678,7 +680,8 @@ entry:
; SMALL64-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
; SMALL64-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
; SMALL64-LABEL: L..C5:
-; SMALL64-NEXT: .tc TIInit[TC],TIInit[TL]@ld
+; SMALL64-NEXT: .tc _Renamed..5f24__TLSLD.TIInit[TC],TIInit[TL]@ld
+; SMALL64-NEXT: .rename _Renamed..5f24__TLSLD.TIInit[TC],"TIInit"
; SMALL64-LABEL: L..C6:
; SMALL64-NEXT: .tc .TWInit[TC],TWInit[TL]@m
; SMALL64-LABEL: L..C7:
@@ -699,7 +702,8 @@ entry:
; LARGE64-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
; LARGE64-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
; LARGE64-LABEL: L..C5:
-; LARGE64-NEXT: .tc TIInit[TE],TIInit[TL]@ld
+; LARGE64-NEXT: .tc _Renamed..5f24__TLSLD.TIInit[TE],TIInit[TL]@ld
+; LARGE64-NEXT: .rename _Renamed..5f24__TLSLD.TIInit[TE],"TIInit"
; LARGE64-LABEL: L..C6:
; LARGE64-NEXT: .tc .TWInit[TE],TWInit[TL]@m
; LARGE64-LABEL: L..C7:
diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-gd-int.ll b/llvm/test/CodeGen/PowerPC/aix-tls-gd-int.ll
index bbb8e04b67b95ef..f9567840a196511 100644
--- a/llvm/test/CodeGen/PowerPC/aix-tls-gd-int.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-tls-gd-int.ll
@@ -651,7 +651,8 @@ entry:
; SMALL32-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
; SMALL32-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
; SMALL32-LABEL: L..C5:
-; SMALL32-NEXT: .tc TIUninit[TC],TIUninit[UL]@ld
+; SMALL32-NEXT: .tc _Renamed..5f24__TLSLD.TIUninit[TC],TIUninit[UL]@ld
+; SMALL32-NEXT: .rename _Renamed..5f24__TLSLD.TIUninit[TC],"TIUninit"
; SMALL32-LABEL: L..C6:
; SMALL32-NEXT: .tc .TWUninit[TC],TWUninit[TL]@m
; SMALL32-LABEL: L..C7:
@@ -669,7 +670,8 @@ entry:
; LARGE32-LABEL: L..C3:
; LARGE32-NEXT: .tc TGInit[TE],TGInit[TL]@gd
; LARGE32-LABEL: L..C4:
-; LARGE32-NEXT: .tc TIUninit[TE],TIUninit[UL]@ld
+; LARGE32-NEXT: .tc _Renamed..5f24__TLSLD.TIUninit[TE],TIUninit[UL]@ld
+; LARGE32-NEXT: .rename _Renamed..5f24__TLSLD.TIUninit[TE],"TIUninit"
; LARGE32-LABEL: L..C5:
; LARGE32-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
; LARGE32-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
@@ -693,7 +695,8 @@ entry:
; SMALL64-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
; SMALL64-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
; SMALL64-LABEL: L..C5:
-; SMALL64-NEXT: .tc TIUninit[TC],TIUninit[UL]@ld
+; SMALL64-NEXT: .tc _Renamed..5f24__TLSLD.TIUninit[TC],TIUninit[UL]@ld
+; SMALL64-NEXT: .rename _Renamed..5f24__TLSLD.TIUninit[TC],"TIUninit"
; SMALL64-LABEL: L..C6:
; SMALL64-NEXT: .tc .TWUninit[TC],TWUninit[TL]@m
; SMALL64-LABEL: L..C7:
@@ -714,7 +717,8 @@ entry:
; LARGE64-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
; LARGE64-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
; LARGE64-LABEL: L..C5:
-; LARGE64-NEXT: .tc TIUninit[TE],TIUninit[UL]@ld
+; LARGE64-NEXT: .tc _Renamed..5f24__TLSLD.TIUninit[TE],TIUninit[UL]@ld
+; LARGE64-NEXT: .rename _Renamed..5f24__TLSLD.TIUninit[TE],"TIUninit"
; LARGE64-LABEL: L..C6:
; LARGE64-NEXT: .tc .TWUninit[TE],TWUninit[TL]@m
; LARGE64-LABEL: L..C7:
diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-gd-longlong.ll b/llvm/test/CodeGen/PowerPC/aix-tls-gd-longlong.ll
index ff087a2144488c2..06937635bbd183c 100644
--- a/llvm/test/CodeGen/PowerPC/aix-tls-gd-longlong.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-tls-gd-longlong.ll
@@ -687,9 +687,11 @@ entry:
; SMALL32-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
; SMALL32-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
; SMALL32-LABEL: L..C3:
-; SMALL32-NEXT: .tc TIUninit[TC],TIUninit[UL]@ld
+; SMALL32-NEXT: .tc _Renamed..5f24__TLSLD.TIUninit[TC],TIUninit[UL]@ld
+; SMALL32-NEXT: .rename _Renamed..5f24__TLSLD.TIUninit[TC],"TIUninit"
; SMALL32-LABEL: L..C4:
-; SMALL32-NEXT: .tc TIInit[TC],TIInit[TL]@ld
+; SMALL32-NEXT: .tc _Renamed..5f24__TLSLD.TIInit[TC],TIInit[TL]@ld
+; SMALL32-NEXT: .rename _Renamed..5f24__TLSLD.TIInit[TC],"TIInit"
; SMALL32-LABEL: L..C5:
; SMALL32-NEXT: .tc .TWInit[TC],TWInit[TL]@m
; SMALL32-LABEL: L..C6:
@@ -703,12 +705,14 @@ entry:
; LARGE32-LABEL: L..C1:
; LARGE32-NEXT: .tc TGInit[TE],TGInit[TL]@gd
; LARGE32-LABEL: L..C2:
-; LARGE32-NEXT: .tc TIUninit[TE],TIUninit[UL]@ld
+; LARGE32-NEXT: .tc _Renamed..5f24__TLSLD.TIUninit[TE],TIUninit[UL]@ld
+; LARGE32-NEXT: .rename _Renamed..5f24__TLSLD.TIUninit[TE],"TIUninit"
; LARGE32-LABEL: L..C3:
; LARGE32-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
; LARGE32-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
; LARGE32-LABEL: L..C4:
-; LARGE32-NEXT: .tc TIInit[TE],TIInit[TL]@ld
+; LARGE32-NEXT: .tc _Renamed..5f24__TLSLD.TIInit[TE],TIInit[TL]@ld
+; LARGE32-NEXT: .rename _Renamed..5f24__TLSLD.TIInit[TE],"TIInit"
; LARGE32-LABEL: L..C5:
; LARGE32-NEXT: .tc .TWInit[TE],TWInit[TL]@m
; LARGE32-LABEL: L..C6:
@@ -725,9 +729,11 @@ entry:
; SMALL64-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
; SMALL64-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
; SMALL64-LABEL: L..C3:
-; SMALL64-NEXT: .tc TIUninit[TC],TIUninit[UL]@ld
+; SMALL64-NEXT: .tc _Renamed..5f24__TLSLD.TIUninit[TC],TIUninit[UL]@ld
+; SMALL64-NEXT: .rename _Renamed..5f24__TLSLD.TIUninit[TC],"TIUninit"
; SMALL64-LABEL: L..C4:
-; SMALL64-NEXT: .tc TIInit[TC],TIInit[TL]@ld
+; SMALL64-NEXT: .tc _Renamed..5f24__TLSLD.TIInit[TC],TIInit[TL]@ld
+; SMALL64-NEXT: .rename _Renamed..5f24__TLSLD.TIInit[TC],"TIInit"
; SMALL64-LABEL: L..C5:
; SMALL64-NEXT: .tc .TWInit[TC],TWInit[TL]@m
; SMALL64-LABEL: L..C6:
@@ -744,9 +750,11 @@ entry:
; LARGE64-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
; LARGE64-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
; LARGE64-LABEL: L..C3:
-; LARGE64-NEXT: .tc TIUninit[TE],TIUninit[UL]@ld
+; LARGE64-NEXT: .tc _Renamed..5f24__TLSLD.TIUninit[TE],TIUninit[UL]@ld
+; LARGE64-NEXT: .rename _Renamed..5f24__TLSLD.TIUninit[TE],"TIUninit"
; LARGE64-LABEL: L..C4:
-; LARGE64-NEXT: .tc TIInit[TE],TIInit[TL]@ld
+; LARGE64-NEXT: .tc _Renamed..5f24__TLSLD.TIInit[TE],TIInit[TL]@ld
+; LARGE64-NEXT: .rename _Renamed..5f24__TLSLD.TIInit[TE],"TIInit"
; LARGE64-LABEL: L..C5:
; LARGE64-NEXT: .tc .TWInit[TE],TWInit[TL]@m
; LARGE64-LABEL: L..C6:
diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-ld-unqualified-symbols.ll b/llvm/test/CodeGen/PowerPC/aix-tls-ld-unqualified-symbols.ll
new file mode 100644
index 000000000000000..d92375730a95a76
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/aix-tls-ld-unqualified-symbols.ll
@@ -0,0 +1,362 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
+; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \
+; RUN: --code-model=small < %s | FileCheck %s --check-prefixes=SMALL64,COMMON
+; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff \
+; RUN: --code-model=large < %s | FileCheck %s --check-prefixes=LARGE64,COMMON
+; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
+; RUN: --code-model=small < %s | FileCheck %s --check-prefixes=SMALL32,COMMON
+; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff \
+; RUN: --code-model=large < %s | FileCheck %s --check-prefixes=LARGE32,COMMON
+
+ at _$TLSLD. = thread_local(localdynamic) global i32 42, align 4
+ at _$TLSLD.a = thread_local(localdynamic) global i32 42, align 4
+ at __$TLSLD. = internal thread_local(localdynamic) global i32 42, align 4
+ at _$TLSLD._$TLSLD. = internal thread_local(localdynamic) global i32 42, align 4
+
+declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull)
+
+define i32 @loadSym1() {
+; SMALL64-LABEL: loadSym1:
+; SMALL64: # %bb.0: # %entry
+; SMALL64-NEXT: mflr 0
+; SMALL64-NEXT: stdu 1, -48(1)
+; SMALL64-NEXT: ld 3, L..C0(2) # target-flags(ppc-tlsldm) @"_$TLSML"
+; SMALL64-NEXT: std 0, 64(1)
+; SMALL64-NEXT: bla .__tls_get_mod[PR]
+; SMALL64-NEXT: ld 4, L..C1(2) # target-flags(ppc-tlsld) @"_$TLSLD."
+; SMALL64-NEXT: lwzx 3, 3, 4
+; SMALL64-NEXT: addi 1, 1, 48
+; SMALL64-NEXT: ld 0, 16(1)
+; SMALL64-NEXT: mtlr 0
+; SMALL64-NEXT: blr
+;
+; LARGE64-LABEL: loadSym1:
+; LARGE64: # %bb.0: # %entry
+; LARGE64-NEXT: mflr 0
+; LARGE64-NEXT: stdu 1, -48(1)
+; LARGE64-NEXT: addis 3, L..C0 at u(2)
+; LARGE64-NEXT: addis 6, L..C1 at u(2)
+; LARGE64-NEXT: std 0, 64(1)
+; LARGE64-NEXT: ld 3, L..C0 at l(3)
+; LARGE64-NEXT: bla .__tls_get_mod[PR]
+; LARGE64-NEXT: ld 4, L..C1 at l(6)
+; LARGE64-NEXT: lwzx 3, 3, 4
+; LARGE64-NEXT: addi 1, 1, 48
+; LARGE64-NEXT: ld 0, 16(1)
+; LARGE64-NEXT: mtlr 0
+; LARGE64-NEXT: blr
+;
+; SMALL32-LABEL: loadSym1:
+; SMALL32: # %bb.0: # %entry
+; SMALL32-NEXT: mflr 0
+; SMALL32-NEXT: stwu 1, -32(1)
+; SMALL32-NEXT: lwz 3, L..C0(2) # target-flags(ppc-tlsldm) @"_$TLSML"
+; SMALL32-NEXT: stw 0, 40(1)
+; SMALL32-NEXT: bla .__tls_get_mod[PR]
+; SMALL32-NEXT: lwz 4, L..C1(2) # target-flags(ppc-tlsld) @"_$TLSLD."
+; SMALL32-NEXT: lwzx 3, 3, 4
+; SMALL32-NEXT: addi 1, 1, 32
+; SMALL32-NEXT: lwz 0, 8(1)
+; SMALL32-NEXT: mtlr 0
+; SMALL32-NEXT: blr
+;
+; LARGE32-LABEL: loadSym1:
+; LARGE32: # %bb.0: # %entry
+; LARGE32-NEXT: mflr 0
+; LARGE32-NEXT: stwu 1, -32(1)
+; LARGE32-NEXT: stw 0, 40(1)
+; LARGE32-NEXT: addis 6, L..C0 at u(2)
+; LARGE32-NEXT: addis 3, L..C1 at u(2)
+; LARGE32-NEXT: lwz 3, L..C1 at l(3)
+; LARGE32-NEXT: bla .__tls_get_mod[PR]
+; LARGE32-NEXT: lwz 4, L..C0 at l(6)
+; LARGE32-NEXT: lwzx 3, 3, 4
+; LARGE32-NEXT: addi 1, 1, 32
+; LARGE32-NEXT: lwz 0, 8(1)
+; LARGE32-NEXT: mtlr 0
+; LARGE32-NEXT: blr
+entry:
+ %0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @_$TLSLD.)
+ %1 = load i32, ptr %0, align 4
+ ret i32 %1
+}
+
+define i32 @loadSym2() {
+; SMALL64-LABEL: loadSym2:
+; SMALL64: # %bb.0: # %entry
+; SMALL64-NEXT: mflr 0
+; SMALL64-NEXT: stdu 1, -48(1)
+; SMALL64-NEXT: ld 3, L..C0(2) # target-flags(ppc-tlsldm) @"_$TLSML"
+; SMALL64-NEXT: std 0, 64(1)
+; SMALL64-NEXT: bla .__tls_get_mod[PR]
+; SMALL64-NEXT: ld 4, L..C2(2) # target-flags(ppc-tlsld) @"_$TLSLD.a"
+; SMALL64-NEXT: lwzx 3, 3, 4
+; SMALL64-NEXT: addi 1, 1, 48
+; SMALL64-NEXT: ld 0, 16(1)
+; SMALL64-NEXT: mtlr 0
+; SMALL64-NEXT: blr
+;
+; LARGE64-LABEL: loadSym2:
+; LARGE64: # %bb.0: # %entry
+; LARGE64-NEXT: mflr 0
+; LARGE64-NEXT: stdu 1, -48(1)
+; LARGE64-NEXT: addis 3, L..C0 at u(2)
+; LARGE64-NEXT: addis 6, L..C2 at u(2)
+; LARGE64-NEXT: std 0, 64(1)
+; LARGE64-NEXT: ld 3, L..C0 at l(3)
+; LARGE64-NEXT: bla .__tls_get_mod[PR]
+; LARGE64-NEXT: ld 4, L..C2 at l(6)
+; LARGE64-NEXT: lwzx 3, 3, 4
+; LARGE64-NEXT: addi 1, 1, 48
+; LARGE64-NEXT: ld 0, 16(1)
+; LARGE64-NEXT: mtlr 0
+; LARGE64-NEXT: blr
+;
+; SMALL32-LABEL: loadSym2:
+; SMALL32: # %bb.0: # %entry
+; SMALL32-NEXT: mflr 0
+; SMALL32-NEXT: stwu 1, -32(1)
+; SMALL32-NEXT: lwz 3, L..C0(2) # target-flags(ppc-tlsldm) @"_$TLSML"
+; SMALL32-NEXT: stw 0, 40(1)
+; SMALL32-NEXT: bla .__tls_get_mod[PR]
+; SMALL32-NEXT: lwz 4, L..C2(2) # target-flags(ppc-tlsld) @"_$TLSLD.a"
+; SMALL32-NEXT: lwzx 3, 3, 4
+; SMALL32-NEXT: addi 1, 1, 32
+; SMALL32-NEXT: lwz 0, 8(1)
+; SMALL32-NEXT: mtlr 0
+; SMALL32-NEXT: blr
+;
+; LARGE32-LABEL: loadSym2:
+; LARGE32: # %bb.0: # %entry
+; LARGE32-NEXT: mflr 0
+; LARGE32-NEXT: stwu 1, -32(1)
+; LARGE32-NEXT: stw 0, 40(1)
+; LARGE32-NEXT: addis 6, L..C2 at u(2)
+; LARGE32-NEXT: addis 3, L..C1 at u(2)
+; LARGE32-NEXT: lwz 3, L..C1 at l(3)
+; LARGE32-NEXT: bla .__tls_get_mod[PR]
+; LARGE32-NEXT: lwz 4, L..C2 at l(6)
+; LARGE32-NEXT: lwzx 3, 3, 4
+; LARGE32-NEXT: addi 1, 1, 32
+; LARGE32-NEXT: lwz 0, 8(1)
+; LARGE32-NEXT: mtlr 0
+; LARGE32-NEXT: blr
+entry:
+ %0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @_$TLSLD.a)
+ %1 = load i32, ptr %0, align 4
+ ret i32 %1
+}
+
+define i32 @loadSym3() {
+; SMALL64-LABEL: loadSym3:
+; SMALL64: # %bb.0: # %entry
+; SMALL64-NEXT: mflr 0
+; SMALL64-NEXT: stdu 1, -48(1)
+; SMALL64-NEXT: ld 3, L..C0(2) # target-flags(ppc-tlsldm) @"_$TLSML"
+; SMALL64-NEXT: std 0, 64(1)
+; SMALL64-NEXT: bla .__tls_get_mod[PR]
+; SMALL64-NEXT: ld 4, L..C3(2) # target-flags(ppc-tlsld) @"__$TLSLD."
+; SMALL64-NEXT: lwzx 3, 3, 4
+; SMALL64-NEXT: addi 1, 1, 48
+; SMALL64-NEXT: ld 0, 16(1)
+; SMALL64-NEXT: mtlr 0
+; SMALL64-NEXT: blr
+;
+; LARGE64-LABEL: loadSym3:
+; LARGE64: # %bb.0: # %entry
+; LARGE64-NEXT: mflr 0
+; LARGE64-NEXT: stdu 1, -48(1)
+; LARGE64-NEXT: addis 3, L..C0 at u(2)
+; LARGE64-NEXT: addis 6, L..C3 at u(2)
+; LARGE64-NEXT: std 0, 64(1)
+; LARGE64-NEXT: ld 3, L..C0 at l(3)
+; LARGE64-NEXT: bla .__tls_get_mod[PR]
+; LARGE64-NEXT: ld 4, L..C3 at l(6)
+; LARGE64-NEXT: lwzx 3, 3, 4
+; LARGE64-NEXT: addi 1, 1, 48
+; LARGE64-NEXT: ld 0, 16(1)
+; LARGE64-NEXT: mtlr 0
+; LARGE64-NEXT: blr
+;
+; SMALL32-LABEL: loadSym3:
+; SMALL32: # %bb.0: # %entry
+; SMALL32-NEXT: mflr 0
+; SMALL32-NEXT: stwu 1, -32(1)
+; SMALL32-NEXT: lwz 3, L..C0(2) # target-flags(ppc-tlsldm) @"_$TLSML"
+; SMALL32-NEXT: stw 0, 40(1)
+; SMALL32-NEXT: bla .__tls_get_mod[PR]
+; SMALL32-NEXT: lwz 4, L..C3(2) # target-flags(ppc-tlsld) @"__$TLSLD."
+; SMALL32-NEXT: lwzx 3, 3, 4
+; SMALL32-NEXT: addi 1, 1, 32
+; SMALL32-NEXT: lwz 0, 8(1)
+; SMALL32-NEXT: mtlr 0
+; SMALL32-NEXT: blr
+;
+; LARGE32-LABEL: loadSym3:
+; LARGE32: # %bb.0: # %entry
+; LARGE32-NEXT: mflr 0
+; LARGE32-NEXT: stwu 1, -32(1)
+; LARGE32-NEXT: stw 0, 40(1)
+; LARGE32-NEXT: addis 6, L..C3 at u(2)
+; LARGE32-NEXT: addis 3, L..C1 at u(2)
+; LARGE32-NEXT: lwz 3, L..C1 at l(3)
+; LARGE32-NEXT: bla .__tls_get_mod[PR]
+; LARGE32-NEXT: lwz 4, L..C3 at l(6)
+; LARGE32-NEXT: lwzx 3, 3, 4
+; LARGE32-NEXT: addi 1, 1, 32
+; LARGE32-NEXT: lwz 0, 8(1)
+; LARGE32-NEXT: mtlr 0
+; LARGE32-NEXT: blr
+entry:
+ %0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @__$TLSLD.)
+ %1 = load i32, ptr %0, align 4
+ ret i32 %1
+}
+
+define i32 @loadSym4() {
+; SMALL64-LABEL: loadSym4:
+; SMALL64: # %bb.0: # %entry
+; SMALL64-NEXT: mflr 0
+; SMALL64-NEXT: stdu 1, -48(1)
+; SMALL64-NEXT: ld 3, L..C0(2) # target-flags(ppc-tlsldm) @"_$TLSML"
+; SMALL64-NEXT: std 0, 64(1)
+; SMALL64-NEXT: bla .__tls_get_mod[PR]
+; SMALL64-NEXT: ld 4, L..C4(2) # target-flags(ppc-tlsld) @"_$TLSLD._$TLSLD."
+; SMALL64-NEXT: lwzx 3, 3, 4
+; SMALL64-NEXT: addi 1, 1, 48
+; SMALL64-NEXT: ld 0, 16(1)
+; SMALL64-NEXT: mtlr 0
+; SMALL64-NEXT: blr
+;
+; LARGE64-LABEL: loadSym4:
+; LARGE64: # %bb.0: # %entry
+; LARGE64-NEXT: mflr 0
+; LARGE64-NEXT: stdu 1, -48(1)
+; LARGE64-NEXT: addis 3, L..C0 at u(2)
+; LARGE64-NEXT: addis 6, L..C4 at u(2)
+; LARGE64-NEXT: std 0, 64(1)
+; LARGE64-NEXT: ld 3, L..C0 at l(3)
+; LARGE64-NEXT: bla .__tls_get_mod[PR]
+; LARGE64-NEXT: ld 4, L..C4 at l(6)
+; LARGE64-NEXT: lwzx 3, 3, 4
+; LARGE64-NEXT: addi 1, 1, 48
+; LARGE64-NEXT: ld 0, 16(1)
+; LARGE64-NEXT: mtlr 0
+; LARGE64-NEXT: blr
+;
+; SMALL32-LABEL: loadSym4:
+; SMALL32: # %bb.0: # %entry
+; SMALL32-NEXT: mflr 0
+; SMALL32-NEXT: stwu 1, -32(1)
+; SMALL32-NEXT: lwz 3, L..C0(2) # target-flags(ppc-tlsldm) @"_$TLSML"
+; SMALL32-NEXT: stw 0, 40(1)
+; SMALL32-NEXT: bla .__tls_get_mod[PR]
+; SMALL32-NEXT: lwz 4, L..C4(2) # target-flags(ppc-tlsld) @"_$TLSLD._$TLSLD."
+; SMALL32-NEXT: lwzx 3, 3, 4
+; SMALL32-NEXT: addi 1, 1, 32
+; SMALL32-NEXT: lwz 0, 8(1)
+; SMALL32-NEXT: mtlr 0
+; SMALL32-NEXT: blr
+;
+; LARGE32-LABEL: loadSym4:
+; LARGE32: # %bb.0: # %entry
+; LARGE32-NEXT: mflr 0
+; LARGE32-NEXT: stwu 1, -32(1)
+; LARGE32-NEXT: stw 0, 40(1)
+; LARGE32-NEXT: addis 6, L..C4 at u(2)
+; LARGE32-NEXT: addis 3, L..C1 at u(2)
+; LARGE32-NEXT: lwz 3, L..C1 at l(3)
+; LARGE32-NEXT: bla .__tls_get_mod[PR]
+; LARGE32-NEXT: lwz 4, L..C4 at l(6)
+; LARGE32-NEXT: lwzx 3, 3, 4
+; LARGE32-NEXT: addi 1, 1, 32
+; LARGE32-NEXT: lwz 0, 8(1)
+; LARGE32-NEXT: mtlr 0
+; LARGE32-NEXT: blr
+entry:
+ %0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @_$TLSLD._$TLSLD.)
+ %1 = load i32, ptr %0, align 4
+ ret i32 %1
+}
+
+; COMMON: .csect _Renamed..5f24__TLSLD.[TL],2
+; COMMON-NEXT: .globl _Renamed..5f24__TLSLD.[TL] # @"_$TLSLD."
+; COMMON-NEXT: .rename _Renamed..5f24__TLSLD.[TL],"_$TLSLD."
+; COMMON: .csect _Renamed..5f24__TLSLD.a[TL],2
+; COMMON-NEXT: .globl _Renamed..5f24__TLSLD.a[TL] # @"_$TLSLD.a"
+; COMMON-NEXT: .rename _Renamed..5f24__TLSLD.a[TL],"_$TLSLD.a"
+; COMMON: .csect _Renamed..5f5f24___TLSLD.[TL],2
+; COMMON-NEXT: .lglobl _Renamed..5f5f24___TLSLD.[TL] # @"__$TLSLD."
+; COMMON-NEXT: .rename _Renamed..5f5f24___TLSLD.[TL],"__$TLSLD."
+; COMMON: .csect _Renamed..5f245f24__TLSLD.__TLSLD.[TL],2
+; COMMON-NEXT: .lglobl _Renamed..5f245f24__TLSLD.__TLSLD.[TL] # @"_$TLSLD._$TLSLD."
+; COMMON-NEXT: .rename _Renamed..5f245f24__TLSLD.__TLSLD.[TL],"_$TLSLD._$TLSLD."
+
+; SMALL64-LABEL: .toc
+; SMALL64-LABEL: L..C0:
+; SMALL64-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
+; SMALL64-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
+; SMALL64-LABEL: L..C1:
+; SMALL64-NEXT: .tc _Renamed..5f245f24__TLSLD.__TLSLD.[TC],_Renamed..5f24__TLSLD.[TL]@ld
+; SMALL64-NEXT: .rename _Renamed..5f245f24__TLSLD.__TLSLD.[TC],"_$TLSLD."
+; SMALL64-LABEL: L..C2:
+; SMALL64-NEXT: .tc _Renamed..5f245f24__TLSLD.__TLSLD.a[TC],_Renamed..5f24__TLSLD.a[TL]@ld
+; SMALL64-NEXT: .rename _Renamed..5f245f24__TLSLD.__TLSLD.a[TC],"_$TLSLD.a"
+; SMALL64-LABEL: L..C3:
+; SMALL64-NEXT: .tc _Renamed..5f245f5f24__TLSLD.___TLSLD.[TC],_Renamed..5f5f24___TLSLD.[TL]@ld
+; SMALL64-NEXT: .rename _Renamed..5f245f5f24__TLSLD.___TLSLD.[TC],"__$TLSLD."
+; SMALL64-LABEL: L..C4:
+; SMALL64-NEXT: .tc _Renamed..5f245f245f24__TLSLD.__TLSLD.__TLSLD.[TC],_Renamed..5f245f24__TLSLD.__TLSLD.[TL]@ld
+; SMALL64-NEXT: .rename _Renamed..5f245f245f24__TLSLD.__TLSLD.__TLSLD.[TC],"_$TLSLD._$TLSLD."
+
+; LARGE64-LABEL: .toc
+; LARGE64-LABEL: L..C0:
+; LARGE64-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
+; LARGE64-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
+; LARGE64-LABEL: L..C1:
+; LARGE64-NEXT: .tc _Renamed..5f245f24__TLSLD.__TLSLD.[TE],_Renamed..5f24__TLSLD.[TL]@ld
+; LARGE64-NEXT: .rename _Renamed..5f245f24__TLSLD.__TLSLD.[TE],"_$TLSLD."
+; LARGE64-LABEL: L..C2:
+; LARGE64-NEXT: .tc _Renamed..5f245f24__TLSLD.__TLSLD.a[TE],_Renamed..5f24__TLSLD.a[TL]@ld
+; LARGE64-NEXT: .rename _Renamed..5f245f24__TLSLD.__TLSLD.a[TE],"_$TLSLD.a"
+; LARGE64-LABEL: L..C3:
+; LARGE64-NEXT: .tc _Renamed..5f245f5f24__TLSLD.___TLSLD.[TE],_Renamed..5f5f24___TLSLD.[TL]@ld
+; LARGE64-NEXT: .rename _Renamed..5f245f5f24__TLSLD.___TLSLD.[TE],"__$TLSLD."
+; LARGE64-LABEL: L..C4:
+; LARGE64-NEXT: .tc _Renamed..5f245f245f24__TLSLD.__TLSLD.__TLSLD.[TE],_Renamed..5f245f24__TLSLD.__TLSLD.[TL]@ld
+; LARGE64-NEXT: .rename _Renamed..5f245f245f24__TLSLD.__TLSLD.__TLSLD.[TE],"_$TLSLD._$TLSLD."
+
+; SMALL32-LABEL: .toc
+; SMALL32-LABEL: L..C0:
+; SMALL32-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
+; SMALL32-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
+; SMALL32-LABEL: L..C1:
+; SMALL32-NEXT: .tc _Renamed..5f245f24__TLSLD.__TLSLD.[TC],_Renamed..5f24__TLSLD.[TL]@ld
+; SMALL32-NEXT: .rename _Renamed..5f245f24__TLSLD.__TLSLD.[TC],"_$TLSLD."
+; SMALL32-LABEL: L..C2:
+; SMALL32-NEXT: .tc _Renamed..5f245f24__TLSLD.__TLSLD.a[TC],_Renamed..5f24__TLSLD.a[TL]@ld
+; SMALL32-NEXT: .rename _Renamed..5f245f24__TLSLD.__TLSLD.a[TC],"_$TLSLD.a"
+; SMALL32-LABEL: L..C3:
+; SMALL32-NEXT: .tc _Renamed..5f245f5f24__TLSLD.___TLSLD.[TC],_Renamed..5f5f24___TLSLD.[TL]@ld
+; SMALL32-NEXT: .rename _Renamed..5f245f5f24__TLSLD.___TLSLD.[TC],"__$TLSLD."
+; SMALL32-LABEL: L..C4:
+; SMALL32-NEXT: .tc _Renamed..5f245f245f24__TLSLD.__TLSLD.__TLSLD.[TC],_Renamed..5f245f24__TLSLD.__TLSLD.[TL]@ld
+; SMALL32-NEXT: .rename _Renamed..5f245f245f24__TLSLD.__TLSLD.__TLSLD.[TC],"_$TLSLD._$TLSLD."
+
+; LARGE32-LABEL: .toc
+; LARGE32-LABEL: L..C0:
+; LARGE32-NEXT: .tc _Renamed..5f245f24__TLSLD.__TLSLD.[TE],_Renamed..5f24__TLSLD.[TL]@ld
+; LARGE32-NEXT: .rename _Renamed..5f245f24__TLSLD.__TLSLD.[TE],"_$TLSLD."
+; LARGE32-LABEL: L..C1:
+; LARGE32-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
+; LARGE32-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
+; LARGE32-LABEL: L..C2:
+; LARGE32-NEXT: .tc _Renamed..5f245f24__TLSLD.__TLSLD.a[TE],_Renamed..5f24__TLSLD.a[TL]@ld
+; LARGE32-NEXT: .rename _Renamed..5f245f24__TLSLD.__TLSLD.a[TE],"_$TLSLD.a"
+; LARGE32-LABEL: L..C3:
+; LARGE32-NEXT: .tc _Renamed..5f245f5f24__TLSLD.___TLSLD.[TE],_Renamed..5f5f24___TLSLD.[TL]@ld
+; LARGE32-NEXT: .rename _Renamed..5f245f5f24__TLSLD.___TLSLD.[TE],"__$TLSLD."
+; LARGE32-LABEL: L..C4:
+; LARGE32-NEXT: .tc _Renamed..5f245f245f24__TLSLD.__TLSLD.__TLSLD.[TE],_Renamed..5f245f24__TLSLD.__TLSLD.[TL]@ld
+; LARGE32-NEXT: .rename _Renamed..5f245f245f24__TLSLD.__TLSLD.__TLSLD.[TE],"_$TLSLD._$TLSLD."
+
diff --git a/llvm/test/CodeGen/PowerPC/aix-tls-local-dynamic.ll b/llvm/test/CodeGen/PowerPC/aix-tls-local-dynamic.ll
index 22349337f189081..d5dc7e57d363284 100644
--- a/llvm/test/CodeGen/PowerPC/aix-tls-local-dynamic.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-tls-local-dynamic.ll
@@ -358,39 +358,52 @@ entry:
; SMALL-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
; SMALL-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
; SMALL: [[TGInitL]]:
-; SMALL-NEXT: .tc TGInit[TC],TGInit[TL]@ld
+; SMALL-NEXT: .tc _Renamed..5f24__TLSLD.TGInit[TC],TGInit[TL]@ld
+; SMALL-NEXT: .rename _Renamed..5f24__TLSLD.TGInit[TC],"TGInit"
; SMALL: [[TGUninitL]]:
-; SMALL-NEXT: .tc TGUninit[TC],TGUninit[TL]@ld
+; SMALL-NEXT: .tc _Renamed..5f24__TLSLD.TGUninit[TC],TGUninit[TL]@ld
+; SMALL-NEXT: .rename _Renamed..5f24__TLSLD.TGUninit[TC],"TGUninit"
; SMALL: [[TIInitL]]:
-; SMALL-NEXT: .tc TIInit[TC],TIInit[TL]@ld
+; SMALL-NEXT: .tc _Renamed..5f24__TLSLD.TIInit[TC],TIInit[TL]@ld
+; SMALL-NEXT: .rename _Renamed..5f24__TLSLD.TIInit[TC],"TIInit"
; SMALL: [[TIUninitL]]:
-; SMALL-NEXT: .tc TIUninit[TC],TIUninit[UL]@ld
+; SMALL-NEXT: .tc _Renamed..5f24__TLSLD.TIUninit[TC],TIUninit[UL]@ld
+; SMALL-NEXT: .rename _Renamed..5f24__TLSLD.TIUninit[TC],"TIUninit"
; SMALL: [[TWInitL]]:
-; SMALL-NEXT: .tc TWInit[TC],TWInit[TL]@ld
+; SMALL-NEXT: .tc _Renamed..5f24__TLSLD.TWInit[TC],TWInit[TL]@ld
+; SMALL-NEXT: .rename _Renamed..5f24__TLSLD.TWInit[TC],"TWInit"
; SMALL: [[TWUninitL]]:
-; SMALL-NEXT: .tc TWUninit[TC],TWUninit[TL]@ld
+; SMALL-NEXT: .tc _Renamed..5f24__TLSLD.TWUninit[TC],TWUninit[TL]@ld
+; SMALL-NEXT: .rename _Renamed..5f24__TLSLD.TWUninit[TC],"TWUninit"
; LARGE64: [[ModuleHandleL]]:
; LARGE64-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
; LARGE64-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
; LARGE64: [[TGInitL]]:
-; LARGE64-NEXT: .tc TGInit[TE],TGInit[TL]@ld
+; LARGE64-NEXT: .tc _Renamed..5f24__TLSLD.TGInit[TE],TGInit[TL]@ld
+; LARGE64-NEXT: .rename _Renamed..5f24__TLSLD.TGInit[TE],"TGInit"
;
; LARGE32: [[TGInitL]]:
-; LARGE32-NEXT: .tc TGInit[TE],TGInit[TL]@ld
+; LARGE32-NEXT: .tc _Renamed..5f24__TLSLD.TGInit[TE],TGInit[TL]@ld
+; LARGE32-NEXT: .rename _Renamed..5f24__TLSLD.TGInit[TE],"TGInit"
; LARGE32: [[ModuleHandleL]]:
; LARGE32-NEXT: .tc _Renamed..5f24__TLSML[TC],_Renamed..5f24__TLSML[TC]@ml
; LARGE32-NEXT: .rename _Renamed..5f24__TLSML[TC],"_$TLSML"
;
; LARGE: [[TGUninitL]]:
-; LARGE-NEXT: .tc TGUninit[TE],TGUninit[TL]@ld
+; LARGE-NEXT: .tc _Renamed..5f24__TLSLD.TGUninit[TE],TGUninit[TL]@ld
+; LARGE-NEXT: .rename _Renamed..5f24__TLSLD.TGUninit[TE],"TGUninit"
; LARGE: [[TIInitL]]:
-; LARGE-NEXT: .tc TIInit[TE],TIInit[TL]@ld
+; LARGE-NEXT: .tc _Renamed..5f24__TLSLD.TIInit[TE],TIInit[TL]@ld
+; LARGE-NEXT: .rename _Renamed..5f24__TLSLD.TIInit[TE],"TIInit"
; LARGE: [[TIUninitL]]:
-; LARGE-NEXT: .tc TIUninit[TE],TIUninit[UL]@ld
+; LARGE-NEXT: .tc _Renamed..5f24__TLSLD.TIUninit[TE],TIUninit[UL]@ld
+; LARGE-NEXT: .rename _Renamed..5f24__TLSLD.TIUninit[TE],"TIUninit"
; LARGE: [[TWInitL]]:
-; LARGE-NEXT: .tc TWInit[TE],TWInit[TL]@ld
+; LARGE-NEXT: .tc _Renamed..5f24__TLSLD.TWInit[TE],TWInit[TL]@ld
+; LARGE-NEXT: .rename _Renamed..5f24__TLSLD.TWInit[TE],"TWInit"
; LARGE: [[TWUninitL]]:
-; LARGE-NEXT: .tc TWUninit[TE],TWUninit[TL]@ld
+; LARGE-NEXT: .tc _Renamed..5f24__TLSLD.TWUninit[TE],TWUninit[TL]@ld
+; LARGE-NEXT: .rename _Renamed..5f24__TLSLD.TWUninit[TE],"TWUninit"
declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull)
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