[llvm] [AMDGPU] Fix wrong operand value when floating-point value is used as operand of type i16 (PR #84106)

[via llvm-commits]

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git-clang-format --diff 49ec8b747c83b8dec8317614c30e5610d133790e 719b81261698f89098c94e54b3909affcba95fcb -- llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
index 5050aec261..fd8ce9e07f 100644
--- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
@@ -2065,8 +2065,8 @@ bool AMDGPUOperand::isInlinableImm(MVT type) const {
         break;
       }
       return isInlineableLiteralOp16(
-          static_cast<uint16_t>(FPLiteral.bitcastToAPInt().getZExtValue()), type,
-          AsmParser->hasInv2PiInlineImm());
+          static_cast<uint16_t>(FPLiteral.bitcastToAPInt().getZExtValue()),
+          type, AsmParser->hasInv2PiInlineImm());
     }
 
     // Check if single precision literal is inlinable

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https://github.com/llvm/llvm-project/pull/84106